POINN BULD25D Npn silicon transistor with integrated diode Datasheet

BULD25D, BULD25DR, BULD25SL
NPN SILICON TRANSISTOR WITH INTEGRATED DIODE
Copyright © 1997, Power Innovations Limited, UK
●
Designed Specifically for High Frequency
Electronic Ballasts
●
Integrated Fast trr Anti-parallel Diode,
Enhancing Reliability
●
Diode trr Typically 500 ns
●
New Ultra Low-Height SOIC Power Package
●
Tightly Controlled Transistor Storage Times
●
Voltage Matched Integrated Transistor and
Diode
●
Characteristics Optimised for Cool Running
●
Diode-Transistor Charge Coupling
Minimised to Enhance Frequency Stability
●
Custom Switching Selections Available
●
Surface Mount and Through-Hole Options
PACKAGE
PART # SUFFIX
Small-outline
D
Small-outline taped
JULY 1994 - REVISED SEPTEMBER 1997
D PACKAGE
(TOP VIEW)
B
1
8
C
NC
2
7
C
NC
3
6
C
E
4
5
C
NC - No internal connection
SL PACKAGE
(TOP VIEW)
B
1
C
2
E
3
device symbol
C
DR
and reeled
Single-in-line
SL
B
description
The new BULDxx range of transistors have been
designed specifically for use in High Frequency
Electronic Ballasts (HFEB’s). This range of
E
switching transistors has tightly controlled
storage times and an integrated fast trr anti-parallel diode. The revolutionary design ensures that the diode
has both fast forward and reverse recovery times, achieving the same performance as a discrete anti-parallel
diode plus transistor.
The integrated diode has minimal charge coupling with the transistor, increasing frequency stability,
especially in lower power circuits where the circulating currents are low. By design, this new device offers a
voltage matched integrated transistor and anti-parallel diode.
This device is available in the now well established 8 pin low height surface mount D package, and the TO220 pin compatible SL package. Use of the SL package allows for a 40% height saving, making it ideal for
compact ballast applications.
absolute maximum ratings at 25°C ambient temperature (unless otherwise noted)
SYMBOL
VALUE
UNIT
Collector-emitter voltage (V BE = 0)
RATING
VCES
600
V
Collector-base voltage (IE = 0)
VCBO
600
V
Collector-emitter voltage (IB = 0)
VCEO
400
V
Emitter-base voltage
V EBO
9
V
PRODUCT
INFORMATION
Information is current as of publication date. Products conform to specifications in accordance
with the terms of Power Innovations standard warranty. Production processing does not
necessarily include testing of all parameters.
1
BULD25D, BULD25DR, BULD25SL
NPN SILICON TRANSISTOR WITH INTEGRATED DIODE
JULY 1994 - REVISED SEPTEMBER 1997
absolute maximum ratings at 25°C ambient temperature (unless otherwise noted) (continued)
RATING
SYMBOL
VALUE
UNIT
Continuous collector current (see Note 1)
Peak collector current (see Note 2)
Continuous base current (see Note 1)
Peak base current (see Note 2)
Continuous device dissipation at (or below) 25°C ambient temperature
BULD25D
2
A
4
A
IB
1.5
A
IBM
2.5
A
see Figure 10
Ptot
BULD25SL
Maximum average continuous diode forward current at (or below) 25°C ambient temperature
IC
ICM
see Figure 11
W
IE(av)
0.5
A
Tj
-65 to +150
°C
Tstg
-65 to +150
°C
Operating junction temperature range
Storage temperature range
NOTES: 1. This value applies for tp = 1 s.
2. This value applies for tp = 10 ms, duty cycle ≤ 2%.
electrical characteristics at 25°C ambient temperature
PARAMETER
V CEO(sus)
sustaining voltage
cut-off current
Emitter cut-off
IEBO
current
V BE(sat)
VCE(sat)
V EC
Collector-emitter
Collector-emitter
ICES
hFE
TEST CONDITIONS
Base-emitter
saturation voltage
IC =
0.1 A
V
10
µA
VEB =
IC = 0
1
mA
0.9
1.1
V
0.3
0.5
0.6
1
IB =
9V
0.1 A
IC = 0.5 A
IB =
0.1 A
IC = 0.5 A
0.2 A
IC =
forward voltage
UNIT
VBE = 0
IB =
Anti-parallel diode
MAX
VCE = 600 V
saturation voltage
transfer ratio
TYP
400
Collector-emitter
Forward current
MIN
1A
VCE = 10 V
IC = 0.01 A
VCE = 1.5 V
IC = 0.5 A
VCE =
5V
IC =
IE =
1A
(see Notes 3 and 4)
(see Notes 3 and 4)
(see Notes 3 and 4)
1A
10
18
10
15
20
10
15
20
1.5
1.7
(see Notes 3 and 4)
V
V
NOTES: 3. These parameters must be measured using pulse techniques, tp = 300 µs, duty cycle ≤ 2%.
4. These parameters must be measured using voltage-sensing contacts, separate from the current carrying contacts, and located
within 1 mm from the device body for the D package and 3.2 mm from the device body for the SL package.
thermal characteristics
PARAMETER
RθJA
MIN
Junction to free air thermal resistance
TYP
MAX
D package
165
SL Package
115
UNIT
°C/W
switching characteristics at 25°C ambient temperature
PARAMETER
Measured by holding transistor
reverse recovery time
in an off condition, VEB = -3 V
ts
Storage time
(see Note 5)
tf
Fall time
(see Note 5)
trr
NOTE
MIN
(see Note 5)
5: Refer to Figures 12, 13 and 14 for Functional Test Circuit and Switching Waveforms.
PRODUCT
2
TEST CONDITIONS
Anti-parallel diode
INFORMATION
2
TYP
MAX
UNIT
0.5
1
µs
3.5
5
µs
0.25
0.35
µs
BULD25D, BULD25DR, BULD25SL
NPN SILICON TRANSISTOR WITH INTEGRATED DIODE
JULY 1994 - REVISED SEPTEMBER 1997
TYPICAL CHARACTERISTICS
ANTI-PARALLEL DIODE
INSTANTANEOUS FORWARD CURRENT
vs
INSTANTANEOUS FORWARD VOLTAGE
FORWARD CURRENT TRANSFER RATIO
vs
COLLECTOR CURRENT
LDX25SHF
30
LDX25DVF
10
TA = 25°C
IE - Instantaneous Forward Current - A
hFE - Forward Current Transfer Ratio
TA = 25°C
10
VCE = 1.5 V
VCE = 5 V
VCE = 10 V
1·0
0·01
1·0
0·1
0·01
0·1
1·0
10
0
IC - Collector Current - A
0·5
1·0
1·5
2·0
2·5
3·0
VEC - Instantaneous Forward Voltage - V
Figure 1.
Figure 2.
BASE-EMITTER SATURATION VOLTAGE
vs
AMBIENT TEMPERATURE
LDX25SVB
VBE(sat) - Base-Emitter Saturation Voltage - V
1.0
IC = 0.5 A
IB = 0.1 A
0.9
0.8
0.7
0.6
-50
-25
0
25
50
75
100
125
150
TA - Ambient Temperature - °C
Figure 3.
PRODUCT
INFORMATION
3
BULD25D, BULD25DR, BULD25SL
NPN SILICON TRANSISTOR WITH INTEGRATED DIODE
JULY 1994 - REVISED SEPTEMBER 1997
MAXIMUM SAFE OPERATING REGIONS
MAXIMUM FORWARD-BIAS
SAFE OPERATING AREA
LDX25DFB
10
BULD25D
TA = 25°C
IC - Collector Current - A
IC - Collector Current - A
10
MAXIMUM FORWARD-BIAS
SAFE OPERATING AREA
1·0
0·1
BULD25SL
TA = 25°C
1·0
0·1
t p = 100 µs
t p = 10 ms
tp = 1 s
0·01
1·0
t p = 100 µs
t p = 10 ms
tp = 1 s
10
100
1000
0·01
1·0
10
VCE - Collector-Emitter Voltage - V
1000
Figure 5.
MAXIMUM REVERSE-BIAS
SAFE OPERATING AREA
MAXIMUM REVERSE-BIAS
SAFE OPERATING AREA
LDX25DRB
5
BULD25D
IB(on) = IC / 5
VBE(off) = -5 V
TA
= 25°C
LDX25SRB
5
BULD25SL
IB(on) = IC / 5
VBE(off) = -5 V
TA
= 25°C
4
IC - Collector Current - A
4
IC - Collector Current - A
100
VCE - Collector-Emitter Voltage - V
Figure 4.
3
2
1
3
2
1
0
0
0
100
200
300
400
500
600
700
800
VCE - Collector-Emitter Voltage - V
Figure 6.
PRODUCT
4
LDX25SFB
INFORMATION
0
100
200
300
400
500
600
VCE - Collector-Emitter Voltage - V
Figure 7.
700
800
BULD25D, BULD25DR, BULD25SL
NPN SILICON TRANSISTOR WITH INTEGRATED DIODE
JULY 1994 - REVISED SEPTEMBER 1997
THERMAL INFORMATION
ZθJA/R θJA - Normalised Transient Thermal Impedance
THERMAL RESPONSE JUNCTION TO AMBIENT
vs
POWER PULSE DURATION
LDX25DZA
1·0
60%
40%
BULD25D
TA = 25°C
20%
0·1
10%
t1
0·01
duty cycle = t1/t2
Read time at end of t1,
0%
t2
Z

T J ( max ) – T A = P D ( peak) •  θ JA  • R θ JA ( max )
R
 θ JA 
0·001
10-4
10-3
10-2
10-1
10 0
101
102
103
t1 - Power Pulse Duration - s
Figure 8.
ZθJA/R θJA - Normalised Transient Thermal Impedance
THERMAL RESPONSE JUNCTION TO AMBIENT
vs
POWER PULSE DURATION
LDX25SZA
1·0
60%
40%
BULD25SL
TA = 25°C
20%
0·1
10%
t1
0·01
duty cycle = t1/t2
Read time at end of t1,
0%
t2
Z

T J ( max ) – T A = P D ( peak) •  θ JA  • R θ JA ( max )
R
 θ JA 
0·001
10-4
10-3
10-2
10-1
10 0
101
102
103
t1 - Power Pulse Duration - s
Figure 9.
PRODUCT
INFORMATION
5
BULD25D, BULD25DR, BULD25SL
NPN SILICON TRANSISTOR WITH INTEGRATED DIODE
JULY 1994 - REVISED SEPTEMBER 1997
THERMAL INFORMATION
MAXIMUM POWER DISSIPATION JUNCTION TO AMBIENT
vs
POWER PULSE DURATION
100
Ptot - Maximum Power Dissipation - W
0%
LDX25DPA
BULD25D
TA = 25°C
10 10%
20%
40%
60%
1·0
0·1
10-4
10-3
10-2
10 -1
100
101
102
103
t1 - Power Pulse Duration - s
Figure 10.
MAXIMUM POWER DISSIPATION JUNCTION TO AMBIENT
vs
POWER PULSE DURATION
100
Ptot - Maximum Power Dissipation - W
0%
BULD25SL
TA = 25°C
10%
10
20%
40%
60%
1·0
10-4
10-3
10-2
10 -1
100
t1 - Power Pulse Duration - s
Figure 11.
PRODUCT
6
LDX25SPA
INFORMATION
101
102
103
BULD25D, BULD25DR, BULD25SL
NPN SILICON TRANSISTOR WITH INTEGRATED DIODE
JULY 1994 - REVISED SEPTEMBER 1997
FUNCTIONAL TEST CIRCUIT
Vs = 325 V
BULD25
RB
Rload
Cslew
C filter
Ns
RE
Np
L1
T2
Ccoupling
RB
BULD25
Ns
RE
IDDATBAL
0V
Figure 12.
COMPONENT VALUES USED IN
FUNCTIONAL TEST CIRCUIT
RB
22 Ω
RE
1.8 Ω
Rload
470 Ω
Ccoupling
47 nF
Cslew
1.5 nF
Cfilter
3.2 nF
L1
2.5 mH
T2 NP : NS
5:3
Figure 13.
PRODUCT
INFORMATION
7
BULD25D, BULD25DR, BULD25SL
NPN SILICON TRANSISTOR WITH INTEGRATED DIODE
JULY 1994 - REVISED SEPTEMBER 1997
FUNCTIONAL TEST SWITCHING WAVEFORMS
100%
V CE
10%
0%
BASE CURRENT
ts
100%
90%
100%
CO LLE CTOR C UR RE NT
10%
25%
0%
DIODE CURRENT
Diode
t rr
tf
SWTWAV25
Figure 14. Switching Waveforms of device in Functional Test Circuit
PRODUCT
8
INFORMATION
BULD25D, BULD25DR, BULD25SL
NPN SILICON TRANSISTOR WITH INTEGRATED DIODE
JULY 1994 - REVISED SEPTEMBER 1997
MECHANICAL DATA
D008
plastic small-outline package
This small-outline package consists of a circuit mounted on a lead frame and encapsulated within a plastic
compound. The compound will withstand soldering temperature with no deformation, and circuit performance
characteristics will remain stable when operated in high humidity conditions. Leads require no additional
cleaning or processing when used in soldered assembly.
D008
Designation per JEDEC Std 30:
PDSO-G8
5,00 (0.197)
4,80 (0.189)
8
7
6
5
1
2
3
4
6,20 (0.244)
5,80 (0.228)
4,00 (0.157)
3,81 (0.150)
7° NOM
3 Places
1,75 (0.069)
1,35 (0.053)
0,50 (0.020)
x 45°NOM
0,25 (0.010)
0,203 (0.008)
0,102 (0.004)
0,79 (0.031)
0,28 (0.011)
7° NOM
4 Places
0,51 (0.020)
0,36 (0.014)
8 Places
Pin Spacing
1,27 (0.050)
(see Note A)
6 Places
5,21 (0.205)
4,60 (0.181)
0,229 (0.0090)
0,190 (0.0075)
4° ± 4°
1,12 (0.044)
0,51 (0.020)
ALL LINEAR DIMENSIONS ARE IN MILLIMETERS AND PARENTHETICALLY IN INCHES
NOTES: A.
B.
C.
D.
Leads are within 0,25 (0.010) radius of true position at maximum material condition.
Body dimensions do not include mold flash or protrusion.
Mold flash or protrusion shall not exceed 0,15 (0.006).
Lead tips to be planar within ±0,051 (0.002).
PRODUCT
MDXXAA
INFORMATION
9
BULD25D, BULD25DR, BULD25SL
NPN SILICON TRANSISTOR WITH INTEGRATED DIODE
JULY 1994 - REVISED SEPTEMBER 1997
MECHANICAL DATA
SL003
3-pin plastic single-in-line package
This single-in-line package consists of a circuit mounted on a lead frame and encapsulated within a plastic
compound. The compound will withstand soldering temperature with no deformation, and circuit performance
characteristics will remain stable when operated in high humidity conditions. Leads require no additional
cleaning or processing when used in soldered assembly.
SL003
4,57 (0.180)
MAX
10,2 (0.400) MAX
6,60 (0.260)
6,10 (0.240)
8,31 (0.327)
MAX
Index
Dot
12,9 (0.492)
MAX
4,267 (0.168)
MIN
1
1,854 (0.073) MAX
2
3
Pin Spacing
2,54 (0.100) T.P.
(see Note A)
2 Places
0,356 (0.014)
0,203 (0.008)
3 Places
0,711 (0.028)
0,559 (0.022)
3 Places
ALL LINEAR DIMENSIONS ARE IN MILLIMETERS AND PARENTHETICALLY IN INCHES
NOTES: A. Each pin centerline is located within 0,25 (0.010) of its true longitudinal position.
B. Body molding flash of up to 0,15 (0.006) may occur in the package lead plane.
PRODUCT
10
INFORMATION
MDXXAD
BULD25D, BULD25DR, BULD25SL
NPN SILICON TRANSISTOR WITH INTEGRATED DIODE
JULY 1994 - REVISED SEPTEMBER 1997
MECHANICAL DATA
D008
tape dimensions
D008 Package (8 pin SOIC) Single-Sprocket Tape
4,10
3,90
8,05
7,95
1,60
1,50
2,05
1,95
0,40
0,8 MIN.
5,55
5,45
6,50
6,30
Carrier Tape
Cover
0 MIN.
ø 1,5 MIN.
Direction of Feed
Embossment
12,30
11,70
Tape
2,2
2,0
ALL LINEAR DIMENSIONS IN MILLIMETERS
NOTES: A. Taped devices are supplied on a reel of the following dimensions:Reel diameter:
Reel hub diameter:
Reel axial hole:
MDXXAT
330 +0,0/-4,0 mm
100 ±2,0 mm
13,0 ±0,2 mm
B. 2500 devices are on a reel.
PRODUCT
INFORMATION
11
BULD25D, BULD25DR, BULD25SL
NPN SILICON TRANSISTOR WITH INTEGRATED DIODE
JULY 1994 - REVISED SEPTEMBER 1997
IMPORTANT NOTICE
Power Innovations Limited (PI) reserves the right to make changes to its products or to discontinue any
semiconductor product or service without notice, and advises its customers to verify, before placing orders, that the
information being relied on is current.
PI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with PI's standard warranty. Testing and other quality control techniques are utilized to the extent PI
deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily
performed, except as mandated by government requirements.
PI accepts no liability for applications assistance, customer product design, software performance, or infringement
of patents or services described herein. Nor is any license, either express or implied, granted under any patent
right, copyright, design right, or other intellectual property right of PI covering or relating to any combination,
machine, or process in which such semiconductor products or services might be or are used.
PI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, INTENDED, AUTHORIZED, OR WARRANTED TO BE
SUITABLE FOR USE IN LIFE-SUPPORT APPLICATIONS, DEVICES OR SYSTEMS.
Copyright © 1997, Power Innovations Limited
PRODUCT
12
INFORMATION
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