ON ENA2118A Af control lsi Datasheet

Ordering number : ENA2118A
LC898212XA
CMOS LSI
AF Control LSI
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Overview
The AF control device, LC898212XA (LC898212XA-MH), provides an ideal way to implement the reduced power
consumption and the improved autofocus precision and speed (reduced convergence time) required in high-pixelcount camera modules for use in smartphones.
The LC898212XA integrates on a single chip an equalizer circuit employing digital calculation, and it can be
combined with position sensors to build a closed-loop actuator control system. Since closed-loop control provides
better ability to maintain the control object than conventional open-loop systems and is not affected by position
differences, the LC898212XA is ideal for use in AF systems used in a wide variety of cameras. A closed-loop system
uses position sensors for position control, and power consumption is lower than with conventional open-loop control,
which uses current values for position control.
In addition, a new PWM drive system employed suppresses noise that could affect image quality while achieving
reduced power consumption, making this IC ideal for use in mobile devices such as smartphones. The filter
coefficients of the equalizer circuit can be adjusted to any values desired by making register settings via I2C
communication. This makes it possible to build a control circuit optimized to the various types of actuators and
thereby achieve faster autofocus (reduced convergence time) performance.
The integrated ADC provides up to 10-bit precision for highly accurate AF position control. Also integrated on-chip
are a constant current supply DAC for drive and an op-amp with adjustable gain for use with the position sensors
indispensable for building a closed-loop control system.
* I2C Bus is a trademark of Philips Corporation.
Semiconductor Components Industries, LLC, 2013
June, 2013
91212HK/82912HKPC 20111107-S00001 No.A2118-1/5
LC898212XA
Features
• Built-in equalizer circuit using digital operation
AF control equalize circuit
Any coefficient can be specified by I2C I/F
• I2C Interface
• Built-in A/D converter
Maximum 10-bit
Input 2 channel
• Built-in D/A converter
8-bit
Output 2-channel (Hall offset, Constant current Bias)
• Built-in OP Amp
1 channel
Hall Amp
• Built-in OSC
48MHz (Frequency adjustment function)
• Built-in PWM pulse generator circuit
PWM circuit for AF control
• 1-chip motor driver
Saturation drive H bridge 1 channel
• Package
WL-CSP 12-pin
Lead-free, halogen-free
• Supply voltage
Logic unit: Internal core typ 1.2V (1.08V to 1.32V), AVDD (2.6V to 3.6V)
Driver unit: VM (2.6V to 3.6V)
Package Dimensions
unit : mm (typ)
3440
TOP VIEW
BOTTOM VIEW
0.4
0.285
SIDE VIEW
0.285
1
2
0.4
1.77
3
4
1.37
(0.43)
B
A
0.21
SIDE VIEW
C
0.69 MAX
0.26
SANYO : WLP12(1.77x1.37)
No.A2118-2/5
LC898212XA
Block Diagram
I2CDT
I2CCK
I2C I/F
AVDD
DA
VM
PGND
BIASO
H Bridge
Driver
OUT1
OUT2
OPINP
Hall
OPINM
AD
EQ
PWM
Modulation
Output
Control logic
AVDD
VDD
OSC
POR
REG
VDDO
VSS
No.A2118-3/5
LC898212XA
Pin Description
TYPE
I
INPUT
P
O
OUTPUT
B
BIDIRECTION
Power supply, GND
NC
I2C interface
I2CCK
I2CDT
B
B
I2C Clock pin
I2C Data pin
D/A interface
BIASO
O
D/A output (Hall bias input)
Op-Amp interface
OPINP
OPINM
I
I
Op-Amp input
Op-Amp input
Driver interface
OUT1
OUT2
O
O
Actuator output pin
Actuator output pin
Power supply pin
VDD
VSS
VDDO
VM
PGND
P
P
P
P
P
Digital power supply
Digital GND
LDO power supply out
Motor power supply
Power GND
NOT CONNECT
PIN TYPE “O” – Ensure that it is set to OPEN.
PIN TYPE “I” – OPEN is inhibited. Ensure that it is connected to the VDD or VSS even when it is unused.
(Please contact Our company for more information about selection of VDD or VSS.)
PIN TYPE “B” – If you are unsure about processing method on the pin description of pin layout table, please contact us.
Note that incorrect processing of unused pins may result in defects.
If you have any question, please feel free to contact us.
Pin Layout
Circuit Name
Number of Pins
Circuit Name
Number of Pins
Analog
4
Driver
4
Logic
4
Backside pin layout diagram (Top View from the mold side)
4
VDDO
VM
PGND
3
AVDD
I2CDT
OUT1
2
OPINP
I2CCK
OUT2
1
VSS
OPINM
BIASO
A
B
C
No.A2118-4/5
LC898212XA
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PS No.A2118-5/5
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