ASM706 P/ R/ S/ T/ J ASM708 R/ S/ T/ J October 2003 rev 1.0 3/3.3/4.0 V µP Supervisor Circuits General Description Features The ASM706P/R/S/T/J and ASM708R/S/T/J are cost effective • CMOS supervisor circuits that monitor power-supply and Precision power supply minotor •2.63V threshold (ASM706P/R, ASM708R) battery voltage level, and µP/µC operation. •2.93V threshold (ASM706S, ASM708S) •3.08V threshold (ASM706T, ASM708T) •New 4.00V threshold (ASM706J , ASM708J) The family offers several functional options. Each device generates a reset signal during power-up, power-down and during brownout conditions. A reset is generated when the • • supply drops below 2.63V (ASM706P/R, ASM708R), 2.93V (ASM706S, ASM708S), 3.08V (ASM706T, ASM708T) or 4.00 (ASM706J, ASM708J). In addition, the ASM706P/R/S/T/J feature a 1.6 second watchdog timer. The watchdog timer output will trigger a reset if connected to MR. Floating the WDI Debounced manual reset input Auxiliary voltage monitor comparator •1.25V threshold •Battery monitor / auxiliary supply monitor • Watchdog timer (ASM706P/R/S/T/J) •Watchdog can be disabled by floating WDI • • 200ms reset time delay Three reset signal options •Active HIGH: ASM706P input pin disables the watchdog timer. •Active LOW: ASM706R/S/T/J The ASM708R/S/T/J have both active-HIGH and active-LOW reset outputs but no watchdog function. The ASM706P has the same pin-out and functions as the ASM706R but has an activeHIGH reset output. •Active HIGH and LOW outputs: ASM708R/S/T/J • • DIP, SO and MicroSO packages Guaranteed RESET assertion to VCC = 1.1V Applications A versatile power-fail circuit, useful in checking battery levels and non-5V supplies, has a 1.25V threshold. All devices have a manual reset input. All devices are available in 8-pin DIP, SO and the compact MicroSO packages. The MicroSO package requires 50% less PC board area than the conventional SO package. • • • • • • • • Computers and embedded controllers CTI applications Automotive systems Portable/Battery-operated systems Intelligent instruments Wireless communication systems PDAs and hand-held equipment Safety systems Typical Operating Circuit Unregulated DC +3.3V Regulator VCC R1 VCC PFI R2 RESET (RESET) ASM706 R/S/T ASM708 R/S/T (ASM706 P) µP RESET (RESET) WDI I/O LINE WDO NMI PFO INTERRUPT MR Alliance Semiconductor 2575 Augustine Drive . Santa Clara, CA 95054 . Tel: 408.855.4900 . Fax: 408.855.4999 . www.alsc.com Notice: The information in this document is subject to change without notice ASM706 P/ R/ S/ T/ J ASM708 R/ S/ T/ J October 2003 rev 1.0 Block Diagrams Transition Detector WDI Watchdog Timer WDO RESET VCC VCC Timebase 20kΩ 20kΩ MR RESET Generator MR RESET (RESET) ASM706P + VCC - + PFI RESET Generator + VCC 2.63V (ASM706P/R) 2.93V (ASM706S) 3.08V (ASM706T) 4.00V (ASM706J) 1.25V - + 2.63V (ASM708R) 2.93V (ASM708S) 3.08V (ASM708T) 4.00V (ASM708J) PFI + PFO - 1.25V ASM706P/R/S/T/J RESET + PFO - ASM708R/S/T/J GND GND Pin Configuration PFI 4 1 VCC 2 6 NC GND 3 5 PFO PFI 4 8 WDO MR 7 RESET VCC 1 2 6 WDI GND 3 5 PFO PFI 4 8 WDO 7 RESET (RESET) RESET (ASM706P) WDO 1 2 6 WDI MR 3 5 PFO VCC 4 ASM706P MR 7 RESET ASM706R/S/T/J GND 3 8 RESET ASM706R/S/T/J 2 ASM706P 1 ASM708R/S/T/J MR VCC 8 WDI RESET 1 7 PFO RESET 2 6 PFI MR 3 5 GND VCC 4 3/3.3/4.0 V µP Supervisor Circuits Notice: The information in this document is subject to change without notice ASM708R/S/T/J MicroSO DIP/SO 8 NC 7 PFO 6 PFI 5 GND 2 of 16 ASM706 P/ R/ S/ T/ J ASM708 R/ S/ T/ J October 2003 rev 1.0 Pin Description Pin Number ASM706P DIP/ SO 1 MicroSO 3 ASM706R/S/T/J ASM708R/S/T/J DIP/ SO DIP/ SO 1 MicroSO 3 1 Name Function MicroSO 3 MR Manual reset input. The active LOW input triggers a reset pulse. It is pulled HIGH by a 20kΩ pull-up resistor. It is compatible with TTL/CMOS signals when VCC = 5V. It can be shorted to ground through a mechanical switch. Leave folating or connect to VCC if the function is not used. 2 4 2 4 2 4 VCC Monitored power supply input. 3 5 3 5 3 5 GND Ground. 4 6 4 6 4 6 PFI Power-fail input voltage monitor. With PFI less than 1.25V, PFO goes LOW. Connect PFI to Ground when not in use. 5 7 5 7 5 7 PFO Power-fail output. The output is active LOW and sinks current when PFI is less than 1.25V. If not used, leave the pin unconnected. 6 8 6 8 - - WDI Watchdog input. WDI controls the internal watchdog timer. A HIGH or LOW signal for 1.6sec at WDI allows the internal timer to run-out, setting WDO low. A rising or falling edge must occur at WDI within 1.6 seconds or WDO goes LOW. The watchdog function is disabled by floating WDI. The internal watchdog timer clears when: RESET is asserted; WDI is three-stated ; or WDI sees a rising or falling edge. - - - - 6 8 NC Not Connected Active LOW reset output. Pulses LOW for 200ms when triggered, and stays LOW whenever VCC is - - 7 1 7 1 RESET below the reset threshold. RESET remains LOW for 200ms after VCC rises above the reset threshold or MR goes from HIGH to LOW. A watchdog timeout will not trigger RESET unless WDO is connected to MR. 3/3.3/4.0 V µP Supervisor Circuits Notice: The information in this document is subject to change without notice 3 of 16 ASM706 P/ R/ S/ T/ J ASM708 R/ S/ T/ J October 2003 rev 1.0 Pin Number ASM706P DIP/ SO 8 MicroSO 2 ASM706R/S/T/J ASM708R/S/T/J DIP/ SO DIP/ SO 8 MicroSO 2 - Name Function MicroSO - WDO Watchdog output. WDO goes LOW when the 1.6 second interval watchdog timer times-out and does not go HIGH until a transition occurs at WDI. In addition, when VCC falls below the reset threshold, WDO goes LOW. Unlike RESET, WDO does not have a minimum pulse width and as soon as VCC exceeds the reset threshold, WDO becomes HIGH with no delay. 7 1 - - 8 2 RESET Active HIGH reset output. The inverse of RESET. 3/3.3/4.0 V µP Supervisor Circuits Notice: The information in this document is subject to change without notice 4 of 16 ASM706 P/ R/ S/ T/ J ASM708 R/ S/ T/ J October 2003 rev 1.0 Detailed Descriptions A proper reset input Manual Reset (MR) enables a microprocessor/ microcontroller to start in a known state. ASM706 P/ R/ S/ T/ J and ASM708 R/ S/ T/ J assert reset to prevent code execution errors during power-up, power-down and brownout conditions. The active-LOW manual reset input is pulled high by an internal 20kΩ pull-up resistor and can be driven low by CMOS/TTL logic or a mechanical switch to ground. An external debounce circuit is unnecessary since the 140ms minimum reset time will debounce mechanical pushbutton switches. The minimum RESET/RESET Operation MR input pulse width is 0.5µs with a 3V VCC input and 0.15µs The RESET/RESET signals are designed to start or return a with a 5V VCC input. If not used, tie MR to VCC or leave µP/µC to a known state. floating. With VCC above 1.2V, RESET and RESET are guaranteed to be asserted. During a power-up sequence, the reset outputs remain asserted until the supply rises above the threshold level. The resets are deasserted approximately 200ms after crossing the threshold. In a brownout situation where VCC falls below the threshold level, the reset outputs are asserted. If a brownout occurs during an already initiated reset period, the reset period will extend for an additional reset period of 200ms. The ASM708 devices have dual reset outputs, one active LOW and one active HIGH. The ASM706P has a single active HIGH reset and the ASM706/R/S/T/J devices have an active LOW reset output. Figure 1: WDI Three-state operation By connecting the watchdog output (WDO) and MR, a Alliance Part # RESET Polarity Threshold Watchdog Timer ASM706P HIGH 2.63V YES Watchdog Timer ASM706R LOW 2.63V YES A watchdog timer available on the ASM706P/R/S/T/J ASM706S LOW 2.93V YES ASM706T LOW 3.08V YES ASM706J LOW 4.00V YES ASM708R HIGH & LOW 2.63V NO ASM708S HIGH & LOW 2.93V NO ASM708T HIGH & LOW 3.08V NO ASM708J HIGH & LOW 4.00V NO watchdog timeout forces a RESET to be generated. monitors µP/µC activity. An output line on the processor is used to toggle the WDI line. If the line is not toggled within 1.6 seconds on the Watchdog Input (WDI), the internal timer puts the Watchdog Output (WDO) into a LOW state. WDO will remain LOW until a toggle is detected at WDI. The watchdog function is disabled, meaning it is cleared and not counting, if WDI is floated or connected to a three-stated circuit. The watchdog timer is also disabled if RESET is asserted. When RESET becomes inactive and the WDI input sees a high or low transition as short as 100ns (VCC = 2.7V)/ 3/3.3/4.0 V µP Supervisor Circuits Notice: The information in this document is subject to change without notice 5 of 16 ASM706 P/ R/ S/ T/ J ASM708 R/ S/ T/ J October 2003 rev 1.0 50ns (VCC = 4.5V), the watchdog timer will begin a 1.6 Application Information second countdown. Additional transitions at WDI will reset Bi-directional Reset Pin Interfacing the watchdog timer and initiate a new countdown sequence. The ASM706/8 can interface with µP/µC bi-directional reset WDO will also become LOW and remain so, whenever the pins by connecting a 4.7kΩ resistor in series with the RESET supply voltage, VCC, falls below the device threshold level. output and the µP/µC bi-directional reset pin. WDO goes HIGH as soon as VCC transitions above the threshold. There is no minimum pulse width for WDO as BUF Buffered RESET there is for the RESET outputs. If WDI is floated, WDO essentially acts as a low supply voltage output indicator. VCC Power-failure Detection With Auxiliary Comparator All devices have an auxiliary comparator with 1.25V trip point. The output, PFO, is active LOW and the noninverting input is PFI. This comparator can be used as a supply voltage Supply Voltage ASM70x µC or µP 4.7kΩ RESET monitor with an external resistor voltage divider. As the monitored voltage level falls, PFI is reduced causing the PFO RESET Input GND GND output to go LOW. Normally PFO interrupts the processor so the system can be shut down in a controlled manner. Bi-directional I/O Pin Figure 3: Bi-directional reset pin interfacing 0V Ensuring the RESET is Valid Down to VCC = 0V When VCC falls below 1.2V, the ASM706R/S/T/J and 708R/S/ T/J RESET reset outputs no longer pull down; it becomes indeterminate. To avoid the possibility that stray charges could build up and force RESET to the wrong state, a pulldown resistor should be connected to the RESET pin, thus draining such charges to ground. The resistor value is not critical. A100kΩ resistor will pull RESET to ground without loading it. Figure 2: Watchdog timing 3/3.3/4.0 V µP Supervisor Circuits Notice: The information in this document is subject to change without notice 6 of 16 ASM706 P/ R/ S/ T/ J ASM708 R/ S/ T/ J October 2003 rev 1.0 Monitoring Voltages Other Than VCC VIN The ASM706/708 can monitor voltages other than VCC using +5V the Power Fail circuitry. If a resistive divider is connected from the voltage to be monitored to the PFI input, the PFO will go LOW if the voltage at PFI goes below 1.25V reference. Should hysteresis be desired, connect a resistor (equal VCC R1 MR to approximately 10 times the sum of the two resistors in the divider) between the PFI and PFO pins. A capacitor between PFI and GND will reduce circuit sensitivity to input high frequency noise. If it is desired to assert a reset in addition to ASM70X PFO PFI R2 GND RESET To µP the PFO flag, this may be achieved by connecting the PFO output to MR. Figure 4: Monitoring +5V and an additional supply VIN Absolute Maximum Ratings Parameter Min Max Unit VCC -0.3 6.0 V All other inputs -0.3 VCC + 0.3 V Input Current at VCC and GND 20 mA Output Current: All outputs 20 mA Rate of Rise at VCC 100 V/µs Plastic DIP Power Dissipation (Derate 9mW/°C above 70°C) 700 mV SO Power Dissipation (Derate 5.9mW/°C above 70°C) 470 mW‘ MicroSO POwer Disspation (Derate 4.1mW/°C above 70°C) 330 mW Pin Terminal Voltage with Respect to Ground Operating Temperature Range ASM706xE, ASM708xE -40 +85 °C ASM706xC, ASM708xC 0 70 °C -65 160 °C 300 °C Storage Temperature Range Lead Temperature Soldering (10sec) Note: These are stress ratings only and functional operation is noy implied. Exposure to absolute maximum ratings for prolonged time periods may affect device reliability. 3/3.3/4.0 V µP Supervisor Circuits Notice: The information in this document is subject to change without notice 7 of 16 ASM706 P/ R/ S/ T/ J ASM708 R/ S/ T/ J October 2003 rev 1.0 Electrical Characteristics Unless otherwise noted, specifications are over the operating temperature range and VCC supply voltages are 2.7V to 5.5V (ASM706P, ASM708R), 3.0 V to 5.5V (ASM706/708S), 3.15V to 5.5V (ASM706/708T) and 4.1V to 5.5.V (ASM706/708J) Parameter Operating Voltage Range Symbol VCC Conditions Min ICC 1.1 5.5 ASM706xE, ASM708xE 1.2 5.5 75 ing ASM706xC, ASM706xE, MR = VCC, WDI FloatICC ing VRT V 140 50 140 75 140 µA ASM708xC, ASM708xE, MR = VCC, WDI Floating RESET Threshold Unit µA ASM708xC, ASM708xE, MR = VCC, WDI Floating Supply Current VCC < 5.5V Max ASM706xC, ASM708xC ASM706xC, ASM706xE, MR = VCC, WDI FloatSupply Current VCC < 3.6V Typ 50 140 P and R devices 2.55 2.63 2.70 S devices 2.85 2.93 3.00 T devices 3.00 3.08 3.15 J devices 3.89 4.00 4.10 RESET Threshold Hysteresis 40 V mV VCC = 3V (ASM706/8, P/R devices). RESET Pulse Width tRS VCC = 3.3V (ASM706/8, S/T devices). 140 tMR 280 ms VCC = 4.4V (ASM706/8, J devices). VCC = 5V MR Pulse Width 200 200 4.5V < VCC < 5.5V 150 3.6V < VCC < 4.5V (ASM706/8J devices) VRST (MAX) < VCC < 3.6V 500 ns (ASM706/8/P/R/S/T devices) MR to RESET Out Delay tMD 3.6V < VCC < 4.5V (AS706/8J devices) VRST (MAX) < VCC < 3.6V 750 ns (ASM706/8/P/R/S/T devices) 4.5V < VCC < 5.5V 3/3.3/4.0 V µP Supervisor Circuits Notice: The information in this document is subject to change without notice 250 8 of 16 ASM706 P/ R/ S/ T/ J ASM708 R/ S/ T/ J October 2003 rev 1.0 Parameter MR Input Threshold MR Pullup resistor RESET Output Voltage (All R/S/T/J devices) Symbol Conditions VIH VRST(MAX) < VCC < 4.5V VIL VRST(MAX) < VCC < 4.5V VIH 4.5V < VCC < 5.5V VIL 4.5V < VCC < 5.5V RP ISOURCE = 800µA, 4.5V < VCC < 5.5V VOL ISINK = 3.2mA, 4.5V < VCC < 5.5V VOH ISOURCE=500µA, VRST(MAX) < VCC < 4.5V VOL ISINK =1.2mA, VRST(MAX) < VCC < 4.5V Typ V 2.0 0.8 20 0.8VCC 0.3 RESET Output Voltage ASM708R/S/T/J ISINK = 3.2mA, 4.5V < VCC < 5.5V VOH ISOURCE=500µA, VRST(MAX) < VCC <3.6V VOL ISINK =1.2mA, VRST(MAX) < VCC < 3.6V VOH ISOURCE = 800µA, 4.5V < VCC < 5.5V VOL ISINK = 3.2mA, 4.5V < VCC < 5.5V VOH ISOURCE=500µA, VRST(MAX) < VCC < 4.5V VOL ISINK =1.2mA, VRST(MAX) < VCC < 4.5V V 0.3 0.3 ASM708xE devices) VOL kΩ 0.4 ISINK =100µA, VCC = 1.2V (ASM706xE, RESET Output Voltage ASM706P 40 VCC - 1.5 ASM708xC devices) ISOURCE = 800µA, 4.5V < VCC < 5.5V Unit 0.6 ISINK = 50µA, VCC = 1.1V (ASM706xC, VOH Max 0.7VCC 10 VOH VOL Min VCC - 1.5 0.4 V 0.8VCC 0.3 VCC - 1.5 0.4 V 0.8VCC 0.3 VCC = 3V (ASM706, P/R devices). Watchdog Timeout Period tWD VCC = 3.3V (ASM706 S/T devices). 1.0 1.6 2.25 s VCC = 4.4V (ASM706, J devices). VIL = 0.4V, VIH=0.8VCC, VRST(MAX) < VCC < 4.5V WDI Pulse Width tWP 100 ns VIL = 0.4V, VIH=0.8VCC, 4.5V < VCC < 5.5V 50 3/3.3/4.0 V µP Supervisor Circuits Notice: The information in this document is subject to change without notice 9 of 16 ASM706 P/ R/ S/ T/ J ASM708 R/ S/ T/ J October 2003 rev 1.0 Parameter Symbol VIH WDI Input Threshold Conditions VCC = 5V Min Typ 0.8 VRST(MAX) < VCC < 4.5V V 0.7VCC VIL 0.6 WDI = VCC, ASM706 only WDI Input Current WDI = 0V, ASM706 only WDO Output Voltage VOH ISOURCE = 800µA, 4.5V < VCC < 5.5V VOL ISINK = 1.2mA, 4.5V < VCC < 5.5V VOH ISOURCE=500µA, VRST(MAX) < VCC < 4.5V VOL ISINK =1.2mA, VRST(MAX) < VCC < 4.5V PFI falling. For P/R devices VCC = 3V. For S/T PFI Input Threshold devices VCC = 3.3V. For J devices VCC = 4.4V PFI Input Current PFO Output Voltage Unit 3.5 VIL VIH Max VOH ISOURCE = 800µA, 4.5V < VCC < 5.5V VOL ISINK = 3.2mA, 4.5V < VCC < 5.5V VOH ISOURCE=500µA, VRS(MAX) < VCC < 4.5V VOL ISINK =1.2mA, VRS(MAX) < VCC < 4.5V 50 -150 150 µA -50 VCC - 1.5 0.4 V 0.8VCC 0.3 1.2 1.25 1.3 V -25 0.01 25 nA VCC - 1.5 0.4 V 0.8VCC 3/3.3/4.0 V µP Supervisor Circuits Notice: The information in this document is subject to change without notice 0.3 10 of 16 ASM706 P/ R/ S/ T/ J ASM708 R/ S/ T/ J October 2003 rev 1.0 Package Dimensions MicroSO(8-pin) Inches Millimeters Min Max Min Max A - 0.0433 - 1.10 A1 0.0020 0.0059 0.050 0.15 A2 0.0295 0.0374 0.75 0.95 b 0.0098 0.0157 0.25 0.40 C 0.0051 0.0091 0.13 0.23 D 0.1142 0.1220 2.90 3.10 e 0.0256 0.65BS E 0.193B 4.90BS E1 0.1142 0.1220 2.90 3.10 L 0.0157 0.0276 0.40 0.70 a 0° 6° 0° 6° SO(8-pin) Inches Millimeters Min Max Min Max A 0.053 0.069 1.35 1.75 A1 0.004 0.010 0.10 0.25 B 0.013 0.020 0.33 0.51 C 0.007 0.010 0.19 0.25 e 0.050 E 0.150 0.157 1.27 3.80 4.00 H 0.228 0.244 5.80 6.20 L 0.016 0.50 0.40 1.27 D 0.189 0.197 4.80 2.00 3/3.3/4.0 V µP Supervisor Circuits Notice: The information in this document is subject to change without notice 11 of 16 ASM706 P/ R/ S/ T/ J ASM708 R/ S/ T/ J October 2003 rev 1.0 Plastic DIP(8-pin) Inches Millimeters Min Max Min Max A - A1 0.015 0.210 - 5.33 - 0.38 - A2 0.115 0.195 2.92 4.95 b 0.014 0.022 0.36 0.56 b2 0.045 0.070 1.14 1.78 b3 0.030 0.045 0.080 1.14 D 0.355 0.400 9.02 10.16 D1 0.005 - 0.13 - E 0.300 0.325 7.62 8.26 E1 0.240 0.280 6.10 7.11 e 0.100 - 2.54 eA 0.300 - 7.62 - 10.92 2.92 3.81 eB - 0.430 eC - 0.060 L 0.115 0.150 3/3.3/4.0 V µP Supervisor Circuits Notice: The information in this document is subject to change without notice 12 of 16 ASM706 P/ R/ S/ T/ J ASM708 R/ S/ T/ J October 2003 rev 1.0 Ordering Codes Part Number Package Operating Temperature Range (°C) Reset Threshold Reset Polarity Watchdog Timer ASM706PCPA 8- Plastic DIP 0 to +70 2.63 HIGH YES ASM706PCSA 8-SO 0 to +70 2.63 HIGH YES ASM706PCUA 8-MicroSO 0 to +70 2.63 HIGH YES ASM706PEPA 8-Plastic DIP -40 to +85 2.63 HIGH YES ASM706PESA 8-SO -40 to +85 2.63 HIGH YES ASM706RCPA 8- Plastic DIP 0 to +70 2.63 LOW YES ASM706RCSA 8-SO 0 to +70 2.63 LOW YES ASM706RCUA 8-MicroSO 0 to +70 2.63 LOW YES ASM706REPA 8-Plastic DIP -40 to +85 2.63 LOW YES ASM706RESA 8-SO -40 to +85 2.63 LOW YES ASM706SCPA 8- Plastic DIP 0 to +70 2.93 LOW YES ASM706SCSA 8-SO 0 to +70 2.93 LOW YES ASM706SCUA 8-MicroSO 0 to +70 2.93 LOW YES ASM706SEPA 8-Plastic DIP -40 to +85 2.93 LOW YES ASM706SESA 8-SO -40 to +85 2.93 LOW YES ASM706TCPA 8- Plastic DIP 0 to +70 3.08 LOW YES ASM706TCSA 8-SO 0 to +70 3.08 LOW YES ASM706TCUA 8-MicroSO 0 to +70 3.08 LOW YES ASM706TEPA 8-Plastic DIP -40 to +85 3.08 LOW YES ASM706TESA 8-SO -40 to +85 3.08 LOW YES ASM706JCPA 8- Plastic DIP 0 to +70 4.00 LOW YES ASM706JCSA 8-SO 0 to +70 4.00 LOW YES ASM706JCUA 8-MicroSO 0 to +70 4.00 LOW YES ASM706JEPA 8-Plastic DIP -40 to +85 4.00 LOW YES ASM706JESA 8-SO -40 to +85 4.00 LOW YES ASM708RCPA 8- Plastic DIP 0 to +70 2.63 Dual: HIGH & LOW NO ASM708RCSA 8-SO 0 to +70 2.63 Dual: HIGH & LOW NO ASM708RCUA 8-MicroSO 0 to +70 2.63 Dual: HIGH & LOW NO 3/3.3/4.0 V µP Supervisor Circuits Notice: The information in this document is subject to change without notice 13 of 16 ASM706 P/ R/ S/ T/ J ASM708 R/ S/ T/ J October 2003 rev 1.0 Part Number Package Operating Temperature Range (°C) Reset Threshold Reset Polarity Watchdog Timer ASM708REPA 8-Plastic DIP -40 to +85 2.63 Dual: HIGH & LOW NO ASM708RESA 8-SO -40 to +85 2.63 Dual: HIGH & LOW NO ASM708SCPA 8- Plastic DIP 0 to +70 2.93 Dual: HIGH & LOW NO ASM708SCSA 8-SO 0 to +70 2.93 Dual: HIGH & LOW NO ASM708SCUA 8-MicroSO 0 to +70 2.93 Dual: HIGH & LOW NO ASM708SEPA 8-Plastic DIP -40 to +85 2.93 Dual: HIGH & LOW NO ASM708SESA 8-SO -40 to +85 2.93 Dual: HIGH & LOW NO ASM708TCPA 8- Plastic DIP 0 to +70 3.08 Dual: HIGH & LOW NO ASM708TCSA 8-SO 0 to +70 3.08 Dual: HIGH & LOW NO ASM708TCUA 8-MicroSO 0 to +70 3.08 Dual: HIGH & LOW NO ASM708TEPA 8-Plastic DIP -40 to +85 3.08 Dual: HIGH & LOW NO ASM708TESA 8-SO -40 to +85 3.08 Dual: HIGH & LOW NO ASM708JCPA 8- Plastic DIP 0 to +70 4.00 Dual: HIGH & LOW NO ASM708JCSA 8-SO 0 to +70 4.00 Dual: HIGH & LOW NO ASM708JCUA 8-MicroSO 0 to +70 4.00 Dual: HIGH & LOW NO ASM708JEPA 8-Plastic DIP -40 to +85 4.00 Dual: HIGH & LOW NO ASM708JESA 8-SO -40 to +85 4.00 Dual: HIGH & LOW NO 3/3.3/4.0 V µP Supervisor Circuits Notice: The information in this document is subject to change without notice 14 of 16 ASM706 P/ R/ S/ T/ J ASM708 R/ S/ T/ J October 2003 rev 1.0 Feature Summary ASM706P ASM706R ASM706S ASM706 T ASM706J ASM708R ASM708S ASM708T ASM708J Power fail detector Brownout detection Debounced Manual RESET Power-up/ down RESET Watchdog Timer Active HIGH RESET 2.63 2.93 3.08 4.00 Active LOW RESET Active LOW and HIGH RESETs RESET Threshold (V) 2.63 2.63 2.93 3.08 4.00 3/3.3/4.0 V µP Supervisor Circuits Notice: The information in this document is subject to change without notice 15 of 16 ASM706 P/ R/ S/ T/ J ASM708 R/ S/ T/ J Alliance Semiconductor Corporation 2575, Augustine Drive, Santa Clara, CA 95054 Tel: 408 - 855 - 4900 Fax: 408 - 855 - 4999 www.alsc.com Copyright © Alliance Semiconductor All Rights Reserved Part Number: ASM706 P/ R/ S/ T/ J ASM708 R/ S/ T/ J Document Version: 1.0 © Copyright 2003 Alliance Semiconductor Corporation. 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