1CY54/74FCT377T Data sheet acquired from Cypress Semiconductor Corporation. Data sheet modified to remove devices not offered. CY54/74FCT377T 8-Bit Register SCCS023 - May1994 - Revised March 2000 Features • Clock Enable for address and data synchronization application • Eight edge-triggered D flip-flops • Extended commercial range of −40˚C to +85˚C • Function, pinout and drive compatible with FCT and F logic • FCT-C speed at 5.2 ns max. (Com’l) FCT-A speed at 7.2 ns max. (Com’l) • Reduced VOH (typically = 3.3V) versions of equivalent FCT functions • Edge-rate control circuitry for significantly improved noise characteristics • Power-off disable feature • Matched rise and fall times • ESD > 2000V • Fully compatible with TTL input and output logic levels • Sink Current 64 mA (Com’l), 32 mA (Mil) Source Current 32 mA (Com’l), 12 mA (Mil) Functional Description The FCT377T has eight triggered D-type flip-flops with individual D inputs. The common buffered clock inputs (CP) loads all flip-flops simultaneously when the Clock Enable (CE) is LOW. The register is fully edge-triggered. The state of each D input, one set-up time before the LOW-to-HIGH clock transition, is transferred to the corresponding flip-flop’s O output. The CE input must be stable only one set-up time prior to the LOW-to-HIGH clock transition for predictable operation. The outputs are designed with a power-off disable feature to allow for live insertion of boards. Logic Block Diagram D0 D1 D2 D3 D4 D5 D6 D7 CE D Q D CP Q D CP Q D CP Q D CP Q D CP Q D CP Q D CP Q CP CP O0 O1 O2 O3 D4 1 20 VCC O0 2 19 O7 D0 3 18 D7 D1 4 17 D6 O0 CE VCC O1 5 16 O6 O2 6 15 O5 D2 7 14 D5 O7 D3 8 13 D4 O3 9 12 O4 GND 10 11 CP 7 6 5 4 3 2 1 20 19 12 13 14 1516 17 18 D5 O5 O6 D6 D7 GND CP O4 CE D2 O2 O1 D1 D3 8 O6 O7 SOIC/QSOP Top View LCC Top View 9 10 11 O5 Logic Symbol Pin Configurations O3 O4 D0 D0 CP D1 D2 D3 D4 D5 D6 D7 O1 O2 O3 O4 O5 O6 O7 CE O0 Copyright © 2000, Texas Instruments Incorporated CY54/74FCT377T Supply Voltage to Ground Potential ............... –0.5V to +7.0V Function Table[1] Operating Mode Inputs CP DC Input Voltage ........................................... –0.5V to +7.0V Outputs DC Output Voltage......................................... –0.5V to +7.0V CE D O Load “1” l h H Load “0“ l l L Hold h H X X No Change No Change X DC Output Current (Maximum Sink Current/Pin) ...... 120 mA Power Dissipation .......................................................... 0.5W Static Discharge Voltage............................................>2001V (per MIL-STD-883, Method 3015) Operating Range Maximum Ratings[2, 3] (Above which the useful life may be impaired. For user guidelines, not tested.) Range Storage Temperature .................................–65°C to +150°C Ambient Temperature with Power Applied......................................–65°C to +135°C Range Ambient Temperature VCC Commercial All –40°C to +85°C 5V ± 5% Military[4] All –55°C to +125°C 5V ± 10% Electrical Characteristics Over the Operating Range Parameter VOH Description Output HIGH Voltage VOL Output LOW Voltage Test Conditions Min. Typ.[5] Unit Com’l 2.0 V VCC=Min., IOH=–15 mA Com’l 2.4 3.3 V VCC=Min., IOH=–12 mA Mil 2.4 3.3 V VCC=Min., IOL=64 mA Com’l 0.3 0.55 V VCC=Min., IOL=32 mA Mil 0.3 0.55 V VIH Input HIGH Voltage VIL Input LOW Voltage VH Hysteresis[6] All inputs 0.2 VIK Input Clamp Diode Voltage VCC=Min., IIN=–18 mA –0.7 II Input HIGH Current IIH Input HIGH Current IIL Input LOW Current VCC=Max., VIN=0.5V IOS Output Short Circuit Current[7] VCC=Max., VOUT=0.0V IOFF 2.0 V Power-Off Disable VCC=0V., VOUT=4.5V 0.8 V V –1.2 V VCC=Max., VIN=VCC 5 µA VCC=Max., VIN=2.7V ±1 µA Notes: 1. H h L l X Z 2. 3. 4. 5. 6. 7. Max. VCC=Min., IOH=–32 mA –60 –120 ±1 µA –225 mA ±1 µA = HIGH Voltage Level = HIGH Voltage Level one set-up time prior to the LOW-to-HIGH Clock Transition = LOW Voltage Level = LOW Voltage Level one set-up time prior to the LOW-to-HIGH Clock Transition = Don’t Care = HIGH Impedance = LOW-to-HIGH clock transition Unless otherwise noted, these limits are over the operating free-air temperature range. Unused inputs must always be connected to an appropriate logic voltage level, preferably either VCC or ground. TA is the “instant on” case temperature. Typical values are at VCC=5.0V, TA=+25˚C ambient. This parameter is specified but not tested. Not more than one output should be shorted at a time. Duration of short should not exceed one second. The use of high-speed test apparatus and/or sample and hold techniques are preferable in order to minimize internal chip heating and more accurately reflect operational values. Otherwise prolonged shorting of a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parametric tests. In any sequence of parameter tests, IOS tests should be performed last. 2 CY54/74FCT377T Capacitance[2] Parameter Description Typ.[5] Max. Unit CIN Input Capacitance 5 10 pF COUT Output Capacitance 9 12 pF Power Supply Characteristics Parameter ICC Description Quiescent Power Supply Current Test Conditions VCC=Max., VIN≤0.2V, VIN ≥ VCC–0.2V Typ.[5] Max. Unit 0.1 0.2 mA ∆ICC Quiescent Power Supply Current (TTL inputs HIGH) VCC=Max., VIN=3.4V, f1=0, Outputs Open 0.5 2.0 mA ICCD Dynamic Power Supply Current[9] VCC=Max., One Bit Toggling, 50% Duty Cycle, Outputs Open, CE=GND, VIN ≤ 0.2V or VIN ≥ VCC–0.2V 0.06 0.12 mA/MHz IC Total Power Supply Current[10] VCC=Max., f0=10 MHz, 50% Duty Cycle, Outputs Open, One Bit Toggling at f1=5 MHz, CE=GND, VIN≤0.2V or VIN ≥ VCC–0.2V 0.7 1.4 mA VCC=Max., f0=10 MHz, 50% Duty Cycle, Outputs Open, One Bit Toggling at f1=5 MHz, CE=GND, VIN=3.4V or VIN=GND 1.2 3.4 mA VCC=Max., f0=10 MHz, 50% Duty Cycle, Outputs Open, Eight Bits Toggling at f1=2.5 MHz, CE=GND, VIN≤0.2V or VIN≥VCC–0.2V 1.6 3.2[11] mA VCC=Max., f0=10 MHz, 50% Duty Cycle, Outputs Open, Eight Bits Toggling at f1=2.5 MHz, CE=GND, VIN=3.4V or VIN=GND 3.9 12.2[11] mA [8] Notes: 8. Per TTL driven input (VIN=3.4V); all other inputs at VCC or GND. 9. This parameter is not directly testable, but is derived for use in Total Power Supply calculations. = IQUIESCENT + IINPUTS + IDYNAMIC 10. IC IC = ICC+∆ICCDHNT+ICCD(f0/2 + f1N1) ICC = Quiescent Current with CMOS input levels ∆ICC = Power Supply Current for a TTL HIGH input (VIN=3.4V) DH = Duty Cycle for TTL inputs HIGH NT = Number of TTL inputs at DH ICCD = Dynamic Current caused by an input transition pair (HLH or LHL) = Clock frequency for registered devices, otherwise zero f0 = Input signal frequency f1 = Number of inputs changing at f1 N1 All currents are in milliamps and all frequencies are in megahertz. 11. Values for these conditions are examples of the ICC formula. These limits are specified but not tested. 3 CY54/74FCT377T Switching Characteristics Over the Operating Range[12, 13] FCT377T FCT377AT Commercial Parameter Description Military Commercial Min. Max. Min. Max. Min. Max. Unit Fig. No.[14] 13.0 2.0 8.3 2.0 7.2 ns 1, 5 tPLH tPHL Propagation Delay Clock to Output 2.0 tS Set-Up Time HIGH or LOW Data to CP 2.0 2.0 2.0 ns 4 tH Hold Time HIGH or LOW Data to CP 1.5 1.5 1.5 ns 4 tW Set-Up Time HIGH or LOW CE to CP 3.5 3.5 3.5 ns 4 tW Set-Up Time HIGH or LOW CE to CP 1.5 1.5 1.5 ns 4 tW Clock Pulse Width[15] HIGH or LOW 6.0 7.0 6.0 ns 6 FCT377CT Military Parameter Description Commercial Min. Max. Min. Max. Unit Fig. No.[14] 5.5 2.0 5.2 ns 1, 5 tPLH tPHL Propagation Delay Clock to Output 2.0 tS Set-Up Time, HIGH or LOW, Data to CP 2.0 2.0 ns 4 tH Hold Time, HIGH or LOW, Data to CP 1.5 1.5 ns 4 tW Set-Up Time, HIGH or LOW, CE to CP 3.5 3.5 ns 4 tW Set-Up Time HIGH or LOW, CE to CP 1.5 1.5 ns 4 7.0 6.0 ns 6 tW Clock Pulse Width[15] HIGH or LOW Notes: 12. AC Characteristics specified with CL=50 pF as shown in Figure 1 of the “Parameter Measurement Information” in the General Information section. 13. Minimum limits are specified but not tested on Propagation Delays. 14. See “Parameter Measurement Information” in the General Information section. 15. With one data channel toggling, tW(L)=tW(H)=4.0 ns and tr=tf=1.0 ns. Ordering Information—FCT377T Speed (ns) 5.2 Ordering Code CY74FCT377CTQCT Package Name Package Type Q5 20-Lead (150-Mil) QSOP Operating Range Commercial CY74FCT377CTSOC/SOCT S5 20-Lead (300-Mil) Molded SOIC 5.5 CY54FCT377CTLMB L61 20-Pin Square Leadless Chip Carrier Military 7.2 CY74FCT377ATQCT Q5 20-Lead (150-Mil) QSOP Commercial CY74FCT377ATSOC/SOCT S5 20-Lead (300-Mil) Molded SOIC 8.3 CY54FCT377TLMB L61 20-Pin Square Leadless Chip Carrier Military 13.0 CY74FCT377TQCT Q5 20-Lead (150-Mil) QSOP Commercial Document #: 38-00279-B 4 CY54/74FCT377T Package Diagrams 20-Pin Square Leadless Chip Carrier L61 MIL–STD–1835 C–2A 20-Lead Quarter Size Outline Q5 5 CY54/74FCT377T Package Diagrams (continued) 20-Lead (300-Mil) Molded SOIC S5 6 IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. 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