ACS780xLR High-Precision Linear Hall-Effect-Based Current Sensor IC With 200 µΩ Current Conductor FEATURES AND BENEFITS ▪ Core-less, micro-sized, 100 A continuous current package ▪ Ultra-low power loss: 200 µΩ internal conductor resistance ▪ Immunity to common-mode field interference ▪ Greatly improved total output error through digitally programmed and compensated gain and offset over the full operating temperature range ▪ Industry-leading noise performance through proprietary amplifier and filter design techniques ▪ Integrated shield greatly reduces capacitive coupling from current conductor to die due to high dV/dt signals, and prevents offset drift in high-side, high-voltage applications ▪ Monolithic Hall IC for high reliability ▪ 4.5 to 5.5 V, single supply operation ▪ 120 kHz typical bandwidth ▪ 3.6 µs output rise time in response to step input current ▪ Output voltage proportional to AC or DC currents ▪ Factory-trimmed for accuracy ▪ Extremely stable quiescent output voltage ▪ AEC-Q100 automotive qualification DESCRIPTION The Allegro ACS780xLR is a fully integrated current sensor linear IC in a new core-less package designed to sense AC and DC currents up to 100 A. This automotive-grade, low-profile (1.5 mm thick) sensor IC package has a very small footprint. The Hall sensor technology also incorporates common-mode field rejection to optimize performance in the presence of interfering magnetic fields generated by nearby current-carrying conductors. The device consists of a precision, low-offset linear Hall circuit with a copper conduction path located near the die. Applied current flowing through this copper conduction path generates a magnetic field which the Hall IC converts into a proportional voltage. Device accuracy is optimized through the close proximity of the primary conductor to the Hall transducer and factory programming of the sensitivity and quiescent output voltage at the Allegro factory. Chopper-stabilized signal path and digital temperature compensation technology also contribute to the stability of the device across the operating temperature range. High-level immunity to current conductor dV/dt and stray electric fields is offered by Allegro proprietary integrated shield technology, for low-output voltage ripple and low-offset drift in high-side, high-voltage applications. PACKAGE: 7-pin PSOF package (suffix LR) The output of the device has a positive slope (>VCC / 2) when an increasing current flows through the primary copper conduction Continued on the next page… Not to scale ACS780xLR 5 IP+ IP VOUT GND 6 IP– VCC 3 RF VOUT CF 2 1 CBYP 0.1 µF 5V Typical Application Application 1: The ACS780xLR outputs an analog signal, VOUT , that varies linearly with the bidirectional AC or DC primary current, IP , within the range specified. CF is for optimal noise management, with values that depend on the application. ACS780xLR-DS High-Precision Linear Hall-Effect-Based Current Sensor IC With 200 µΩ Current Conductor ACS780xLR DESCRIPTION (CONTINUED) path (from terminal 5 to terminal 6), which is the path used for current sampling. The internal resistance of this conductive path is 200 µΩ typical, providing low power loss. The thickness of the copper conductor allows survival of the device at high overcurrent conditions. The terminals of the conductive path are electrically isolated from the signal leads (pins 1 through 4, and 7), allowing the device to operate safely with voltages up to 100 V peak on the primary conductor. The device is fully calibrated prior to shipment from the factory. The ACS780xLR family is lead (Pb) free. All leads are plated with 100% matte tin, and there is no Pb inside the package. The heavy gauge leadframe is made of oxygen-free copper. Selection Guide Part Number Sensed Current Direction Primary Sampled Current, IP (A) Sensitivity Sens (Typ.) (mV/A) ACS780LLRTR-050B-T Bidirectional ±50 40. ACS780LLRTR-050U-T Unidirectional 0 to 50 60. ACS780LLRTR-100B-T Bidirectional ±100 20. ACS780LLRTR-100U-T Unidirectional 0 to 100 40. ACS780KLRTR-150B-T Bidirectional ±150 transient ±100 continuous 13.33 ACS780KLRTR-150U-T Unidirectional 0 to 150 transient 0 to 100 continuous 26.66 1 Contact Allegro TOP (°C) Packing1 –40 to 150 Tape and reel –40 to 125 for additional packing options. Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 2 High-Precision Linear Hall-Effect-Based Current Sensor IC With 200 µΩ Current Conductor ACS780xLR SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS Characteristic Symbol Notes Rating Unit Forward Supply Voltage VCC 6 V Reverse Supply Voltage VRCC –0.5 V Forward Output Voltage VOUT 25 V Reverse Output Voltage VRIOUT –0.5 V Output Source Current IOUT(Source) VOUT to GND 2.8 mA Minimum pull-up resistor of 500 Ω 10 mA Range K –40 to 125 ºC Range L –40 to 150 ºC TJ(max) 165 ºC Tstg –65 to 165 ºC Output Sink Current Nominal Operating Ambient Temperature Maximum Junction Storage Temperature IOUT(Sink) TOP THERMAL CHARACTERISTICS: May require derating at maximum conditions Characteristic Package Thermal Resistance Symbol RθJA Test Conditions* Value Unit Mounted on the Allegro evaluation board ASEK780 85-0807-001 with FR4 substrate and 8 layers of 2 oz. copper (with an area of 1530 mm2 per layer) connected to the primary leadframe and with thermal vias connecting the copper layers. Performance is based on current flowing through the primary leadframe and includes the power consumed by the PCB. 18 ºC/W Rating Unit *Additional thermal information available on the Allegro website TYPICAL OVERCURRENT CAPABILITIES 1,2 Characteristic Overcurrent Symbol IPOC Notes TA = 25°C, 1 s on time, 60 s off time 285 A TA = 85°C, 1 s on time, 35 s off time 225 A TA = 125°C, 1 s on time, 30 s off time 170 A TA = 150°C, 1 s on time, 10 s off time 95 A 1 Test 2 For was done with Allegro evaluation board (85-0807-001). The maximum allowed current is limited by TJ(max) only. more overcurrent profiles, please see FAQ on the Allegro website, www.allegromicro.com. Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 3 High-Precision Linear Hall-Effect-Based Current Sensor IC With 200 µΩ Current Conductor ACS780xLR IP+ VCC ACS780xLR Master Current Supply To all subcircuits EEPROM and Control Logic Temperature Sensor Hall Current Drive Dynamic Offset Cancellation Sensitivity Control Programming Control Offset Control VOUT Tuned Filter Amp GND IP– Functional Block Diagram IP+ 5 NC 4 Terminal List Table 3 VOUT 2 GND IP– 6 7 NC 1 VCC Pinout Diagram Number Name 1 VCC Device power supply terminal Description 2 GND Signal ground terminal 3 VOUT Analog output signal 4 NC No connection, connect to GND for optimal ESD performance 5 IP+ Terminal for current being sampled 6 IP– Terminal for current being sampled 7 NC No connection, connect to GND for optimal ESD performance Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 4 High-Precision Linear Hall-Effect-Based Current Sensor IC With 200 µΩ Current Conductor ACS780xLR COMMON OPERATING CHARACTERISTICS* valid at TOP = –40°C to 150°C and VCC = 5 V, unless otherwise specified Characteristic Supply Voltage Symbol Test Conditions VCC Supply Current ICC Output open Power-On Time tPO TA = 25°C, CBYPASS = Open, CL = 1 nF Undervoltage Lockout (UVLO) Threshold UVLO Enable/Disable Delay Time Power-On Reset Voltage Power-On Reset Release Time Supply Zener Clamp Voltage Internal Bandwidth Min. Typ. Max. Unit 4.5 5.0 5.5 V – 11 15 mA – 130 – µs VUVLOH TA = 25°C, VCC rising and device function enabled – 4 – V VUVLOL TA = 25°C, VCC falling and device function disabled – 3.5 – V tUVLOE TA = 25°C, CBYPASS = Open, CL = 1 nF, VCC Fall Time (5 V to 3 V) = 1.5 µs – 64 – µs tUVLOD TA = 25°C, CBYPASS = Open, CL = 1 nF, VCC Recover Time (3 V to 5 V) = 1.5 µs – 7 – µs VPORH TA = 25°C, VCC rising – 2.9 – V VPORL TA = 25°C, VCC falling – 2.5 – V tPORR TA = 25°C, VCC rising – 64 – µs Vz BWi TA = 25°C, ICC = 30 mA 6.5 7.5 – V Small signal –3 dB, CL = 1 nF, TA = 25°C – 120 – kHz Chopping Frequency fC TA = 25°C – 500 – kHz Oscillator Frequency fOSC TA = 25°C – 8 – MHz OUTPUT CHARACTERISTICS Propagation Delay Time tpd TA = 25°C, CL = 1 nF – 2.5 – µs Rise Time tr TA = 25°C, CL = 1 nF – 3 – µs tRESPONSE TA = 25°C, CL = 1 nF – 3.6 – µs VSAT(HIGH) TA = 25°C, RLOAD = 10 kΩ to GND 4.7 – – V VSAT(LOW) TA = 25°C, RLOAD = 10 kΩ to VCC – – 400 mV RL =4.7 kΩ from VOUT to GND, VOUT = VCC / 2 – <1 – Ω Response Time Output Saturation Voltage DC Output Resistance Output Load Resistance Output Load Capacitance Primary Conductor Resistance Quiescent Output Voltage Ratiometry Quiescent Output Voltage Error Ratiometry Sensitivity Error Common-Mode Magnetic Field Rejection ROUT RL(PULLUP) VOUT to VCC 4.7 – – kΩ RL(PULLDWN) VOUT to GND 4.7 – – kΩ CL VOUT to GND – 1 10 nF RPRIMARY TA = 25°C – 200 – µΩ VOUT(QBI) IP = 0 A, TA = 25°C – VCC/2 – V VOUT(QU) Unidirectional variant, IP = 0 A, TA = 25°C – VCC × 0.1 – V RatERRVOUT(Q) Through supply voltage range (relative to VCC = 5 V) – 0 – % RatERRSens Through supply voltage range (relative to VCC = 5 V) – < ±0.5 – % Magnetic field perpendicular to Hall plates – –35 – dB CMFR *Device is factory-trimmed at 5 V, for optimal accuracy. Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 5 High-Precision Linear Hall-Effect-Based Current Sensor IC With 200 µΩ Current Conductor ACS780xLR X050B PERFORMANCE CHARACTERISTICS1: Characteristic Primary Sampled Current Noise 4 Nonlinearity Electric Offset Voltage Over Lifetime 3 Total Output Error Total Output Error Including Lifetime Drift 7 Min. Typ. Max. Unit –50 – 50 A Measured using 50% of full scale IP , TA = 25°C 38.7 40 41.3 mV/A Sens(TOP)HT Measured using 50% of full scale IP , TOP = 25°C to 150°C 38.7 40 41.3 mV/A Sens(TOP)LT Measured using 50% of full scale IP , TOP = –40°C to 25°C VNOISEPP INOISE ELIN VOE(TA) Electrical Offset Voltage 5,6 Test Conditions IP SensTA Sensitivity 2 TOP = –40°C to 150°C, VCC = 5 V, unless otherwise specified Symbol 38.5 40 41.5 mV/A Peak-to-peak, TA= 25°C, 1 nF on VOUT pin to GND – 36 – mV Input referred – 0.4 – mARMS /√(Hz) Measured at VOUT around 3.5 V and 4.5 V –1 – 1 % IP = 0 A, TA = 25°C –10 ±3 10 mV VOE(TOP)HT IP = 0 A, TOP = 25°C to 150°C –10 ±5 10 mV VOE(TOP)LT IP = 0 A, TOP = –40°C to 25°C –20 ±10 20 mV ΔVOE(LIFE) TOP = –40°C to 150°C, estimated shift after AEC-Q100 grade 0 qualification testing – ±1 – mV ETOT(HT) Measured using 50% of full scale IP , TOP = 25°C to 150°C –3.25 ±0.8 3.25 % ETOT(LT) Measured using 50% of full scale IP , TOP = –40°C to 25°C –3.75 ±1.5 3.75 % ETOT(HT,LIFE) Measured using 50% of full scale IP , TOP = 25°C to 150°C –4.1 ±2.28 4.1 % ETOT(LT,LIFE) Measured using 50% of full scale IP , TOP = –40°C to 25°C –5.6 ±2.98 5.6 % 1 See Characteristic Performance Data page for parameter distributions over temperature range. parameter may drift a maximum of ΔSensLIFE over lifetime. 3 Based on characterization data obtained during standardized stress test for Qualification of Integrated Circuits, including Package Hysteresis. Cannot be guaranteed. Drift is a function of customer application conditions. Please contact Allegro MicroSystems for further information. 4 ±3 sigma noise voltage. 5 Drift is referred to ideal V OUT(QBI) = 2.5 V. 6 This parameter may drift a maximum of ΔV OE(LIFE) over lifetime. 7 The maximum drift of any single device during qualification testing was 4%. 2 This Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 6 High-Precision Linear Hall-Effect-Based Current Sensor IC With 200 µΩ Current Conductor ACS780xLR X050U PERFORMANCE CHARACTERISTICS 1: Characteristic Primary Sampled Current Symbol Noise 4 Nonlinearity Electric Offset Voltage Over Lifetime 3 Total Output Error Total Output Error Including Lifetime Drift 7 Min. Typ. Max. Units 0 – 50 A Measured using 50% of full scale IP , TA = 25°C 58.1 60 61.95 mV/A Sens(TOP)HT Measured using 50% of full scale IP , TOP = 25°C to 150°C 58.05 60 61.95 mV/A Sens(TOP)LT Measured using 50% of full scale IP , TOP = –40°C to 25°C 57.75 60 62.25 mV/A – 54 – mV – mARMS /√(Hz) VNOISEPP INOISE ELIN Peak-to-peak, TA= 25°C, 1 nF on VOUT pin to GND Input referred – 0.4 Measured at VOUT around 3.5 V and 4.5 V –1 – 1 % IP = 0 A, TA = 25°C –10 ±3 10 mV VOE(TOP)HT IP = 0 A, TOP = 25°C to 150°C –10 ±5 10 mV VOE(TOP)LT IP = 0 A, TOP = –40°C to 25°C –20 ±10 20 mV ΔVOE(LIFE) TOP = –40°C to 150°C, estimated shift after AEC-Q100 grade 0 qualification testing – ±1 – mV VOE(TA) Electrical Offset Voltage 5,6 Test Conditions IP SensTA Sensitivity 2 TOP = –40°C to 150°C, VCC = 5 V, unless otherwise specified ETOT(HT) Measured using 50% of full scale IP , TOP = 25°C to 150°C –3.25 ±0.8 3.25 % ETOT(LT) Measured using 50% of full scale IP , TOP = –40°C to 25°C –3.75 ±1.5 3.75 % ETOT(HT,LIFE) Measured using 50% of full scale IP , TOP = 25°C to 150°C –4.1 ±2.28 4.1 % ETOT(LT,LIFE) Measured using 50% of full scale IP , TOP = –40°C to 25°C –5.6 ±2.98 5.6 % 1 See Characteristic Performance Data page for parameter distributions over temperature range. parameter may drift a maximum of ΔSensLIFE over lifetime. 3 Based on characterization data obtained during standardized stress test for Qualification of Integrated Circuits, including Package Hysteresis. Cannot be guaranteed. Drift is a function of customer application conditions. Please contact Allegro MicroSystems for further information. 4 ±3 sigma noise voltage. 5 Drift is referred to ideal V OUT(QU) = 0.5 V. 6 This parameter may drift a maximum of ΔV OE(LIFE) over lifetime. 7 The maximum drift of any single device during qualification testing was 4%. 2 This Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 7 High-Precision Linear Hall-Effect-Based Current Sensor IC With 200 µΩ Current Conductor ACS780xLR X100B PERFORMANCE CHARACTERISTICS1: Characteristic Primary Sampled Current Symbol Noise 4 Nonlinearity Electric Offset Voltage Over Lifetime 3 Total Output Error Total Output Error Including Lifetime Drift 7 Min. Typ. Max. Unit –100 – 100 A Measured using 33% of full scale IP , TA = 25°C 19.4 20 20.65 mV/A Sens(TOP)HT Measured using 33% of full scale IP , TOP = 25°C to 150°C 19.35 20 20.65 mV/A Sens(TOP)LT Measured using 33% of full scale IP , TOP = –40°C to 25°C 19.25 20 20.75 mV/A – 18 – mV – mARMS /√(Hz) VNOISEPP INOISE ELIN Peak-to-peak, TA= 25°C, 1 nF on VOUT pin to GND Input referred – 0.4 Measured at VOUT around 3.5 V and 4.5 V –1 – 1 % IP = 0 A, TA = 25°C –10 ±3 10 mV VOE(TOP)HT IP = 0 A, TOP = 25°C to 150°C –10 ±5 10 mV VOE(TOP)LT IP = 0 A, TOP = –40°C to 25°C –20 ±10 20 mV ΔVOE(LIFE) TOP = –40°C to 150°C, estimated shift after AEC-Q100 grade 0 qualification testing – ±1 – mV VOE(TA) Electrical Offset Voltage 5,6 Test Conditions IP SensTA Sensitivity 2 TOP = –40°C to 150°C, VCC = 5 V, unless otherwise specified ETOT(HT) Measured using 33% of full scale IP , TOP = 25°C to 150°C –3.25 ±0.8 3.25 % ETOT(LT) Measured using 33% of full scale IP , TOP = –40°C to 25°C –3.75 ±1.5 3.75 % ETOT(HT,LIFE) Measured using 33% of full scale IP , TOP = 25°C to 150°C –4.1 ±2.28 4.1 % ETOT(LT,LIFE) Measured using 33% of full scale IP , TOP = –40°C to 25°C –5.6 ±2.98 5.6 % 1 See Characteristic Performance Data page for parameter distributions over temperature range. parameter may drift a maximum of ΔSensLIFE over lifetime. 3 Based on characterization data obtained during standardized stress test for Qualification of Integrated Circuits, including Package Hysteresis. Cannot be guaranteed. Drift is a function of customer application conditions. Please contact Allegro MicroSystems for further information. 4 ±3 sigma noise voltage. 5 Drift is referred to ideal V OUT(QBI) = 2.5 V. 6 This parameter may drift a maximum of ΔV OE(LIFE) over lifetime. 7 The maximum drift of any single device during qualification testing was 4%. 2 This Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 8 High-Precision Linear Hall-Effect-Based Current Sensor IC With 200 µΩ Current Conductor ACS780xLR X100U PERFORMANCE CHARACTERISTICS1: Characteristic Primary Sampled Current Symbol Noise 4 Nonlinearity Electric Offset Voltage Over Lifetime 3 Total Output Error Total Output Error Including Lifetime Drift 7 Min. Typ. Max. Units 0 – 100 A Measured using 33% of full scale IP , TA = 25°C 38.7 40 41.3 mV/A Sens(TOP)HT Measured using 33% of full scale IP , TOP = 25°C to 150°C 38.7 40 41.3 mV/A Sens(TOP)LT Measured using 33% of full scale IP , TOP = –40°C to 25°C 38.5 40 41.5 mV/A – 36 – mV – mARMS /√(Hz) VNOISEPP INOISE ELIN Peak-to-peak, TA= 25°C, 1 nF on VOUT pin to GND Input referred – 0.4 Measured at VOUT around 3.5 V and 4.5 V –1 – 1 % IP = 0 A, TA = 25°C –10 ±3 10 mV VOE(TOP)HT IP = 0 A, TOP = 25°C to 150°C –10 ±5 10 mV VOE(TOP)LT IP = 0 A, TOP = –40°C to 25°C –20 ±10 20 mV ΔVOE(LIFE) TOP = –40°C to 150°C, estimated shift after AEC-Q100 grade 0 qualification testing – ±1 – mV VOE(TA) Electrical Offset Voltage 5,6 Test Conditions IP SensTA Sensitivity 2 TOP = –40°C to 150°C, VCC = 5 V, unless otherwise specified ETOT(HT) Measured using 33% of full scale IP , TOP = 25°C to 150°C –3.25 ±0.8 3.25 % ETOT(LT) Measured using 33% of full scale IP , TOP = –40°C to 25°C –3.75 ±1.5 3.75 % ETOT(HT,LIFE) Measured using 33% of full scale IP , TOP = 25°C to 150°C –4.1 ±2.28 4.1 % ETOT(LT,LIFE) Measured using 33% of full scale IP , TOP = –40°C to 25°C –5.6 ±2.98 5.6 % 1 See Characteristic Performance Data page for parameter distributions over temperature range. parameter may drift a maximum of ΔSensLIFE over lifetime. 3 Based on characterization data obtained during standardized stress test for Qualification of Integrated Circuits, including Package Hysteresis. Cannot be guaranteed. Drift is a function of customer application conditions. Please contact Allegro MicroSystems for further information. 4 ±3 sigma noise voltage. 5 Drift is referred to ideal V OUT(QU) = 0.5 V. 6 This parameter may drift a maximum of ΔV OE(LIFE) over lifetime. 7 The maximum drift of any single device during qualification testing was 4%. 2 This Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 9 High-Precision Linear Hall-Effect-Based Current Sensor IC With 200 µΩ Current Conductor ACS780xLR X150B PERFORMANCE CHARACTERISTICS1: Characteristic Primary Sampled Current IP SensTA Sensitivity 2 Noise 4 Nonlinearity Electric Offset Voltage Over Lifetime 3 Total Output Error Total Output Error Including Lifetime Drift 7 Min. Typ. Max. Unit Transient Test Conditions –150 – 150 A Continuous –100 – 100 A Measured using 25% of full scale IP , TA = 25°C 12.9 13.33 13.76 mV/A Sens(TOP)HT Measured using 25% of full scale IP , TOP = 25°C to 125°C 12.9 13.33 13.76 mV/A Sens(TOP)LT Measured using 25% of full scale IP , TOP = –40°C to 25°C 12.83 13.33 13.83 mV/A – 12 – mV – mARMS /√(Hz) VNOISEPP INOISE ELIN Peak to peak, TA= 25°C, 1 nF on VOUT pin to GND Input referred – 0.4 Measured at VOUT around 3.5 V and 4.5 V –1 – 1 % IP = 0 A, TA = 25°C –10 ±3 10 mV VOE(TOP)HT IP = 0 A, TOP = 25°C to 125°C –10 ±5 10 mV VOE(TOP)LT IP = 0 A, TOP = –40°C to 25°C –20 ±10 20 mV ΔVOE(LIFE) TOP = –40°C to 125°C, estimated shift after AEC-Q100 grade 0 qualification testing – ±1 – mV ±0.8 3.25 % VOE(TA) Electrical Offset Voltage 5,6 TOP = –40°C to 125°C, VCC = 5 V, unless otherwise specified Symbol ETOT(HT) Measured using 25% of full scale IP , TOP = 25°C to 125°C –3.25 ETOT(LT) Measured using 25% of full scale IP , TOP = –40°C to 25°C –3.75 ±1.5 3.75 % ETOT(HT,LIFE) Measured using 25% of full scale IP , TOP = 25°C to 125°C –4.1 ±2.28 4.1 % ETOT(LT,LIFE) Measured using 25% of full scale IP , TOP = –40°C to 25°C –5.6 ±2.98 5.6 % 1 See Characteristic Performance Data page for parameter distributions over temperature range. parameter may drift a maximum of ΔSensLIFE over lifetime. 3 Based on characterization data obtained during standardized stress test for Qualification of Integrated Circuits, including Package Hysteresis. Cannot be guaranteed. Drift is a function of customer application conditions. Please contact Allegro MicroSystems for further information. 4 ±3 sigma noise voltage. 5 Drift is referred to ideal V OUT(QBI) = 2.5 V. 6 This parameter may drift a maximum of ΔV OE(LIFE) over lifetime. 7 The maximum drift of any single device during qualification testing was 4%. 2 This Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 10 High-Precision Linear Hall-Effect-Based Current Sensor IC With 200 µΩ Current Conductor ACS780xLR X150U PERFORMANCE CHARACTERISTICS1: Characteristic Primary Sampled Current Symbol IP Noise 4 Nonlinearity Electric Offset Voltage Over Lifetime 3 Total Output Error Total Output Error Including Lifetime Drift 7 Typ. Max. Units 0 – 150 A 0 – 100 A 26.66 27.53 mV/A Sens(TOP)HT Measured using 25% of full scale IP , TOP = 25°C to 125°C 25.79 26.66 27.53 mV/A Sens(TOP)LT Measured using 25% of full scale IP , TOP = –40°C to 25°C VNOISEPP INOISE ELIN Continuous Min. 25.8 VOE(TA) Electrical Offset Voltage 5,6 Test Conditions Transient Measured using 25% of full scale IP , TA = 25°C SensTA Sensitivity 2 TOP = –40°C to 125°C, VCC = 5 V, unless otherwise specified 25.66 26.66 27.66 mV/A Peak-to-peak, TA= 25°C, 1 nF on VOUT pin to GND – 24 – mV Input referred – 0.4 – mARMS /√(Hz) Measured at VOUT around 3.5 V and 4.5 V –1 – 1 % IP = 0 A, TA = 25°C –10 ±3 10 mV VOE(TOP)HT IP = 0 A, TOP = 25°C to 125°C –10 ±5 10 mV VOE(TOP)LT IP = 0 A, TOP = –40°C to 25°C –20 ±10 20 mV ΔVOE(LIFE) TOP = –40°C to 125°C, estimated shift after AEC-Q100 grade 0 qualification testing – ±1 – mV ETOT(HT) Measured using 25% of full scale IP , TOP = 25°C to 125°C –3.25 ±0.8 3.25 % ETOT(LT) Measured using 25% of full scale IP , TOP = –40°C to 25°C –3.75 ±1.5 3.75 % ETOT(HT,LIFE) Measured using 25% of full scale IP , TOP = 25°C to 125°C –4.1 ±2.28 4.1 % ETOT(LT,LIFE) Measured using 25% of full scale IP , TOP = –40°C to 25°C –5.6 ±2.98 5.6 % 1 See Characteristic Performance Data page for parameter distributions over temperature range. parameter may drift a maximum of ΔSensLIFE over lifetime. 3 Based on characterization data obtained during standardized stress test for Qualification of Integrated Circuits, including Package Hysteresis. Cannot be guaranteed. Drift is a function of customer application conditions. Please contact Allegro MicroSystems for further information. 4 ±3 sigma noise voltage. 5 Drift is referred to ideal V OUT(QU) = 0.5 V. 6 This parameter may drift a maximum of ΔV OE(LIFE) over lifetime. 7 The maximum drift of any single device during qualification testing was 4%. 2 This Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 11 High-Precision Linear Hall-Effect-Based Current Sensor IC With 200 µΩ Current Conductor ACS780xLR CHARACTERISTIC PERFORMANCE DATA DATA TAKEN USING THE ACS780KLR-150B Response Time (tRESPONSE) IP = 90 A with 10-90% rise time = 1 µs, CBYPASS = 0.1 µF, CL = 1 nF Rise Time (tr) IP = 90 A with 10%-90% rise time = 1 µs, CBYPASS = 0.1 µF, CL = 1 nF Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 12 ACS780xLR High-Precision Linear Hall-Effect-Based Current Sensor IC With 200 µΩ Current Conductor Propagation Delay (tPD) IP = 90 A with 10% - 90% rise time = 1 µs, CBYPASS = 0.1 µF, CL = 1 nF Power-On Time (tPO) IP = 60 A DC, CBYPASS = Open, CL = 1 nF Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 13 High-Precision Linear Hall-Effect-Based Current Sensor IC With 200 µΩ Current Conductor ACS780xLR UVLO Enable Time (tUVLOE) IP = 0 A, CBYPASS = Open, CL = Open VCC 5 V to 3 V fall time = 1 µs UVLO Enable Time (tUVLOD) IP = 0 A, CBYPASS = Open, CL = Open VCC 3 V to 5 V recovery time = 1 µs Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 14 High-Precision Linear Hall-Effect-Based Current Sensor IC With 200 µΩ Current Conductor ACS780xLR CHARACTERISTIC DEFINITIONS Definitions of Accuracy Characteristics SENSITIVITY (Sens) The change in device output in response to a 1 A change through the primary conductor. The sensitivity is the product of the magnetic circuit sensitivity (G / A) and the linear IC amplifier gain (mV/G). The linear IC amplifier gain is programmed at the factory to optimize the sensitivity (mV/A) for the half-scale current of the device. NOISE (VNOISE) The noise floor is derived from the thermal and shot noise observed in Hall elements. Dividing the noise (mV) by the sensitivity (mV/A) provides the smallest current that the device is able to resolve. NONLINEARITY (ELIN) The ACS770 is designed to provide a linear output in response to a ramping current. Consider two current levels: I1 and I2. Ideally, the sensitivity of a device is the same for both currents, for a given supply voltage and temperature. Nonlinearity is present when there is a difference between the sensitivities measured at I1 and I2. Nonlinearity is calculated separately for the positive (ELINpos ) and negative (ELINneg ) applied currents as follows: RatERRSens = ( 1– Sens(VCC) VCC Sens(5V) 5V ) × 100% QUIESCENT OUTPUT VOLTAGE (VOUT(Q)) The output of the device when the primary current is zero. For bidirectional sensors, it nominally remains at VCC ⁄ 2 and for unidirectional sensors at 0.1 × VCC. Thus, VCC = 5 V translates into VOUT(BI) = 2.5 V and VOUT(QU) = 0.5 V. Variation in VOUT(Q) can be attributed to the resolution of the Allegro linear IC quiescent voltage trim and thermal drift. ELECTRICAL OFFSET VOLTAGE (VOE) The deviation of the device output from its ideal quiescent value due to nonmagnetic causes. TOTAL OUTPUT ERROR (ETOT) The maximum deviation of the actual output from its ideal value, also referred to as accuracy, illustrated graphically in the output voltage versus current chart on the following page. ETOT is divided into four areas: ELINpos = 100 (%) × {1 – (SensIPOS2 / SensIPOS1 ) } • 0 A at 25°C. Accuracy at the zero current flow at 25°C, without the effects of temperature. ELINneg = 100 (%) × {1 – (SensINEG2 / SensINEG1 )} • 0 A over Δ temperature. Accuracy at the zero current flow including temperature effects. • Full-scale current at 25°C. Accuracy at the full-scale current at 25°C, without the effects of temperature. where: SensIx = (VIOUT(Ix) – VIOUT(Q))/ Ix and IPOSx and INEGx are positive and negative currents. • Full-scale current over Δ temperature. Accuracy at the fullscale current flow including temperature effects. Then: ETOT(IP) = ELIN = max( ELINpos , ELINneg ) VIOUT(IP) – VIOUT_IDEAL(IP) SensIDEAL × IP × 100 (%) where VIOUT_IDEAL(IP) = VIOUT(Q) + (SensIDEAL × IP ) RATIOMETRY The device features a ratiometric output. This means that the quiescent voltage output, VOUTQ, and the magnetic sensitivity, Sens, are proportional to the supply voltage, VCC.The ratiometric change (%) in the quiescent voltage output is defined as: RatERRVOUT(Q) = ( 1– VOUT(Q)(VCC) VCC VOUT(Q)(5V) 5V ) × 100% and the ratiometric change (%) in sensitivity is defined as: Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 15 High-Precision Linear Hall-Effect-Based Current Sensor IC With 200 µΩ Current Conductor ACS780xLR Definitions of Dynamic Response Characteristics POWER-ON TIME (tPO) When the supply is ramped to its operating voltage, the device requires a finite time to power its internal components before responding to an input magnetic field. Power-On Time, tPO, is defined as the time it takes for the output voltage to settle within ±10% of its steady state value under an applied magnetic field, after the power supply has reached its minimum specified operating voltage, VCC(min), as shown in the chart at right. RISE TIME (tr) The time interval between a) when the device reaches 10% of its full scale value, and b) when it reaches 90% of its full scale value. Both tr and tRESPONSE are detrimentally affected by eddy current losses observed in the conductive IC ground plane. Power-On Time (tPO) RESPONSE TIME (tRESPONSE) The time interval between a) when the applied current reaches 80% of its final value, and b) when the sensor reaches 80% of its output corresponding to the applied current. (%) 90 PROPAGATION DELAY (tPD) The time interval between a) when the input current reaches 20% of its final value, and b) when the output reaches 20% of its final value. POWER-ON RESET VOLTAGE (VPOR ) At power-up, to initialize to a known state and avoid current spikes, the sensor is held in Reset state. The Reset signal is disabled when VCC reaches VUVLOH and time tPORR has elapsed, allowing output voltage to go from a high-impedance state into normal operation. During power-down, the Reset signal is enabled when VCC reaches VPORL , causing output voltage to go into a high-impedance state. (Note that a detailed description of POR and UVLO operation can be found in the Functional Description section.) Primary Current VOUT Rise Time, tr 20 10 0 Propagation Delay, tPROP t Propagation Delay (tPD) and Rise Time (tr) (%) 80 Primary Current VOUT Response Time, tRESPONSE 0 t Response Time (tRESPONSE) Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 16 ACS780xLR High-Precision Linear Hall-Effect-Based Current Sensor IC With 200 µΩ Current Conductor POWER-ON RESET RELEASE TIME (tPORR) When VCC rises to VPORH , the Power-On Reset Counter starts. The sensor output voltage will transition from a high-impedance state to normal operation only when the Power-On Reset Counter has reached tPORR and VCC has exceeded VUVLOH . Accuracy 25°C Only Average VIOUT Accuracy Over ∆Temp erature UNDERVOLTAGE LOCKOUT THRESHOLD (VUVLO ) If VCC drops below VUVLOL , output voltage will be locked to GND. If VCC starts rising, the sensor will come out of the locked state when VCC reaches VUVLOH . IP(min) Accuracy 25°C Only –IP (A) +IP (A) Half Scale UVLO ENABLE/DISABLE RELEASE TIME (tUVLO ) When a falling VCC reaches VUVLOL , time tUVLOE is required to engage Undervoltage Lockout state. When VCC rises above VUVLOH , time tUVLOD is required to disable UVLO and have a valid output voltage. Accuracy Over ∆Temp erature Increasing VIOUT(V) IP(max) 0A Decreasing VIOUT(V) Accuracy 25°C Only Accuracy Over ∆Temp erature Output Voltage versus Sampled Current Total Output Error at 0 A and at Full-Scale Current Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 17 High-Precision Linear Hall-Effect-Based Current Sensor IC With 200 µΩ Current Conductor ACS780xLR FUNCTIONAL DESCRIPTION Power-On Reset (POR) and Undervoltage Lock-Out (UVLO) Operation VCC does not exceed VUVLOH [2], the output will stay in the high-impedance state until VCC reaches VUVLOH [3] and then will go to VCC / 2 after tUVLOD [4]. The descriptions in this section assume: temperature = 25°C, no output load (RL, CL ) , and no significant magnetic field is present. • VCC drops below VCC(min)= 4.5 V If VCC drops below VUVLOL [4’, 5], the UVLO Enable Counter starts counting. If VCC is still below VUVLOL when counter reaches tUVLOE , the UVLO function will be enabled and the ouput will be pulled near GND [6]. If VCC exceeds VUVLOL before the UVLO Enable Counter reaches tUVLOE [5’] , the output will continue to be VCC / 2. • Power-Up At power-up, as VCC ramps up, the output is in a high-impedance state. When VCC crosses VPORH (location [1] in Figure 1 and [1’] in Figure 2), the POR Release counter starts counting for tPORR. At this point, if VCC exceeds VUVLOH [2’], the output will go to VCC / 2 after tUVLOD = 14 µs [3’]. If VCC 1 2 3 5.0 VUVLOH VUVLOL VPORH VPORL 5 4 6 7 9 8 10 11 tUVLOE tUVLOE GND VOUT Time Slope = VCC / 2 2.5 tPORR tUVLOD tUVLOD GND High Impedance High Impedance Time Figure 1: POR and UVLO Operation – Slow Rise Time case VCC 5.0 VUVLOH VUVLOL VPORH VPORL 1’ 2’ 3’ 4’ 5’ 6’ 7’ < tUVLOE GND VOUT Time tPORR Slope = VCC / 2 2.5 Slope = VCC / 2 < tUVLOE tUVLOD GND High Impedance Time High Impedance Figure 2: POR and UVLO Operation – Fast Rise Time case Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 18 ACS780xLR High-Precision Linear Hall-Effect-Based Current Sensor IC With 200 µΩ Current Conductor • Coming out of UVLO While UVLO is enabled [6] , if VCC exceeds VUVLOH [7] , UVLO will be disabled after tUVLOD , and the output will be VCC / 2 [8]. • Power-Down As VCC ramps down below VUVLOL [6’, 9], the UVLO Enable Counter will start counting. If VCC is higher than VPORL when the counter reaches tUVLOE , the UVLO function will be enabled and the ouput will be pulled near GND [10]. The output will enter a high-impedance state as VCC goes below VPORL [11]. If VCC falls below VPORL before the UVLO Enable Couner reaches tUVLOE , the output will transition directly into a high-impedance state [7’]. Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 19 High-Precision Linear Hall-Effect-Based Current Sensor IC With 200 µΩ Current Conductor ACS780xLR Chopper Stabilization Technique When using Hall-effect technology, a limiting factor for switchpoint accuracy is the small signal voltage developed across the Hall element. This voltage is disproportionally small relative to the offset that can be produced at the output of the Hall sensor IC. This makes it difficult to process the signal while maintaining an accurate, reliable output over the specified operating temperature and voltage ranges. Chopper stabilization is a unique approach used to minimize Hall offset on the chip. Allegro employs a technique to remove key sources of the output drift induced by thermal and mechanical stresses. This offset reduction technique is based on a signal modulation-demodulation process. The undesired offset signal is separated from the magnetic field-induced signal in the frequency domain, through modulation. The subsequent demodulation acts as a modulation process for the offset, causing the magnetic fieldinduced signal to recover its original spectrum at baseband, while the DC offset becomes a high-frequency signal. The magnetic- sourced signal then can pass through a low-pass filter, while the modulated DC offset is suppressed. In addition to the removal of the thermal and stress-related offset, this novel technique also reduces the amount of thermal noise in the Hall sensor IC while completely removing the modulated residue resulting from the chopper operation. The chopper stabilization technique uses a high-frequency sampling clock. For demodulation process, a sample-and-hold technique is used. This high-frequency operation allows a greater sampling rate, which results in higher accuracy and faster signal-processing capability. This approach desensitizes the chip to the effects of thermal and mechanical stresses, and produces devices that have extremely stable quiescent Hall output voltages and precise recoverability after temperature cycling. This technique is made possible through the use of a BiCMOS process, which allows the use of low-offset, low-noise amplifiers in combination with high-density logic integration and sample-and-hold circuits. Regulator Clock/Logic Hall Element Amp Anti-Aliasing LP Filter Tuned Filter Concept of Chopper Stabilization Technique Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 20 High-Precision Linear Hall-Effect-Based Current Sensor IC With 200 µΩ Current Conductor ACS780xLR APPLICATION-SPECIFIC INFORMATION Field from Nearby Current Path To best use the CMR capabilities of these devices, the circuit board containing the ICs should be designed to make the external magnetic fields on both Hall plates equal. This helps to minimize error due to external fields generated by the current-carrying PCB traces themselves. There are three main parameters for each current-carrying trace that determine the error that it will induce on an IC: distance from the IC, width of the current-carrying conductor, and the angle between it and the IC. Figure 3 shows an example of a current-carrying conductor routed near an IC. The distance between the device and the conductor, d, is the distance from the device center to the center of the conductor. The width of the current path is w. The angle between the device and the current path, θ, is defined as the angle between a straight line connecting the two Hall plates and a line perpendicular to the current path. ┌ ┐ 1 1 2×I │ │ × Error = – Cf │ │ Hspace Hspace │ d – 2 × cosθ d + 2 × cosθ │ └ ┘ where Hspace is the distance between the two Hall plates and Cf is the coupling factor of the IC. This coupling factor varies between the different ICs. The ACS780 has a coupling factor of 5 to 5.5 G/A, whereas other Allegro ICs can range from 10 to 15 G/A. Other Layout Practices to Consider When laying out a board that contains an Allegro current sensor IC with CMR, the direction and proximity of all current-carrying paths are important, but they are not the only factors to consider when optimizing IC performance. Other sources of stray fields that can contribute to system error include traces that connect to the IC’s integrated current conductor, as well as the position of nearby permanent magnets. The way that the circuit board connects to a current sensor IC must be planned with care. Common mistakes that can impact performance are: H2 I θ d • The angle of approach of the current path to the IP pins • Extending the current trace too far beneath the IC THE ANGLE OF APPROACH H1 w Figure 3: ACS780 with nearby current path, viewed from the bottom of the sensor When it is not possible to keep θ close to 90°, the next best option is to keep the distance from the current path to the current sensor IC, d, as large as possible. Assuming that the current path is at the worst-case angle in relation to the IC, θ = 0° or 180°, the equation: One common mistake when using an Allegro current sensor IC is to bring the current in from an undesirable angle. Figure 4 shows an example of the approach of the current traces to the IC (in this case, the ACS780). In this figure, traces are shown for IP+ and IP–. The light green region is the desired area of approach for the current trace going to IP+. This region is from 0° to 85°. This rule applies likewise for the IP– trace. The limitation of this region is to prevent the current-carrying trace from contributing any stray field that can cause error on the IC output. When the current traces connected to IP are outside this region, they must be treated as discussed above (Field from a Nearby Current Path). Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 21 ACS780xLR High-Precision Linear Hall-Effect-Based Current Sensor IC With 200 µΩ Current Conductor Figure 4: ACS780 Current Trace Approach – the desired range of the angle θ is from 0° to 85° ENCROACHMENT UNDER THE IC In the LR package, the encroachment of the current-carrying trace under the device actually changes the path of the current flowing through the IP bus. This can cause a change in the coupling factor of the IP bus to the IC and can significantly reduce device performance. Using ANSYS Maxwell Electromagnetic Suites, the current density and magnetic field generated from the current flow were simulated. In Figure 5, there are results from two different simulations. The first is the case where the current trace leading up to the IP bus terminates at the desired point. The second case is where the current trace encroaches far up the IP bus. The red arrows in both simulations represent the areas of high current density. In the simulation with no excess overlap, the red areas, and hence the current density, are very different from the simulation with the excess overlap. It was also observed that the field on H1 was larger when there was no excess overlap. This can be observed by the darker shade of blue. Figure 5: Simulations of ACS780 Leadframe with Different Overlap of the Current Trace and the IP Bus Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 22 High-Precision Linear Hall-Effect-Based Current Sensor IC With 200 µΩ Current Conductor ACS780xLR PACKAGE OUTLINE DRAWING 6.40 ±0.10 2.99 ±0.10 1.79 ±0.10 ×2 0.81 ±0.10 ×2 Parting Line 1 C 12º ±2º ×2 1.37 ±0.20 D1 D D2 3.06 ±0.20 7 5º ±2º ×2 A 1 1.41 ×2 = Supplier emblem N = Last three numbers of device part number Y = Last two digits of year of manufacture W = Week of manufacture L = Lot identifier 3.00 1.80 MIN B 0.38 ±0.10 ×3 5 6 0.80 0.90 1.60 ±0.10 ×2 Branded Face Standard Branding Reference View 12º ±2º ×2 1.56 ±0.20 2 YYWW LLLLLLL 5º ±2º ×2 0.38 ±0.10 ×2 4.80 ±0.10 7 (Plating Included) 0.80 ±0.10 6.40 ±0.10 NNN 0.38 +0.05 –0.03 12º ±2º ×2 0.60 5.60 7 4 A 0.02 +0.03 -0.02 1.50 ±0.10 0.70 SEATING PLANE 0.90 2 R0.25 ±0.05 0.50 0.90 ±0.10 ×2 0.50 ×2 0.88 3 PCB Layout Reference View For Reference Only, not for tooling use (DWG-0000428) Dimensions in millimeters Dimensions exclusive of mold flash, gate burs, and dambar protrusions Exact case and lead configuration at supplier discretion within limits shown 0.28 ×2 0.81 ×2 1.60 0.70 ±0.10 7 R0.50 ×2 2 1 E 1 4.80 0.9 5º ±2º ×2 R0.97 ±0.05 2.40 1.73 ±0.10 ×2 A Terminal #1 mark area B Dambar removal protrusion (16×) C Branding scale and appearance at supplier discretion D Hall elements (D1 and D2); not to scale E Reference land pattern layout; All pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary to meet application process requirements and PCB layout tolerances Package LR, 7-Pin PSOF Package Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 23 High-Precision Linear Hall-Effect-Based Current Sensor IC With 200 µΩ Current Conductor ACS780xLR Revision History Number Date – August 8, 2016 Description Initial release Copyright ©2016, Allegro MicroSystems, LLC Allegro MicroSystems, LLC reserves the right to make, from time to time, such departures from the detail specifications as may be required to permit improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the information being relied upon is current. Allegro’s products are not to be used in any devices or systems, including but not limited to life support devices or systems, in which a failure of Allegro’s product can reasonably be expected to cause bodily harm. The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, LLC assumes no responsibility for its use; nor for any infringement of patents or other rights of third parties which may result from its use. For the latest version of this document, visit our website: www.allegromicro.com Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 24