POSEICO AT971S42 Phase control thyristor Datasheet

POSEICO SPA
Via Pillea 42-44, 16153 Genova - ITALY
Tel. + 39 010 8599400 - Fax + 39 010 8682006
Sales Office:
Tel. + 39 010 8599400 - [email protected]
PHASE CONTROL THYRISTOR
AT971
Repetitive voltage up to
Mean on-state current
Surge current
4200 V
3977 A
68 kA
FINAL SPECIFICATION
Feb. 17 - Issue: 2
Symbol
Characteristic
Tj
[°C]
Conditions
Value
Unit
BLOCKING
V
RRM
Repetitive peak reverse voltage
125
4200
V
V
RSM
Non-repetitive peak reverse voltage
125
4300
V
V
DRM
Repetitive peak off-state voltage
125
4200
V
I
RRM
Repetitive peak reverse current
V=VRRM
125
300
mA
I
DRM
Repetitive peak off-state current
V=VDRM
125
300
mA
I
T (AV)
Mean on-state current
180° sin, 50 Hz, Th=55°C, double side cooled
3977
A
I
T (AV)
Mean on-state current
180° sin, 50 Hz, Tc=85°C, double side cooled
3176
A
I
TSM
CONDUCTING
Surge on-state current
sine wave, 10 ms
I² t
I² t
without reverse voltage
V
T
On-state voltage
On-state current =
V
T(TO)
Threshold voltage
125
1,12
T
On-state slope resistance
125
0,125
mohm
r
125
68,0
23120 x1E3
7500 A
25
2,06
kA
A²s
V
V
SWITCHING
di/dt
Critical rate of rise of on-state current, min.
From 67% VDRM, gate 10V 5ohm
125
200
A/µs
dv/dt
Critical rate of rise of off-state voltage, min.
Linear ramp up to 67% of VDRM
125
1000
V/µs
td
Gate controlled delay time, typical
VD=100V, gate source 10V, 10 ohm , tr=5 µs
25
tq
Circuit commutated turn-off time, typical
dv/dt = 20 V/µs linear up to 75% VDRM
Q RR
Reverse recovery charge
di/dt=-20 A/µs, I= 2150 A
.
µs
700
125 .
µs
µC
I
RR
Peak reverse recovery current
VR= 50 V
I
H
Holding current, typical
VD=5V, gate open circuit
25
.
500
mA
A
I
L
Latching current, typical
VD=12V, tp=50µs
25
1500
mA
GATE
V
GT
Gate trigger voltage
VD=12V
25
3,5
V
I
GT
Gate trigger current
VD=12V
25
250
mA
VD=67%VDRM
125
V
GD
Non-trigger gate voltage, min.
0,25
V
V
FGM
Peak gate voltage (forward)
10
V
I
FGM
Peak gate current
10
A
V
RGM
Peak gate voltage (reverse)
P
GM
Peak gate power dissipation
P
G
Average gate power dissipation
R
th(j-c)
Thermal impedance, DC
Junction to case, double side cooled
R
th(c-h)
Thermal impedance
Case to heatsink, double side cooled
T
F
j
Operating junction temperature
Mounting force
Mass
Pulse width 100 µs
10
V
150
W
3
W
MOUNTING
°C/kW
1,5
°C/kW
-30 / 125
80.0 / 100.0
3000
ORDERING INFORMATION : AT971 S 42
standard specification
6,0
VDRM&VRRM/100
Page 1 of 6
°C
kN
g
AT971 PHASE CONTROL THYRISTOR
FINAL SPECIFICATION
Feb. 17 - Issue: 2
DISSIPATION CHARACTERISTICS
SQUARE WAVE
Th [°C]
130
120
110
100
90
80
70
60
30°
50
120°
90°
60°
180°
DC
40
0
1000
2000
3000
4000
5000
6000
IF(AV) [A]
PF(AV) [W]
10000
DC
180°
9000
90°
8000
120°
60°
30°
7000
6000
5000
4000
3000
2000
1000
0
0
1000
2000
3000
IF(AV) [A]
Page 2 of 6
4000
5000
6000
AT971 PHASE CONTROL THYRISTOR
FINAL SPECIFICATION
Feb. 17 - Issue: 2
DISSIPATION CHARACTERISTICS
SINE WAVE
Th [°C]
130
120
110
100
90
80
70
60
60°
30°
50
90°
120°
180°
40
0
1000
2000
3000
4000
IF(AV) [A]
PF(AV) [W]
9000
180°
8000
90°
120°
60°
7000
6000
30°
5000
4000
3000
2000
1000
0
0
1000
2000
IF(AV) [A]
Page 3 of 6
3000
4000
AT971 PHASE CONTROL THYRISTOR
Feb. 17 - Issue: 2
Qrr [µC]
REVERSE RECOVERY CHARGE
Tj = 125°C - IT = 3000 A
di/dt [A/µs]
REVERSE RECOVERY CURRENT
Tj = 125°C - IT = 3000 A
Irr [A]
FINAL SPECIFICATION
di/dt [A/µs]
Page 4 of 6
AT971 PHASE CONTROL THYRISTOR
FINAL SPECIFICATION
Feb. 17 - Issue: 2
SURGE CHARACTERISTIC
Tj = 125 °C
14000
80
12000
70
60
10000
50
8000
ITSM [kA]
On-state Current [A]
ON-STATE CHARACTERISTIC
Tj = 125 °C
6000
4000
40
30
20
2000
10
0
0
0,6
1,1
1,6
2,1
2,6
On-state Voltage [V]
1
10
n° cycles
TRANSIENT THERMAL IMPEDANCE
DOUBLE SIDE COOLED
7
Wave
6
Square
Sine
°180
0,39
0,75
∆Rth [°K/kW]
°120
°90
°60
0,71
1,01
1,52
1,06
1,59
2,61
°30
2,54
4,04
Zth j-c [°C/kW]
5
4
3
2
1
0
0,0001
0,01
1
100
t[s]
𝑛
𝑍𝑡ℎ 𝑗−𝑐 𝑡 =
𝐴𝑖 ∗ 1 − 𝑒
−
𝑡
𝜏𝑖
𝑖=1
i
Ai [°C/kW]
1
2,738
2
1,779
3
1,186
4
0,297
τi [s]
2,4
1,70
0,16
0,001
Cathode terminal type DIN 46244 - A 4.8 - 0.8
Gate terminal type AMP 60598 - 1
Distributed by
All the characteristics given in this data sheet are guaranteed only with uniform
clamping force, cleaned and lubricated heatsink, surfaces with flatness < .03 mm
and roughness < 2 µm.
In the interest of product improvement POSEICO SpA reserves the right to change
any data given in this data sheet at any time without previous notice.
If not stated otherwise the maximum value of ratings (simbols over shaded
background) and characteristics is reported.
Page 5 of 6
100
AT971 PHASE CONTROL THYRISTOR
FINAL SPECIFICATION
Annex
Feb. 17 - Issue: 2
TRANSIENT THERMAL IMPEDANCE
DOUBLE SIDE COOLED
8
7
Zth j-h [°C/kW]
6
5
4
3
2
1
0
0,0001
0,001
0,01
0,1
1
10
100
t[s]
𝑛
𝑍𝑡ℎ 𝑗−ℎ 𝑡 =
𝐴𝑖 ∗ 1 − 𝑒
−
𝑡
𝜏𝑖
𝑖=1
i
Ai [°C/kW]
1
4,320
2
1,701
3
1,183
4
0,296
τi [s]
3,400
1,800
0,160
0,001
Note:
This Zth j-h (t) curve takes into account of a contact thermal resistance value Rth c-h = 1,5 °C/kW.
Mounting recommendations must be followed in order to match the specified contact thermal resistance value.
Page 6 of 6