APT6M100K 1000V, 6A, 2.50Ω MAX N-Channel MOSFET Power MOS 8™ is a high speed, high voltage N-channel switch-mode power MOSFET. A proprietary planar stripe design yields excellent reliability and manufacturability. Low switching loss is achieved with low input capacitance and ultra low Crss "Miller" capacitance. The intrinsic gate resistance and capacitance of the poly-silicon gate structure help control slew rates during switching, resulting in low EMI and reliable paralleling, even when switching at very high frequency. Reliability in flyback, boost, forward, and other circuits is enhanced by the high avalanche energy capability. D APT6M100K Single die MOSFET G S TYPICAL APPLICATIONS FEATURES • Fast switching with low EMI/RFI • PFC and other boost converter • Low RDS(on) • Buck converter • Ultra low Crss for improved noise immunity • Two switch forward (asymmetrical bridge) • Low gate charge • Single switch forward • Avalanche energy rated • Flyback • RoHS compliant • Inverters Absolute Maximum Ratings Symbol ID Parameter Unit Ratings Continuous Drain Current @ TC = 25°C 6 Continuous Drain Current @ TC = 100°C 4 A IDM Pulsed Drain Current VGS Gate-Source Voltage ±30 V EAS Single Pulse Avalanche Energy 2 310 mJ IAR Avalanche Current, Repetitive or Non-Repetitive 3 A 1 20 Thermal and Mechanical Characteristics Min Characteristic Typ Max Unit W PD Total Power Dissipation @ TC = 25°C 225 RθJC Junction to Case Thermal Resistance 0.56 RθCS Case to Sink Thermal Resistance, Flat, Greased Surface Operating and Storage Junction Temperature Range 150 °C TL Soldering Temperature for 10 Seconds (1.6mm from case) WT Package Weight Torque -55 300 0.07 oz 1.2 g 10 in·lbf 1.1 N·m Mounting Torque ( TO-220 Package), 4-40 or M3 screw MicrosemiWebsite-http://www.microsemi.com Rev B 5-2009 TJ,TSTG °C/W 0.11 050-8110 Symbol Static Characteristics TJ = 25°C unless otherwise specified Symbol Parameter VBR(DSS) Drain-Source Breakdown Voltage ΔVBR(DSS)/ΔTJ Breakdown Voltage Temperature Coefficient RDS(on) Drain-Source On Resistance VGS(th) Gate-Source Threshold Voltage ΔVGS(th)/ΔTJ IGSS Gate-Source Leakage Current Dynamic Characteristics Symbol VDS = 1000V VGS = 0V Forward Transconductance Ciss Input Capacitance Crss Reverse Transfer Capacitance Coss Output Capacitance Typ Max 1.15 2.05 4 -10 2.50 5 TJ = 25°C 100 500 ±100 TJ = 125°C VGS = ±30V Unit V V/°C Ω V mV/°C µA nA TJ = 25°C unless otherwise specified Parameter gfs 3 VGS = VDS, ID = 0.5mA Threshold Voltage Temperature Coefficient Zero Gate Voltage Drain Current Min 1000 VGS = 10V, ID = 3A 3 IDSS Test Conditions VGS = 0V, ID = 250µA Reference to 25°C, ID = 250µA APT6M100K Min Test Conditions VDS = 50V, ID = 3A VGS = 0V, VDS = 25V f = 1MHz Co(cr) 4 Effective Output Capacitance, Charge Related Co(er) 5 Effective Output Capacitance, Energy Related Typ 5.6 1410 19 120 Max Unit S pF 48 VGS = 0V, VDS = 0V to 667V 25 Qg Total Gate Charge Qgs Gate-Source Charge Qgd Gate-Drain Charge td(on) Turn-On Delay Time Resistive Switching Current Rise Time VDD = 667V, ID = 3A tr td(off) tf Turn-Off Delay Time 43 8 21 6.4 5.8 22 5.4 VGS = 0 to 10V, ID = 3A, VDS = 500V RG = 10Ω 6 , VGG = 15V Current Fall Time nC ns Source-Drain Diode Characteristics Symbol IS ISM Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) 1 VSD Diode Forward Voltage trr Reverse Recovery Time Qrr Reverse Recovery Charge dv/dt Peak Recovery dv/dt Test Conditions MOSFET symbol showing the integral reverse p-n junction diode (body diode) Min Typ D Max Unit 6 A G 20 S ISD = 3A, TJ = 25°C, VGS = 0V ISD = 3A, VDD = 100V 3 diSD/dt = 100A/µs, TJ = 25°C ISD ≤ 3A, di/dt ≤1000A/µs, VDD = 667V, TJ = 125°C 1.3 1025 17 V ns µC 10 V/ns 1 Repetitive Rating: Pulse width and case temperature limited by maximum junction temperature. 2 Starting at TJ = 25°C, L = 68.89mH, RG = 25Ω, IAS = 3A. 3 Pulse test: Pulse Width < 380µs, duty cycle < 2%. 050-8110 Rev B 5-2009 4 Co(cr) is defined as a fixed capacitance with the same stored charge as COSS with VDS = 67% of V(BR)DSS. 5 Co(er) is defined as a fixed capacitance with the same stored energy as COSS with VDS = 67% of V(BR)DSS. To calculate Co(er) for any value of VDS less than V(BR)DSS, use this equation: Co(er) = -4.09E-8/VDS^2 + 7.21E-9/VDS + 1.40E-11. 6 RG is external gate resistance, not including internal gate resistance or gate driver impedance. (MIC4452) Microsemi reserves the right to change, without notice, the specifications and information contained herein. APT6M100K 6 16 V GS = 10V T = 125°C J 14 5 ID, DRIAN CURRENT (A) ID, DRAIN CURRENT (A) TJ = -55°C 12 10 8 TJ = 25°C 6 4 TJ = 125°C 2 V = 6, 7, 8 & 9V GS 4 3 5V 2 1 4.5V TJ = 150°C 0 0 0 5 10 15 20 25 30 VDS(ON), DRAIN-TO-SOURCE VOLTAGE (V) 0 Figure 2, Output Characteristics 20 NORMALIZED TO VDS> ID(ON) x RDS(ON) MAX. 18 VGS = 10V @ 3A 2.5 2.0 1.5 1.0 0.5 14 12 10 TJ = -55°C 8 TJ = 25°C 6 TJ = 125°C 4 2 0 0 -55 -25 0 25 50 75 100 125 150 TJ, JUNCTION TEMPERATURE (°C) Figure 3, RDS(ON) vs Junction Temperature 0 1 2 3 4 5 6 7 8 VGS, GATE-TO-SOURCE VOLTAGE (V) Figure 4, Transfer Characteristics 3,000 8 7 1,000 TJ = -55°C 6 C, CAPACITANCE (pF) TJ = 25°C 5 TJ = 125°C 4 3 2 Ciss 100 Coss 10 Crss 1 VGS, GATE-TO-SOURCE VOLTAGE (V) 16 0.5 1.0 1.5 2.0 2.5 3.0 ID, DRAIN CURRENT (A) Figure 5, Gain vs Drain Current 200 400 600 800 1000 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 6, Capacitance vs Drain-to-Source Voltage 12 VDS = 200V 10 VDS = 500V 8 6 VDS = 800V 4 2 0 0 20 ID = 3A 14 0 1 3.5 10 20 30 40 50 60 Qg, TOTAL GATE CHARGE (nC) Figure 7, Gate Charge vs Gate-to-Source Voltage 18 16 14 TJ = 25°C 12 10 TJ = 150°C 8 6 4 2 0 0 0.3 0.6 0.9 1.2 1.5 VSD, SOURCE-TO-DRAIN VOLTAGE (V) Figure 8, Reverse Drain Current vs Source-to-Drain Voltage Rev B 5-2009 0 ISD, REVERSE DRAIN CURRENT (A) 0 050-8110 gfs, TRANSCONDUCTANCE 250µSEC. PULSE TEST @ <0.5 % DUTY CYCLE 16 ID, DRAIN CURRENT (A) RDS(ON), DRAIN-TO-SOURCE ON RESISTANCE Figure 1, Output Characteristics 3.0 5 10 15 20 25 30 VDS, DRAIN-TO-SOURCE VOLTAGE (V) APT6M100K 40 IDM 10 ID, DRAIN CURRENT (A) ID, DRAIN CURRENT (A) 40 13µs 100µs 1 1ms 10ms Rds(on) 0.1 Rds(on) 13µs 100µs 1ms 10ms TJ = 150°C 100ms TC = 25°C DC line Scaling for Different Case & Junction Temperatures: ID = ID(T = 25°C)*(TJ - TC)/125 1 100ms TJ = 125°C TC = 75°C 1 IDM 10 DC line 0.1 10 100 1000 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 9, Forward Safe Operating Area C 1 10 100 1000 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 10, Maximum Forward Safe Operating Area D = 0.9 0.50 0.40 0.7 0.30 0.5 Note: PDM ZθJC, THERMAL IMPEDANCE (°C/W) 0.60 0.20 0.3 t2 t1 = Pulse Duration SINGLE PULSE 0.10 t Duty Factor D = 1/t2 Peak TJ = PDM x ZθJC + TC 0.1 0.05 0 t1 10-5 10-4 10-3 10-2 10-1 RECTANGULAR PULSE DURATION (seconds) Figure 11. Maximum Effective Transient Thermal Impedance Junction-to-Case vs Pulse Duration TO-220 (K) Package Outline e3 100% Sn Plated 050-8110 Rev B 5-2009 Drain Gate Drain Source Dimensions in Inches and (Millimeters) Microsemi's products are covered by one or more of U.S.patents 4,895,810 5,045,903 5,089,434 5,182,234 5,019,522 5,262,336 6,503,786 5,256,583 4,748,103 5,283,202 5,231,474 5,434,095 5,528,058 and foreign patents. US and Foreign patents pending. All Rights Reserved. 1.0