Power DI-22 70 w, 19 v external laptop adapter Datasheet

®
Design Idea DI-22
®
TOPSwitch-GX 70 W, 19 V
External Laptop Adapter
Application
Device
Power Output
Input Voltage
Output Voltage
Topology
Laptop Adapter
TOP249Y
70 W
85-265 VAC
19 V
Flyback
Design Highlights
Operation
• High efficiency: 84% at 85 VAC (with 50 ˚C external
ambient temperature)
• Low component count and high power density, 7 W/in.3
• Very compact design (4.1 in. × 2.225 in. × 1.06 in.)
• No surface mount components required
• Low zero load power consumption, <370 mW at 115 VAC
• Approximately constant overload power with line voltage
• Line undervoltage detection (UV) and overvoltage (OV)
shutdown
• Low EMI - switching frequency jitter helps meet CISPR22B/
EN55022B limits
• Fully protected for overload, short circuit and thermal faults
The design utilizes a TOP249Y in a flyback converter
providing a 70 W output in a sealed enclosure at an external
ambient of 50 ˚C. Line UV and OV (100 V and 450 V,
respectively) are implemented using a single 2 MΩ resistor
(R1). Undervoltage eliminates power-up/down glitches and
overvoltage provides line transient and long duration power
system surge protection. Resistor R10 programs the internal
current limit to 75% of nominal at the UV threshold. As a
function of input voltage the current limit is further reduced
by R9 to provide approximately constant overload power.
The larger TOPSwitch-GX selection reduces conduction
losses, raising efficiency (without circuit changes or increased
overload power) and permits a higher inductance design for
reduced primary RMS currents, further increasing efficiency.
C7 2.2 nF
C13
C12
C11
0.33 µF 0.022 µF 0.01 µF
400 V
400 V
400 V
D2
MBR20100
Y1 Safety
BR1
RS805
8 A 600 V
1
2
VR1
P6KE200 2
9
D1
UF4006
C6
0.1 µF
X2
RT1
10 Ω
1.7 A
F1
3.15 A
t°
L3
75 µH
2A
6
S
C2
820 µF
25 V
5
R2
1 kΩ
C15
L
X
C
TOP249Y
U1
F
C8
0.1 µF
50 V
R10
20.5 kΩ
85-265 VAC
19 V, 3.6 A
C4
820 µF
25 V
R4
31.6 kΩ
1%
R1
270 Ω
U2
PC817A
R8
4.7 Ω
R13
562 Ω
C9
1%
4.7 nF 50 V
TOPSwitch-GX 1 µF
CONTROL
R9
13 MΩ
C14
0.1 µF
50 V
RTN
D4
1N4148
T1
D
L1
200 µH
8
R11
2 MΩ
1/2 W
C1
150 µF
400 V
C3
820 µF
25 V
11
3
L2
820 µH
2A
D3
MBR20100
50 V
R3
6.8 Ω
C5
47 µF
16 V
U3
TL431
R7
56 kΩ
C10
0.1 µF
50 V
R6
4.75 kΩ
1%
PI-2691-033001
Figure 1. TOPSwitch-GX 70 W Laptop Adapter Schematic.
DI-22
www.powerint.com
September 2002
DI-22
To reduce winding and diode dissipation the secondary is split
into two windings and diode OR’ed into the output capacitors
(C2, 3). Regulation is provided by a secondary side reference
(U3), the output voltage sensed by R4, R13 and R6.
TRANSFORMER PARAMETERS
Core Material
FPQ26/20-A
2
TDK PC40 gappped for ALG = 843 nH/T
Bobbin
TDK BPQ26/20-1112CP
Winding Details
Primary: 9T + 9T, 2 x 26 AWG
Shield: 1T, 8 mm x 0.015 mm Cu foil
Secondary 1: 3T, 3 x 26 AWG T.I.W.
Secondary 2: 3T, 3 x 26 AWG T.I.W.
Bias: 2T, 8 mm x 0.015 mm Cu foil
(T.I.W. = Triple Insulated Wire)
Winding Order
(Pin Numbers)
Primary (2-1), Shield (1-NC),
tape, Secondary 1 (12-9),
Secondary 2 (11-8),
Bias (6-5), tape, Primary (3-2), tape
Inductance
Primary: 273 µH ± 10%,
Leakge: 3 µH (maximum)
Primary Resonant
Frequency
1.5 MHz (minimum)
Key Design Points
• D1 and VR1 clamp leakage inductance spikes. A Zener
clamp provides lower zero load consumption than an RCD
clamp and higher efficiency below full load.
• C11 reduces VR1 dissipation, raising efficiency.
• Additional differential filtering is provided by C13 and L3.
• C12 provides high frequency bypass, reducing high
frequency EMI.
• Use foil windings to reduce dissipation and reduce leakage
inductance.
• Sandwich secondary winding between two halves of
primary to reduce leakage inductance.
• High core temperature reduces saturation flux density.
Keep flux density below 3000 gauss (0.3 T) to prevent
saturation.
• Use 100 V Schottky diodes for highest efficiency.
• Good layout practices should be followed:
- Locate C8, R3, C5, R9, R10 and R11 close to U1.
- Power and signal source currents should be separated,
joined using a Kelvin connection at the SOURCE pin.
- Minimize the primary and secondary loop areas to reduce
parasitic leakage and EMI.
• Consult DAK-11 and EPR-11 for more information.
Table 1. Transformer Construction Information.
For the latest updates, visit our Web site: www.powerint.com
Power Integrations reserves the right to make changes to its products at any time to improve reliability or manufacturability.
Power Integrations does not assume any liability arising from the use of any device or circuit described herein, nor does it convey any
license under its patent rights or the rights of others.
The products and applications illustrated herein may be covered by one or more U.S. and foreign patents or potentially by pending U.S.
and foreign patent applications assigned to Power Integrations. A complete list of Power Integrations’ patents may be found at
www.powerint.com.
The PI Logo, TOPSwitch, TinySwitch and EcoSmart are registered trademarks of Power Integrations, Inc.
PI Expert is a trademark of Power Integrations, Inc. ©Copyright 2002, Power Integrations, Inc.
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