Rohm BU97931FV Multifunction lcd segment driver Datasheet

Datasheet
Multifunction LCD Segment Driver
BU97931FV
MAX 112 segments (SEG28×COM4)
●Key Specifications
■ Supply Voltage Range:
+1.8V to +3.6V
■ LCD drive power supply Range:
+2.7V to +5.5V
■ Operating Temperature Range:
-40°C to +85°C
■ Max Segments:
112 Segments
■ Display Duty:
Static, 1/3, 1/4 selectable
■ Bias:
Static, 1/3
■ Interface:
3wire serial interface
●Features
 Integrated RAM for display data (DDRAM):
28 x 4 bit (Max 112 Segment)
 LCD drive output:
4 Common output, Max 28 Segment output
 Integrated 1ch LED driver circuit
 Segment/GPO (Max 5port) output mode selectable
 Support PWM generation from ext. or internal clock
(Resolution: 8bit)
 Support standby mode
 Integrated Power-on-Reset circuit (POR)
 Integrated Oscillator circuit
 No external component
 Low power consumption design
 Independent power supply for LCD driving
 Support Blink function
(Blink frequency 1.6, 2.0, 2.6, 4.0Hz selectable)
W (Typ.) x D (Typ.) x H (Max.)
●Package
●Applications

Telephone

FAX

Portable equipment (POS, ECR, PDA etc.)

DSC

DVC

Car audio

Home electrical appliance

Meter equipment
etc.
SSOP-B40
13.60mm x 7.80mm x 2.00mm
●Typical Application Circuit
LED/GPO using case
VLED=5.0V
*Regarding resistor value
Please detect the value according to
input current value (current MAX = 20mA)
VLCD
LED
VDD
SEG27(GPO0) to
SEG23(GPO4
BU97931FV
.0V
Other
device
3.3V
VSS
SEG0 toSEG22
CSB
SD
CLKIN
SCL
COM0 to COM3
LCD
＊ CLKIN
Input signal from controller
Figure 1.
○Product structure：Silicon monolithic integrated circuit
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TSZ22111･14･001
External CLK input terminal
In case being unused, connect to VSS or be opened.
Typical application circuit
○This product is not designed for protection against radioactive rays.
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MAX 112 segments (SEG28×COM4)
●Block Diagram / Pin Configuration / Pin Description
40
1
COM0……COM3 SEG0…..22, SEG23…27
LED
VLCD
common
driver
LCD voltage
Generator
Segment
driver
Segment
driver/GPO
LED
Driver
common
counter
blink timing
generator
DDRAM
GPO data latch
PWM
Generator
Command register
Data Decoder
OSCILLATOR
Power On Reset
serial inter face
VDD
IF FILTER
VSS
CSB
SD
SEG6
SEG3
SEG7
SEG2
SEG8
SEG1
SEG9
SEG0
SEG10
COM3
COM2
COM1
SEG12
VSS
CLKIN
SEG4
SEG11
GPO
Controller
LCD
BIAS
SELECTOR
SEG5
SCL
SEG13
COM0
SEG14
VLCD
SEG15
CLKIN
SEG16
VDD
SEG17
SD
SEG18
SCL
SEG19
CSB
SEG20
VSS
SEG21
LED
SEG22
SEG27
SEG23
SEG26
SEG24
SEG25
21
20
Figure 2.
Block Diagram
Figure 3.
Pin Configuration (TOP VIEW)
Table 1 Pin Description
Terminal
Terminal
number
I/O
Unused
case
CSB
26
I
-
Chip select: "L" active
SCL
27
I
-
Serial data transfer clock
SD
28
I
-
Input serial data
VDD
29
-
-
Power supply for LOGIC
CLKIN
30
I
OPEN / VSS
VSS
25
-
-
GND
VLCD
31
-
-
Power supply for LCD
COM0 to 3
32 to 35
O
OPEN
COMMON output for LCD
SEG0 to 22
36 to 40
1 to 18
O
OPEN
SEGMENT output for LCD
SEG23 to 27
19 to 23
O
OPEN
SEGMENT output for LCD/GPO
LED
24
O
OPEN
LED driver output
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Function
External clock input terminal (for display/PWM using selectable);
Support Hi-Z input mode at internal clock mode
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MAX 112 segments (SEG28×COM4)
●Absolute Maximum Ratings (VSS=0V)
Parameter
Symbol
Ratings
Unit
Power supply voltage 1
VDD
-0.3 to +4.5
V
Power supply
Power supply voltage 2
VLCD
-0.5 to +7.0
V
Power supply for LCD
Pd
0.8*
Input voltage range
VIN
-0.5 to VDD+0.5
V
Operational temperature range
Topr
-40 to +85
℃
Storage temperature range
Tstg
-55 to +125
℃
Iout1
5
mA
SEG output
Iout2
5
mA
COM output
Iout3
10
mA
GPO output
Iout4
50
mA
LED output
Power Dissipation
Output current
*1
1
Remarks
W
°
When operated more than Ta=25 C, subtract 8.0mW per degree. (using ROHM standard board)
(board size:74.2mm×74.2mm×1.6mm material: FR4 board copper foil: land pattern only).
●Recommended Operating Ratings(Ta=-40°C to +85°C,VSS=0V)
Ratings
Parameter
Symbol
MIN
TYP
MAX
Unit
Remarks
Power supply voltage 1
VDD
1.8
-
3.6
V
Power supply
Power supply voltage 2
VLCD
2.7
-
5.5
V
Power supply for LCD
Output current
Iout4
-
-
20
mA
Per LED port 1ch
●Electrical Characteristics
DC characteristics (Ta= -40°C to +85°C, VDD=1.8V to 3.6V, VLCD=3.3V to 5.5V, VSS=0)
Limits
Parameter
Symbol
Unit
MIN
TYP
MAX
Conditions
“H” level input voltage
VIH
0.8VDD
-
VDD
V
SD, SCL, CSB, CLKIN
“L” level input voltage
VIL
VSS
-
0.2VDD
V
SD, SCL, CSB, CLKIN
Hysteresis width
VH
-
0.2
-
V
“H” level input current
IIH1
-
-
5
µA
“L” level input current
IIL1
-5
-
-
µA
-
-
V
-
-
V
-
-
V
SCL, VDD=3.3V, Ta=25°C
SD, SCL, CSB, CLKIN,
VI=3.6V
SD, SCL, CSB, CLKIN,
VI=0V
Iload=-50µA, VLCD=5.0V
SEG0 to SEG27
Iload=-50µA, VLCD=5.0V,
COM0 to COM3
Iload=-1mA,VLCD=5.0V,
SEG23 to SEG27(GPO mode)
Iload= 50µA, VLCD=5.0V,
SEG0 to SEG27
Iload= 50µA, VLCD=5.0V,
COM0 to COM3
Iload=1mA, VLCD=5.0V,
SEG23 to SEG27(GPO mode)
Iload=20mA, VLCD=5.0V,
LED
VOH1
“H” level output voltage
(*2)
VOH2
VOH3
“L” level output voltage
(*2)
VLCD
-0.4
VLCD
-0.4
VLCD
-0.6
VOL1
-
-
0.4
V
VOL2
-
-
0.4
V
VOL3
-
-
0.5
V
VOL4
-
0.11
0.5
V
*1 Power save mode 1 and frame inversion setting
*2 Iload: In this case, load current from only one port
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●Electrical Characteristics – continued
DC characteristics (Ta= -40°C to +85°C, VDD=1.8V to 3.6V, VLCD=3.3V to 5.5V, VSS=0)
Limits
Parameter
Symbol
Unit
Conditions
MIN
TYP
MAX
Input terminal ALL’L’,
IstVDD
3
10
µA
Display off, Oscillation off
Input terminal ALL’L’,
IstVLCD
0.5
5
µA
Display off, Oscillation off
VDD=3.3V, Ta=25°C, 1/3bias, fFR=64Hz,
IVDD1
8
15
µA PWM generate off,
All output pin open
VDD=3.3V, Ta=25°C, 1/3bias, fFR=64Hz,
Current consumption (*1)
IVDD2
30
45
µA PWM Frequency=500Hz setting,
All output pin open
VLCD=5.0V, Ta=25°C, 1/3bias, fFR=64Hz,
IVLCD1
10
15
µA LED generate off,
All output pin open
VLCD=5.0V, Ta=25°C, 1/3bias, fFR=64Hz,
IVLCD2
30
48
µA PWM Frequency=500Hz setting,
All output pin open
*1 Power save mode 1 and frame inversion setting
*2 Iload: In case, load current from only one port
Oscillation Frequency Characteristics (Ta= -40°C to +85°C, VDD=1.8V to 3.6V, VLCD=2.7V to 5.5V, VSS=0)
Limits
Parameter
Symbol
Unit
Conditions
MIN
MIN
MIN
Frame frequency 1
fFR1
57.6
64
70.4
Hz
VDD=3.3V, Ta=25°C, fFR=64Hz setting
Frame frequency 2
fFR2
51.2
64
73.0
Hz
VDD=2.5V to 3.6V fFR=64Hz setting
Frame frequency 3
fFR3
45.0
-
64
Hz
VDD=1.8V to 2.5V fFR=64Hz setting
About detail function, please refer to the frame frequency setting of DISCTL command.
MPU interface Characteristics (Ta= -40°C to +85°C, VDD=1.8V to 3.6V, VLCD=2.7V to 5.5V, VSS=0)
Limits
Parameter
Symbol
unit
Conditions
MIN
TYP
MAX
Input rise time
tr
Input fall time
-
-
50
ns
tf
-
-
50
ns
SCL cycle time
tSCYC
250
-
-
ns
“H” SCL pulse width
tSHW
50
-
-
ns
“L” SCL pulse width
tSLW
50
-
-
ns
SD setup time
tSDS
50
-
-
ns
SD hold time
tSDH
50
-
-
ns
CSB setup time
tCSS
50
-
-
ns
CSB hold time
tCSH
50
-
-
ns
“H” CSB pulse width
tCHW
50
-
-
ns
tCHW
CSB
tCSS
tCSH
tr
tSCYC
tf
tSLW
SCL
tSHW
tSDS
tSDH
SD
Figure 4.
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Serial Interface Timing
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MAX 112 segments (SEG28×COM4)
●I/O equivalent circuit
VLCD
VDD
VSS
VSS
VDD
VLC
D
SEG0-2
2COM0-3
CSB, SD,
SCL, CLKIN
VSS
VSS
LED
VLCD
SEG23-26
VSS
VSS
Figure 5.
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I/O equivalent circuit
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MAX 112 segments (SEG28×COM4)
●Example of recommended circuit
1)
LED/GPO using case
VLED=5.0V
*Regarding resistor value
Please detect the value sccoring to
input current value (current MAX = 20mA)
VLCD
LED
VDD
SEG27( GPO0 ) to
SEG23( GPO 4)
BU 97931FV
5.0V
Other
device
3.3V
CSB
VSS
SD
SCL
SEG0 to SEG22
CLKIN
LCD
COM0 to COM3
＊ CLKIN
External CLK input terminal
In case being unused , connect to VSS or be opened.
Input signal from controller
2)
SEG output only case
VLCD
LED
Open if unused
VDD
BU 97931FV
5.0V
3.3V
VSS
CSB
SD
SCL
SEG0 to SEG27
CLKIN
LCD
COM0 to COM3
＊ CLKIN
Input signal from controller
Figure 6.
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BU97931FV
External CLK input terminal
In case being unused , connect to VSS or be opened.
E.g. of recommended circuit
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MAX 112 segments (SEG28×COM4)
●Function description
○Command and data transfer method
○3-SPI (3-wire serial interface)
This device is controlled by a 3-wire signal (CSB, SCL, and SD).
First, Interface counter is initialized with CSB=“H".
Setting CSB=”L” enables SD and SCL inputs.
The protocol of 3-SPI transfer is as follows.
Each command starts with Command or Data judgment bit (D/C) as MSB data, followed by data D6 to D0 (this is when
CSB =”L”).
(Internal data is latched at the rising edge of SCL then it is converted to an 8-bit parallel data at the falling edge of the 8th
CLK.)
When CSB changes from “L” to “H”, and at this time sending commands are less than 8 bits, command and data transfer
are cancelled. To start sending command again, please set CSB=”L" and send command continuously.
After sending RAMWR or BLKWR or GPOSET command, this device is in the RAM data input mode. Under this mode,
device can not accept new commands.
In this case, please execute a “H” to “L” transition at CSB, after this sequence the device is released from RAM data input
mode, and can accept new command.
1st byte Command
2nd byte Command
3rd byte Command
CSB
SCL
SD
D/C
D6 D5 D4
D3 D2 D1 D0 D/C D6 D5 D4 D3 D2 D1 D0 D/C D6 D5 D4 D3
Figure 7.
D2 D1 D0 D/C
D6
3-SPI Data transfer Format
* 8-bit data, sending after RAMWR command, are display RAM data
* 8-bit data, sending after BLKWR command, are blink RAM data
* SCL and SD can be set to “H” or cleared to “L” during CSB=”H”
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MAX 112 segments (SEG28×COM4)
○Write display data and transfer method
This device has Display Data RAM (DDRAM) of 28×4=112bit.
The relationship between data input and display data, DDRAM data and address are as follows.
1st Byte
2nd Byte
Command Command Command
10000011
00000000
Address set
10100000
a b c
d
e f
g h
i
j
k
l
m n
…
p
o
Display RAM data
RAM Write
According to this command, an 8-bit binary data will be written to DDRAM. The starting address of the DDRAM where data
will be written is specified by “ADSET" command, and is automatically incremented after every 4 bits of data received.
Writing data to DDRAM can be done by continuously sending data.
(In case data is sent continuously after write date at 1Bh (SEG27), address return to address 00h (SEG0)
automatically.)
In case SEG port assigned to GPO port by OUTSET command, corresponding SEG address do not change and is used
as a dummy address.
DDRAM address
BIT
00
01
02
03
04
05
06
07
19h
0
a
e
i
m
COM0
1
b
f
j
n
COM1
2
c
g
k
o
COM2
3
d
h
l
p
SEG
0
SEG
1
SEG
2
SEG
3
・・・
1Ah
1Bh
COM3
SEG
4
SEG
5
SEG
6
SEG
7
SEG
25
・・・
SEG
26
SEG
27
Display data write to DDRAM every 4bits.
In case CSB changes from ”L” to ”H” before 4 bits of data transfer was finished, RAM write is cancelled.
1st byte Command / 2nd byte Command
Display data
Command
CSB
SCL
SD
Address set command
RAMWR command
D7
D6
D5
Internal
signal
RAM write
D4
D3
D2
D1
D0
D7
D6
D4
D3
D2
D1
D0
Address 02h
Address 01h
Address 00h
D5
data lower than 4bit case
RAM write is canceled
RAM write every 4bit
1st byte Command / 2nd byte Command
Display data
Command
CSB
SCL
SD
Address set command
RAMWR command
D7
Internal
signal
RAM write
D6
D5
D4
D3
D2
Address 00h
D5
D4
D3
Address 30h
D2
D1
D0
D7
Address 31h
D6
D5
D4
Addres00h
Auto increment
Return to address 00h
Figure 8.
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Display Data Transfer Method
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MAX 112 segments (SEG28×COM4)
○Blink function
This device has Blink function. Blink function can set each segment port individually.
Blink ON/OFF and Blink frequency are set by the BLKSET command.
Blink frequency varies according to fCLK characteristics.
Blink setup of each segment is controlled by BLKWR command.
The write start address is specified by “BLKADSET" command. And this address will automatically increment after
receiving every 4 bit s of blink data. The relation of BLKWR command, blink ram data, and blinking segment port is below.
In case data is “1”, segment will blink, on the other hand when data is “0”, segment will not blink.
(In case data is written continuously after write data at 1Bh (SEG27), address will return to 00h (SEG0) automatically.)
Please refer to the following figures about Blink operation of each segment.
In case SEG port assigned to GPO port by OUTSET command, corresponding SEG address does not change and is used
as a dummy address.
1st Byte
2nd Byte
Command Command
1st Byte
2nd Byte
Command Command
Command
10000100
10000111
00000000
11000000
00000011
Blink
RAMWR
Blink Address set
Blink set
a b c d
e
f
g
h
i
j
k
l
m n o
p
…
Blink RAM data
Blink RAM address
BIT
00
01
02
03
0
a
e
i
m
COM0
1
b
f
j
n
COM1
2
c
g
k
o
COM2
3
04
d
h
l
p
SEG
0
SEG
1
SEG
2
SEG
3
05
06
07
・・・
19h
1Ah
1Bh
COM3
SEG
4
SEG
5
SEG
6
SEG
7
・・・
SEG
25
SEG
26
SEG
27
DDRAM data
SEG A
SEG B
SEG C
SEG D
SEG A
SEG B
SEG C
SEG D
SEG A
SEG B
SEG C
SEG D
Blink RAM data
Segment output
SEG A
SEG B
SEG C
SEG D
SEG A
Blink frequency
under the 2Hz stting segment output will blink every 0.5 second (ON->OFF->ON)
Figure 9.
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SEG B
SEG C
SEG D
SEG A
SEG B
SEG C
SEG D
SEGA/B is blink
Blink Operation
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MAX 112 segments (SEG28×COM4)
○LCD Driver Bias/Duty Circuit
BU97931FV generates LCD driving voltage using an on-chip Buffer AMP.
Also, it can drive LCD with low power consumption
*Line and frame inversion can be set in MODESET command.
*1/4duty, 1/3duty and static mode can be set DISCTL command.
About each LCD driving waveform, please refer to “LCD driving waveform” descriptions.
○Initial state
Initial state after SWRST command input
○Display off
○All command register values are in Reset state.
○DDRAM address data and Blink address data are initialized
(If DDRAM data and Blink RAM data are not initialized, write DDRAM data and Blink RAM data before Display on.)
●Command / Function list
Function description table
NO
Command
Function
1
Mode Set
2
Display control (DISCTL)
Sets LCD drive mode
(frame freq., line/frame inversion)
3
Address set (ADSET)
Sets display data RAM address for RAMWR command
4
Blink set (BLKSET)
Sets Blink mode on/off
5
Blink address set (BLKADSET)
Sets Blink data RAM address for BLKWR command
6
7
(MODESET)
Sets LCD drive mode (display on/off, current mode)
SEG/GPO port change
(OUTSET)
LED drive control (PWMSET)
(H piece adjustment of PWM)
Selects segment output/general purpose output (GPO)
Sets PWM1 signal “H” width for LED driving
8
RAM WRITE (RAMWR)
Writes display data to display data RAM
9
Blink RAM WRITE (BLKWR)
Writes Blink data to BLINK data RAM
10
All Pixel ON (APON)
Sets all Pixel display on
11
All Pixel OFF (APOFF)
Sets all Pixel display off
12
All Pixel On/Off mode off (NORON)
Sets normal display mode (APON/APOFF cancel)
13
Software Reset (SWRST)
Software Reset
14
OSC external input (OSCSET)
Enables External clock input
15
GPO output set (GPOSET)
Sets GPO output data
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MAX 112 segments (SEG28×COM4)
●Detailed Command Descriptions
D/C, Data / Command judgment bit (MSB)
For details, please refer to 3-wire serial I/F
○Mode Set (MODESET)
MSB
LSB
D/C
D6
D5
D4
D3
D2
D1
D0
Hex
Reset
1st byte command
1
0
0
0
0
0
0
1
81h
-
2nd byte command
0
0
0
0
P3
P2
P1
P0
-
00h
Display Set
Condition
P3
Reset state
Display OFF
0
○
Display ON
1
Display OFF: No LCD driving mode (Output: VSS Level)
Turn off OSC circuit and LCD power supply circuit. (Synchronized with frame freq)
Display ON: LCD driving mode
Turn on OSC circuit and LCD power supply circuit.
Read data from DDRAM and display to LCD.
LED port and GPO port output states are not influenced by a Display on/off state
Output state is decided by command setup (OUTSET, GPOSET, PWMSET).
For more details, please refer to each command description.
LCD drive mode set
Condition
P2
Reset state
Frame inversion
0
○
Line inversion
1
Current mode set
Condition
P1
P0
Reset state
Power save mode1
0
0
○
Power save mode2
0
1
Normal mode
1
0
High power mode
1
1
(Reference data of consumption current)
Condition
Current consumption
Power save mode 1
×1.0
Power save mode 2
×1.7
Normal mode
×2.7
High power mode
×5.0
* The value changes according to the panel load.
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MAX 112 segments (SEG28×COM4)
○Display control (DISCTL)
MSB
LSB
D/C
D6
D5
D4
1st byte Command
1
0
0
0
0
0
2nd byte Command
0
0
0
0
P3
P2
Duty set
Condition
D3
P3
P2
Reset state
1/4duty (1/3bias)
0
0
○
1/3duty (1/3bias)
0
1
Static (1/1bias)
1
*
D2
D1
D0
Hex
Reset
1
0
82h
-
P1
P0
-
02h
*: Don’t care
In 1/3duty, Display data and Blink data of COM3 are ineffective.
COM1 and COM3 output are same data.
Please be careful in transmitting display data and blink data.
The examples of SEG/COM output waveform, under each Bias/Duty set up, are shown at "LCD Driver Bias/Duty
Circuit" description.
Frame frequency set
Condition
(1/4,1/3,1/1duty)
(128Hz, 130Hz, 128Hz)
P1
P0
0
0
(85Hz, 86hz, 64Hz)
0
1
(64Hz, 65Hz, 48Hz)
1
0
(51Hz, 52Hz, 32Hz)
1
1
Reset state
○
Relation table, between Frame frequencies (FR), integrated oscillator circuit (OSC) and Divide number.
Divide
FR [Hz] (＊1)
DISCTL
Duty set (P3,P2)
Duty set (P3,P2)
(P1,P0)
(0,0)
(0,1)
(1,＊)
(0,0)
(0,1)
(1,＊)
(0,0)
1/4duty
160
1/3duty
156
1/1duty
160
1/4duty
128
1/3duty
131.3
1/1duty
128
(0,1)
240
237
320
85.3
86.4
64
(1,0)
320
315
428
64
65
47.9
(1,1)
400
393
640
51.2
52.1
32
*1: FR is frame frequency, in case OSC frequency = 20.48KHz (typ).
The Formula, to calculate OSC frequency from Frame frequency is shown below.
“ OSC frequency = Frame frequency (measurement value) x Divide number ”
Divide number: Determined by using the value of Frame Frequency Set (P1,P0) and duty setting (P3,P2).
Ex)
(P1,P0) = (0,1) ,(P3,P2) = (0,1) =>
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TSZ22111･15･001
Divide number= 237
12/28
TSZ02201-0A0A2D300070-1-2
10.Apr.2015 Rev.004
BU97931FV
MAX 112 segments (SEG28×COM4)
○Address set (ADSET)
MSB
LSB
D/C
D6
D5
D4
D3
D2
1st byte Command
1
0
0
0
0
0
2nd byte Command
0
0
0
P4
P3
P2
D1
D0
Hex
Reset
1
1
83h
-
P1
P0
-
00h
D0
Hex
Reset
Sets start address to write DDRAM data.
The address can be set from 00h to 1Bh.
Do not set other address. (Except 00h to 1Bh address is not acceptable.)
In case writing data to DDRAM, make sure to send RAMWR command.
○Blink set (BLKSET)
MSB
st
1 byte Command
2
nd
byte Command
LSB
D/C
D6
D5
D4
D3
1
0
0
0
0
1
0
0
84h
-
0
0
0
0
0
P2
P1
P0
-
00h
D0
Hex
Reset
Set Blink ON/OFF.
For more details, please refer to
Blink set
Blink mode(Hz)
D2
D1
"Blink function".
P2
P1
P0
Reset state
OFF
0
0/*
0/*
○
1.6
1
0
0
2.0
1
0
1
2.6
1
1
0
4.0
1
1
1
*: Don’t care
○Blink address set (BLKADSET)
MSB
LSB
D/C
D6
D5
D4
D3
D2
D1
1st byte Command
1
0
0
0
0
1
1
1
87h
-
2nd byte Command
0
0
0
P4
P3
P2
P1
P0
-
00h
Sets RAM start address to write Blink data.
The address can be set from 00h to 1Bh.
Do not set other addresses. (Except 00h to 1Bh address is not acceptable)
In case writing data to Blink RAM, make sure to send BLKWR command.
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TSZ22111･15･001
13/28
TSZ02201-0A0A2D300070-1-2
10.Apr.2015 Rev.004
BU97931FV
MAX 112 segments (SEG28×COM4)
○SEG/GPO port change (OUTSET)
MSB
LSB
D/C
D6
D5
D4
D3
D2
1st byte Command
1
0
0
0
1
0
2nd byte Command
0
0
0
0
0
P2
D1
D0
Hex
Reset
0
0
88h
-
P1
P0
-
00h
Set output mode, Segment output or GPO output.
P2 to P0: Select changing port number. (SEG23 to SEG27 ports are SEG mode/GPO mode selectable)
In case GPO output is selected, terminal output data is set by GPOSET command.
Ex) In case SEG 26 port is assigned to GPO,
If GPO1 data is "H", GPO1 (SEG26) port outputs "H" (VLCD Level).
If GPO1 data is "L", GPO1 (SEG26) port outputs "L" (VSS level).
Output terminal state under the P2 to P0 set condition is listed below.
Output Terminal state
Condition
SEG Terminal state (SEG output/GPO output)
P2
P1
P0
SEG23 port
SEG24 port
SEG25 port
SEG26 port
SEG27 port
0
0
0
SEG23
SEG24
SEG25
SEG26
SEG27
0
0
1
SEG23
SEG24
SEG25
SEG26
GPO0
0
1
0
SEG23
SEG24
SEG25
GPO1
GPO0
0
1
1
SEG23
SEG24
GPO2
GPO1
GPO0
1
0
0
SEG23
GPO3
GPO2
GPO1
GPO0
1
0
1
GPO4
GPO3
GPO2
GPO1
GPO0
1
1
*
(OUTSET command will be canceled)
In case the SEG port is switched to the GPO port, DDRAM address and Blink RAM address do not change.
In case DDRAM address and Blink RAM address, selected GPO output mode is dummy address.
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TSZ22111･15･001
14/28
TSZ02201-0A0A2D300070-1-2
10.Apr.2015 Rev.004
BU97931FV
MAX 112 segments (SEG28×COM4)
○LED drive-control
(PWM “H” width control) command
MSB
(PWMSET)
LSB
D/C
D6
D5
D4
D3
D2
D1
D0
Hex
1st byte Command
1
0
0
0
1
0
2nd byte Command
0
0
0
0
0
0
3rd byte Command
0
0
P5
P4
P3
P2
P1
Reset
1
0
8Ah
-
P7
P6
-
00h
P0
-
00h
2nd and 3rd byte command data can be set from 00h to 3Fh (described as 8-bit binary data).
In case other value is selected, sending command is ignored and 2nd and 3rd byte command data are set to 3Fh.
In reset state, 2nd and 3rd byte command data are set to 00h.
In case the command is less than 3 byte, sending command is cancelled.
According to PWMSET command, LED driving signal is adjustable. PWM “H” width is adjustable by 8-bit resolution.
Explanation about P7 to P6 data of 2nd byte command and P5 to P0 data of 3rd byte command are as follows:
(The 2nd byte data are used as upper 2bit, and 3rd byte data are used as lower 6 bits.)
8bit mode : P7 data is used as MSB of 8 bits, and P0 data is used LSB.
LED driving period is determined by the “H” width of PWM signal, generated by PWM generator circuit (resolution : 8bit).
Ex)
In case external PWM clock is 125KHz, parameter setting value is 127 ( 7Fh )
1-bit resolution : 8us
ALL HI set : PWM signal frequency about 500Hz, H width about 2.00msec
ALL LOW set : PWM signal frequency about 500Hz, H width 0usec (in case 8bit resolution)
This command is reflected, synchronizing with a next PWM frame head.
And, LED port output is as follows. LED port operation does not affect Display ON/OFF state.
FFh
(H width: wide)
PWM (ALL HI）
Duty shift
00h
(H width: narrow）
PWM (ALL Low）
(*)PWM frequency and PWM “H” width calculation.
PWM cycle and PWM “H” width, decided by PWM clock cycle are described as follows.
(PWM clock cycle is a minimum unit of PWM “H” width)
PWM frequency = PWM clock cycle × (Number of the steps (8bit =256) - 1 )
PWM H width = PWM clock cycle × Parameter set value (8bit: 0 to 255)
PWM Duty = PWM H width/PWM cycle = Parameter set value / Number of the steps
In case PWM is generated from the internal clock, the PWM cycle varies depending on the OSC frequency.
In case LED is used as back light of LCD panel and PWM is generated from internal clock,
there is a possibility that the display will flicker. For such cases, please use under the PWM width ALL “L”
or ALL “H” setting only.
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TSZ22111･15･001
15/28
TSZ02201-0A0A2D300070-1-2
10.Apr.2015 Rev.004
BU97931FV
MAX 112 segments (SEG28×COM4)
○RAM WRITE (RAMWR)
MSB
1st byte Command
LSB
D/C
D6
D5
1
0
1
D4
D3
D2
D1
D0
Hex
0
0
0
0
0
A0h
2nd byte Command
Display data
n byte Command
Display data
Reset
Random
・・・・
Random
Input data, sending after 1st byte command, are used as Display data. And display data are sent every 4 bits. Please set
this command after the ADSET command.
○Blink RAM WRITE (BLKWR)
MSB
1st byte Command
LSB
D/C
D6
D5
1
1
0
2nd byte Command
D4
D3
D2
D1
D0
Hex
0
0
0
0
0
C0h
Blink data
Reset
Random
・・・・
n byte Command
Blink data
Random
Input data, sending after 1st byte command, are used as Display data. And display data are sent every 4 bits. Please set
this command after the BLKADSET command.
○All Pixel ON (APON)
MSB
1st byte Command
LSB
D/C
D6
D5
D4
D3
D2
D1
D0
Hex
Reset
1
0
0
1
0
0
0
1
91h
-
After sending the command, all SEG outputs set display on state regardless of the DDRAM data.
(This command affect to the SEG output terminal only (except GPO and LED output) )
○All Pixel OFF (APOFF)
MSB
1st byte Command
LSB
D/C
D6
D5
D4
D3
D2
D1
D0
Hex
Reset
1
0
0
1
0
0
0
0
90h
-
After sending the command, all SEG outputs set display off state regardless of the DDRAM data.
(This command affects the SEG output terminals only (except GPO and LED outputs) )
○All Pixel ON/OFF mode off
1st byte Command
(NORON)
MSB
LSB
D/C
D6
D5
D4
D3
D2
D1
D0
Hex
Reset
1
0
0
1
0
0
1
1
93h
-
After sending the command, all SEG outputs are released from APON/APOFF state.
And SEG port outputs signal follows DDRAM data.
(This command affects the SEG output terminals only (except GPO and LED output) )
After reset sequence or SWRESET, all outputs are set to NORON state.
○Software Reset
(SWRST)
MSB
1st byte Command
LSB
D/C
D6
D5
D4
D3
D2
D1
D0
Hex
Reset
1
0
0
1
0
0
1
0
92h
-
After sending the command, device is set to the default state.
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TSZ22111･15･001
16/28
TSZ02201-0A0A2D300070-1-2
10.Apr.2015 Rev.004
BU97931FV
MAX 112 segments (SEG28×COM4)
○OSC external input command (OSCSET)
MSB
LSB
D/C
D6
D5
D4
D3
D2
D1
D0
Hex
Reset
1st byte Command
1
0
0
1
1
0
0
0
98h
-
2nd byte Command
0
0
0
0
0
P2
P1
P0
-
00h
Sets the type of clock mode. There are 4 selectable modes including external clock input mode.
Details of this command function are as follows.
P2
P1
P0
Reset state
(PWM generation OFF)
Condition
0
0
0
○
External CLK input for PWM (PWM generation OFF)
0
0
1
Internal CLK (PWM generation ON）
0
1
0
External CLK input for PWM (PWM generation ON)
0
1
1
External CLK input for Display (ROHM use only)
1
*
*
Internal CLK
(*: Don’t care)
(P2,P1,P0)=(0,0,1): External PWM input mode
CLKIN：external PWM input available.
PWMOUT: “L” Output
*under the (P2,P1,P0)=(0,0,0) condition PWMOUT into same state
(P2,P1,P0)=(0,1,0) : PWM is generated from an internal oscillating frequency
(P2,P1,P0)=(0,1,1) : PWM is generated from an External CLK input from CLKIN
PWM width is set up by PWMSET and PWMSET command.
In case LED is used as back light of LCD panel and PWM is generated from internal clock, display flickering will
occur. In this case, please use under the PWM width ALL ”L” or ALL “H”setting only.
The relation of OSC function control by each command is as follows:
CLKIN terminal
Integrated OSC
External clock
LED
PWM
generation
External PWM
PWMSET
command
OSCSET
command
Figure 10.
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© 2013 ROHM Co., Ltd. All rights reserved.
TSZ22111･15･001
OSC External Input
17/28
TSZ02201-0A0A2D300070-1-2
10.Apr.2015 Rev.004
BU97931FV
MAX 112 segments (SEG28×COM4)
○GPO output set command (GPOSET)
MSB
LSB
D/C
D6
D5
D4
D3
D2
1st byte Command
1
0
0
1
1
0
2nd byte Command
0
0
0
P4
P3
P2
D1
D0
Hex
Reset
1
0
9Ah
-
P1
P0
-
00h
Set GPO output data. The relation between SEG port (GPO port) and data is shown below.
GPOSET data
GPO port
SEG port
P0
GPO0
SEG27
P1
GPO1
SEG26
P2
GPO2
SEG25
P3
GPO3
SEG24
P4
GPO4
SEG23
GPO data output is asynchronous from frame cycle.
GPO output is not affectedby Display ON/OFF state.
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TSZ22111･15･001
18/28
TSZ02201-0A0A2D300070-1-2
10.Apr.2015 Rev.004
BU97931FV
MAX 112 segments (SEG28×COM4)
●LCD driving waveform
1/4Duty
Line inversion
Frame inversion
SEGn SEGn+1 SEGn+2 SEGn+3
SEGn SEGn+1 SEGn+2 SEGn+3
COM0
stateA
COM0
stateA
COM1
stateB
COM1
stateB
COM2
COM2
COM3
COM3
1frame
1frame
Vreg
Vreg
COM0
COM0
VSS
VSS
Vreg
Vreg
COM1
COM1
VSS
VSS
Vreg
Vreg
COM2
COM2
VSS
VSS
Vreg
Vreg
COM3
COM3
VSS
VSS
Vreg
Vreg
SEGn
SEGn
VSS
VSS
Vreg
Vreg
SEGn+1
SEGn+1
VSS
VSS
Vreg
Vreg
SEGn+2
SEGn+2
VSS
VSS
Vreg
Vreg
SEGn+3
SEGn+3
VSS
VSS
Vreg
Vreg
stateA
(COM0-SEGn)
stateA
(COM0-SEGn)
-Vreg
-Vreg
Vreg
Vreg
stateB
(COM1-SEGn)
stateB
(COM1-SEGn)
-Vreg
-Vreg
Figure 11. Waveform of Line Inversion
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19/28
Figure 12. Waveform of Frame Inversion
TSZ02201-0A0A2D300070-1-2
10.Apr.2015 Rev.004
BU97931FV
MAX 112 segments (SEG28×COM4)
1/3Duty
Line inversion
Frame inversion
SEGn
SEGn+1 SEGn+2 SEGn+3
SEGn
COM0
stateA
COM0
stateA
COM1
stateB
COM1
stateB
COM2
COM3
SEGn+1 SEGn+2 SEGn+3
COM2
COM3
When 1/3duty
COM3 and COM1 is same
1frame
When 1/3duty
COM3 and COM1 is same
1frame
Vreg
Vreg
COM0
COM0
VSS
VSS
Vreg
Vreg
COM1
COM1
VSS
VSS
Vreg
Vreg
COM2
COM2
VSS
VSS
Vreg
Vreg
When 1/3duty
COM3
COM3 and COM1
is same
COM3
VSS
VSS
Vreg
Vreg
SEGn
SEGn
VSS
VSS
Vreg
Vreg
SEGn+1
SEGn+1
VSS
VSS
Vreg
Vreg
SEGn+2
SEGn+2
VSS
VSS
Vreg
Vreg
SEGn+3
SEGn+3
VSS
VSS
Vreg
Vreg
stateA
stateA
(COM0-SEGn)
(COM0-SEGn)
-Vreg
-Vreg
Vreg
Vreg
stateB
stateB
(COM1-SEGn)
(COM1-SEGn)
-Vreg
-Vreg
Figure 13. Waveform of Line Inversion
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TSZ22111･15･001
Figure 14. Waveform of Frame Inversion
20/28
TSZ02201-0A0A2D300070-1-2
10.Apr.2015 Rev.004
BU97931FV
MAX 112 segments (SEG28×COM4)
1/1Duty (Static)
Line inversion
Frame inversion
SEGn SEGn+1 SEGn+2 SEGn+3
COM0
COM1
COM2
COM3
SEGn SEGn+1 SEGn+2 SEGn+3
stateA stateB
COM0
COM1
When 1/1duty (Static)
COM1 / COM0 is same
wavefor
m
COM2 / COM0 is same
wavefor
m
COM2
COM3
1frame
stateA stateB
When 1/1duty (Static)
COM1 / COM0 is same
waveform
COM2 / COM0 is same
waveform
1frame
Vreg
Vreg
COM0
COM0
VSS
VSS
When 1/1duty
(Static)
Vreg
COM1
COM1 / COM0
is same
waveform
VSS
Vreg
COM1
VSS
Vreg
Vreg
COM2 / COM0
is same
waveform
COM2
VSS
COM2
VSS
Vreg
Vreg
COM3 / COM0
is same
waveform
COM3
VSS
COM3
VSS
Vreg
Vreg
SEGn
SEGn
VSS
VSS
Vreg
Vreg
SEGn+1
SEGn+1
VSS
VSS
Vreg
Vreg
SEGn+2
SEGn+2
VSS
VSS
Vreg
Vreg
SEGn+3
SEGn+3
VSS
VSS
Vreg
Vreg
stateA
stateA
-Vreg
-Vreg
Vreg
Vreg
stateB
stateB
-Vreg
Figure 15.
-Vreg
Waveform of Line Inversion
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TSZ22111･15･001
Figure 16.
21/28
Waveform of Frame Inversion
TSZ02201-0A0A2D300070-1-2
10.Apr.2015 Rev.004
BU97931FV
MAX 112 segments (SEG28×COM4)
●initialize Sequence
Recommended input sequence is listed below, before starting LCD driving.
(Refer to Power ON/OFF sequence)
Input voltage supply
↓
CSB ’H’
…interface initializing
↓
CSB ’L’
…interface command sending
↓
SWRST
…software reset
↓
MODESET
…Display off
↓
Various commands setting
↓
RAM WRITE
↓
Blink RAM WRITE
↓
MODESET
…Display on
↓
Start LCD driving
*
Before initializing sequence, DDRAM address, DDRAM data, Blink address and Blink data are random.
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22/28
TSZ02201-0A0A2D300070-1-2
10.Apr.2015 Rev.004
BU97931FV
MAX 112 segments (SEG28×COM4)
●Cautions on Power-On/ Power-Off condition
○POR circuit
BU97931FV has “P.O.R” (Power-On Reset) circuit and Software Reset function.
Please follow the recommended Power-On conditions in order to power up properly.
1, Please set power up conditions, follow the recommended tR, tF, tOFF, and Vbot specification below in order to
ensure P.O.R operation.
(*The detection voltage of POR varies because of environment etc. To operate POR properly, please satisfy
Vbot lower than 0.5V condition.)
VDD
tR
Recommended condition of tR, tF, tOFF, Vbot
VDET
tOFF
Vbot
tR
tOFF
Vbot
VDET
less than
10ms
Over
1ms
less than
0.5V
TYP
1.2V
* VDET : POR detect level
Figure 17.
Power ON/OFF Waveform
2, If it is difficult to meet the above conditions, execute the following sequence after Power-On.
(1) CSB=”L”→”H” condition
(2) After CSB”H”→“L”, execute SWRST command
In addition, in order to the Software reset command certainly, please wait 1ms after a VDD level
reaches to 90% and CSB=”L”→”H”.
*Before SWRST command input device will be in unstable state, since SWRST command does not
operate perfect substitution of a POR function.
VDD
CSB
Min 1ms
Min 50ns
SWRST
Command
Figure 18.
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TSZ22111･15･001
SWRST Command Sequence
23/28
TSZ02201-0A0A2D300070-1-2
10.Apr.2015 Rev.004
BU97931FV
MAX 112 segments (SEG28×COM4)
●Power ON / OFF sequence
To prevent incorrect display, malfunction and abnormal current,
VDD must be turned on before VLCD In power up sequence.
VDD must be turned off after VLCD In power down sequence.
Please satisfies VLCD≥VDD, t1>0ns, t2>0ns
t1
t2
VLCD
10%
VDD
VDD min
Command
10%
VDD min
SWRST
MODE SET
Display off
Various Setup
Figure 19.
RAM WRITE
Blink RAM
WRITE
MODE SET
Display on
MODE SET
Display off
Power On/Off Sequence
●Attention about input port pull down
Satisfy the following sequence if input terminals are pulled down by external resistors (In case MPU output Hi-Z).
Date transaction period with MPU
Input "L"
period
Input"Hi-Z"
period
CSB
SD
SCL
Figure 20.
Recommended Sequence when Input Ports are Pulled Down
BU97931FUV adopts a 5V tolerant I/O for the digital input. This circuit includes a bus-hold function to keep HIGH level. A pull
down resistor of below 10KΩshall be connected to the input terminals for transitions from HIGH to LOW because the
bus-hold transistor turns on during the input’s HIGH level. (Refer to the Figure 5; I/O Equivalent Circuit)
A higher resistor than 10KΩ(approximate) causes input terminals being steady by intermediate potential between HIGH and
LOW level so unexpected current is consumed by the system.
The potential depends on the pull down resistance and bus-hold transistor’s resistance.
As the bus-hold transistor turns off upon the input level is cleared to LOW, a higher resistor can be used as a pull down
resistor if MPU sets SD and SCL lines to LOW before it releases the lines.
The LOW period preceding MPU’s bus release shall be at least 50ns as same as a minimum CLK width ( tSLW ).
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BU97931FV
MAX 112 segments (SEG28×COM4)
●Operational Notes
(1) Absolute maximum ratings
Operating the IC over the absolute maximum ratings may damage the IC. The damage can either be a short circuit
between pins or an open circuit between pins. Therefore, it is important to consider circuit protection measures, such as
adding a fuse, in case the IC is operated over the absolute maximum ratings.
(2) Recommended operating conditions
These conditions represent a range within which the expected characteristics of the IC can be approximately obtained.
The electrical characteristics are guaranteed under the conditions of each parameter.
(3) Reverse connection of power supply
Connecting the power supply in reverse polarity can damage the IC. Take precautions against reverse polarity when
connecting the power supply, such as mounting an external diode between the power supply and the IC’s power supply
terminals.
(4) Power supply lines
Design the PCB layout pattern to provide low impedance ground and supply lines. Separate the ground and supply lines
of the digital and analog blocks to prevent noise in the ground and supply lines of the digital block from affecting the
analog block. Furthermore, connect a capacitor to ground at all power supply pins. Consider the effect of temperature
and aging on the capacitance value when using electrolytic capacitors.
(5) Ground Voltage
The voltage of the ground pin must be the lowest voltage of all pins of the IC at all operating conditions. Ensure that no
pins are at a voltage below the ground pin at any time, even during transient condition.
(6) Short between pins and mounting errors
Be careful when mounting the IC on printed circuit boards. The IC may be damaged if it is mounted in a wrong orientation
or if pins are shorted together. Short circuit may be caused by conductive particles caught between the pins.
(7) Operation under strong electromagnetic field
Operating the IC in the presence of a strong electromagnetic field may cause the IC to malfunction.
(8) Testing on application boards
When testing the IC on an application board, connecting a capacitor directly to a low-impedance output pin may subject
the IC to stress. Always discharge capacitors completely after each process or step. The IC’s power supply should
always be turned off completely before connecting or removing it from the test setup during the inspection process. To
prevent damage from static discharge, ground the IC during assembly and use similar precautions during transport and
storage
(9) Regarding input pins of the IC
In the construction of this IC, P-N junctions are inevitably formed creating parasitic diodes or transistors. The operation of
these parasitic elements can result in mutual interference among circuits, operational faults, or physical damage.
Therefore, conditions which cause these parasitic elements to operate, such as applying a voltage to an input pin lower
than the GND voltage should be avoided. Furthermore, do not apply a voltage to the input terminals when no power
supply voltage is applied to the IC. Even if the power supply voltage is applied, make sure that the input terminals have
voltages within the values specified in the electrical characteristics of this IC.
(10) Ground wiring pattern
When using both small-signal and large-current GND traces, the two ground traces should be routed separately but
connected to a single ground at the reference point of the application board to avoid fluctuations in the small-signal
ground caused by large currents. Also ensure that the GND traces of external components do not cause variations on the
GND voltage. The power supply and ground lines must be as short and thick as possible to reduce line impedance.
(11) External Capacitor
When using a ceramic capacitor, determine the dielectric constant considering the change of capacitance with
temperature and the decrease in nominal capacitance due to DC bias and others.
(12) Unused input terminals
Input terminals of an IC are often connected to the gate of a CMOS transistor. The gate has extremely high impedance
and extremely low capacitance. If left unconnected, the electric field from the outside can easily charge it. The small
charge acquired in this way is enough to produce a significant effect on the conduction through the transistor and cause
unexpected operation of IC. So unless otherwise specified, input terminals not being used should be connected to the
power supply or ground line.
(13) Rush current
When power is first supplied to the IC, rush current may flow instantaneously. It is possible that the charge current to the
parastic capacitance of internal photo diode or the internal logic may be unstable. Therefore, give special consideration to
power coupling capacitance, power wiring, width of GND wiring, and routing of connections.
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BU97931FV
MAX 112 segments (SEG28×COM4)
●Ordering Information
B
U
9
7
9
Part Number
3
1
F
V
Package
FV
:
SSOP-B40
-
E2
Packaging and forming specification
E2: Embossed tape and reel
(SSOP-B40)
●Marking Diagram
SSOP-B40(TOP VIEW)
Part Number Marking
BU97931
LOT Number
1PIN MARK
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BU97931FV
MAX 112 segments (SEG28×COM4)
●Physical Dimension, Tape and Reel Information
Package Name
SSOP-B40
(Max 13.95 (include. BURR)
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BU97931FV
MAX 112 segments (SEG28×COM4)
●Revision History
Date
Revision
14.Mar.2012
001
8.Jan.2013
002
26.Jan.2015
003
10.Apr.2015
004
Changes
New Release
Improved the statement in all pages.
Deleted “Status of this document” in page 26.
Changed format of Physical Dimension, Tape and Reel Information
Add the condition when power supply in page 24.
No modification.
Updated the revision number only to match the Japanese version.
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Datasheet
Notice
Precaution on using ROHM Products
1.
Our Products are designed and manufactured for application in ordinary electronic equipments (such as AV equipment,
OA equipment, telecommunication equipment, home electronic appliances, amusement equipment, etc.). If you
(Note 1)
, transport
intend to use our Products in devices requiring extremely high reliability (such as medical equipment
equipment, traffic equipment, aircraft/spacecraft, nuclear power controllers, fuel controllers, car equipment including car
accessories, safety devices, etc.) and whose malfunction or failure may cause loss of human life, bodily injury or
serious damage to property (“Specific Applications”), please consult with the ROHM sales representative in advance.
Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way responsible or liable for any
damages, expenses or losses incurred by you or third parties arising from the use of any ROHM’s Products for Specific
Applications.
(Note1) Medical Equipment Classification of the Specific Applications
JAPAN
USA
EU
CHINA
CLASSⅢ
CLASSⅡb
CLASSⅢ
CLASSⅢ
CLASSⅣ
CLASSⅢ
2.
ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor
products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate
safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which
a failure or malfunction of our Products may cause. The following are examples of safety measures:
[a] Installation of protection circuits or other protective devices to improve system safety
[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure
3.
Our Products are designed and manufactured for use under standard conditions and not under any special or
extraordinary environments or conditions, as exemplified below. Accordingly, ROHM shall not be in any way
responsible or liable for any damages, expenses or losses arising from the use of any ROHM’s Products under any
special or extraordinary environments or conditions. If you intend to use our Products under any special or
extraordinary environments or conditions (as exemplified below), your independent verification and confirmation of
product performance, reliability, etc, prior to use, must be necessary:
[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents
[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust
[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,
H2S, NH3, SO2, and NO2
[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves
[e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items
[f] Sealing or coating our Products with resin or other coating materials
[g] Use of our Products without cleaning residue of flux (even if you use no-clean type fluxes, cleaning residue of
flux is recommended); or Washing our Products by using water or water-soluble cleaning agents for cleaning
residue after soldering
[h] Use of the Products in places subject to dew condensation
4.
The Products are not subject to radiation-proof design.
5.
Please verify and confirm characteristics of the final or mounted products in using the Products.
6.
In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse. is applied,
confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power
exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect
product performance and reliability.
7.
De-rate Power Dissipation (Pd) depending on Ambient temperature (Ta). When used in sealed area, confirm the actual
ambient temperature.
8.
Confirm that operation temperature is within the specified range described in the product specification.
9.
ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in
this document.
Precaution for Mounting / Circuit board design
1.
When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product
performance and reliability.
2.
In principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method must
be used on a through hole mount products. If the flow soldering method is preferred on a surface-mount products,
please consult with the ROHM representative in advance.
For details, please refer to ROHM Mounting specification
Notice-PGA-E
© 2015 ROHM Co., Ltd. All rights reserved.
Rev.001
Datasheet
Precautions Regarding Application Examples and External Circuits
1.
If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the
characteristics of the Products and external components, including transient characteristics, as well as static
characteristics.
2.
You agree that application notes, reference designs, and associated data and information contained in this document
are presented only as guidance for Products use. Therefore, in case you use such information, you are solely
responsible for it and you must exercise your own independent verification and judgment in the use of such information
contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses
incurred by you or third parties arising from the use of such information.
Precaution for Electrostatic
This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper
caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be
applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron,
isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).
Precaution for Storage / Transportation
1.
Product performance and soldered connections may deteriorate if the Products are stored in the places where:
[a] the Products are exposed to sea winds or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2
[b] the temperature or humidity exceeds those recommended by ROHM
[c] the Products are exposed to direct sunshine or condensation
[d] the Products are exposed to high Electrostatic
2.
Even under ROHM recommended storage condition, solderability of products out of recommended storage time period
may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is
exceeding the recommended storage time period.
3.
Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads
may occur due to excessive stress applied when dropping of a carton.
4.
Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of
which storage time is exceeding the recommended storage time period.
Precaution for Product Label
QR code printed on ROHM Products label is for ROHM’s internal use only.
Precaution for Disposition
When disposing Products please dispose them properly using an authorized industry waste company.
Precaution for Foreign Exchange and Foreign Trade act
Since concerned goods might be fallen under listed items of export control prescribed by Foreign exchange and Foreign
trade act, please consult with ROHM in case of export.
Precaution Regarding Intellectual Property Rights
1.
All information and data including but not limited to application example contained in this document is for reference
only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any
other rights of any third party regarding such information or data.
2.
ROHM shall not have any obligations where the claims, actions or demands arising from the combination of the
Products with other articles such as components, circuits, systems or external equipment (including software).
3.
No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any
third parties with respect to the Products or the information contained in this document. Provided, however, that ROHM
will not assert its intellectual property rights or other rights against you or your customers to the extent necessary to
manufacture or sell products containing the Products, subject to the terms and conditions herein.
Other Precaution
1.
This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.
2.
The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written
consent of ROHM.
3.
In no event shall you use in any way whatsoever the Products and the related technical information contained in the
Products or this document for any military purposes, including but not limited to, the development of mass-destruction
weapons.
4.
The proper names of companies or products described in this document are trademarks or registered trademarks of
ROHM, its affiliated companies or third parties.
Notice-PGA-E
© 2015 ROHM Co., Ltd. All rights reserved.
Rev.001
Datasheet
General Precaution
1. Before you use our Pro ducts, you are requested to care fully read this document and fully understand its contents.
ROHM shall n ot be in an y way responsible or liabl e for fa ilure, malfunction or acci dent arising from the use of a ny
ROHM’s Products against warning, caution or note contained in this document.
2. All information contained in this docume nt is current as of the issuing date and subj ect to change without any prior
notice. Before purchasing or using ROHM’s Products, please confirm the la test information with a ROHM sale s
representative.
3.
The information contained in this doc ument is provi ded on an “as is” basis and ROHM does not warrant that all
information contained in this document is accurate an d/or error-free. ROHM shall not be in an y way responsible or
liable for an y damages, expenses or losses incurred b y you or third parties resulting from inaccur acy or errors of or
concerning such information.
Notice – WE
© 2015 ROHM Co., Ltd. All rights reserved.
Rev.001
Datasheet
BU97931FV - Web Page
Buy
Distribution Inventory
Part Number
Package
Unit Quantity
Minimum Package Quantity
Packing Type
Constitution Materials List
RoHS
BU97931FV
SSOP-B40
2000
2000
Taping
inquiry
Yes