AVAGO ACPM-7357-BLK Umts dual-band 4x5mm power amplifier module (band1/band8) Datasheet

ACPM-7357
UMTS Dual-Band 4x5mm Power Amplifier Module
(Band1/Band8)
Data Sheet
Description
Features
The ACPM-7357 is a dual-band PAM (Power Amplifier
Module) designed for UMTS Band1 and Band8. The ACPM7357 meets stringent UMTS linearity requirements. The
4mmx5mm form factor 14-pin surface mount package
is self contained, incorporating 50ohm input and output
matching networks
x Dual-Band PA (Band1 and Band8)
5th
The ACPM-7357 features
generation of CoolPAM
circuit technology which supports 3 modes – bypass, mid
and high power modes. The CoolPAM is stage bypass
technology which enables power amplifier to lower
power consumption. Active bypass feature is added to
5th generation to enhance power added efficiency at low
output range and this technology extends talk time of
mobiles more by further saving power amplifier’s current
consumption.
The power amplifier is manufactured on an advanced
InGaP HBT (hetero-junction Bipolar Transistor) MMIC
(microwave monolithic integrated circuit) technology
offering state-of-the-art reliability, temperature stability
and ruggedness
The Module is housed in a cost effective, small and thin
4x5mm package.
Block Diagram
Bypass
Circuit
RFin_LB
Output
Match
Input Match &
Power Divider
Vcc1
Ven_LB
Ven_HB
RFin_HB
Impedance
Transformer
Vcc2
Vmode
Vbp
Bias Circuit & Control Logic
Input Match &
Power Divider
Output
Match
Bypass
Circuit
Impedance
Transformer
RFout_LB
RFout_HB
x Small Size (4x5mm)
x Thin Package (1.0mm typ)
x Excellent Linearity
x 3-mode power control
Bypass / Mid Power Mode / High Power Mode
x High Efficiency at max output power
x 14-pin surface mounting package
x Internal 50ohm matching networks for both RF input
and output
x Lead-free, RoHS compliant, Green
Applications
x UMTS Band1 and Band8
Ordering Information
Part Number
Number of
Devices
Container
ACPM-7357-TR1
1000
178mm (7”) Tape/Reel
ACPM-7357-BLK
100
Bulk
Absolute Maximum Ratings
No damage assuming only one parameter is set at limit at a time with all other parameters set at or below typical
value.
Operation of any single parameter outside these conditions with the remaining parameters set at or below typical values
may result in permanent damage
Description
Min
RF Input Power (high power mode)
Output power (bypass mode)
Output power (mid power mode)
Typ
Max
Unit
Associated Pins
0
10
10
18
dBm
RFIn_Hi, RFIn_Low
RFOut_Hi, RFOut_Low
RFOut_Hi, RFOut_Low
DC Supply Voltage
0
3.4
5.0
V
Vcc1, Vcc2
Enable Voltage
0
2.6
3.3
V
Ven_Low, Ven_Hi
Mode Control Voltage
0
2.6
3.3
V
Vmode
Bypass Control
0
2.6
3.3
V
Vbp
Storage Temperature
-55
25
+125
°C
Recommended Operating Condition
Description
Min
Typ
Max
Unit
DC Supply Voltage
3.2
3.4
4.2
V
LOW
HIGH
0
1.35
0
2.6
0.5
3.1
V
V
LOW
HIGH
0
1.35
0
2.6
0.5
3.1
V
V
LOW
HIGH
0
1.35
0
2.6
0.5
3.1
V
V
915
1980
MHz
MHz
85
°C
Enable Voltage
(Ven_Low, Ven_Hi)
Mode Control Voltage
(Vmode)
Bypass Control Voltage
(Vbp)
Operating Frequency
Band8
Band1
890
1920
Ambient Temperature
-30
25
Operating Logic Table
Power Mode
Ven_Low,
Ven_Hi
Vbp
Vmode
Pout (Rel99)
Pout (HSDPA, HSUPA MPR=0dB)
High Power Mode
HIGH
LOW
LOW
~27.0dBm (Band1)
~27.5dBm(Band8)
~26.0dBm (Band1)
~ 26.5dBm (Band8)
Mid Power Mode
HIGH
LOW
HIGH
~17dBm
~16dBm
Bypass Mode
HIGH
HIGH
HIGH
~8dBm
~7dBm
Shut Down Mode
LOW
LOW
LOW
–
–
2
Electrical Characteristics in Band1
– Conditions: Vcc=3.4V, Ven_Hi=2.6V, T=25°C, Zin/Zout=50ohm
– Signal Configuration: 3GPP (DPCCH+1DPDCH) Up-Link unless specified otherwise
Characteristics
Condition
Operating Frequency Range
Gain
Total Supply Current
Min
Typ
Max
Unit
1920
–
1980
MHz
High Power Mode, Pout=27dBm
24
27.3
dB
Mid Power Mode, Pout=17dBm
15
20.8
dB
Bypass Power Mode, Pout=8dBm
10
14.0
High Power Mode, Pout=27dBm
Quiescent Current
Enable Current
Mode Control Current
400
dB
450
mA
Mid Power Mode, Pout=17dBm
69
100
mA
Bypass Power Mode, Pout=8dBm
14
20
mA
High Power Mode
75
100
125
mA
Mid Power Mode
15
25
35
mA
Bypass Mode
1.5
3
4.5
mA
High Power Mode
10
PA
Mid Power Mode
10
PA
Bypass Mode
10
PA
Mid Power Mode
5
PA
Bypass Mode
5
Bypass Control Current
PA
100
uA
Total Current in Power-down mode
Ven_Hi=0V, Vmode=0V, Vbp=0V
5
PA
Adjacent Channel
Leakage Ratio
5 MHz offset
10 MHz offset
High Power Mode, Pout=27dBm
-36
-46
dBc
dBc
5 MHz offset
10 MHz offset
High Power Mode, Pout=26dBm
(HSDPA, HSUPA MPR=0dB)
-35
-46
dBc
dBc
5 MHz offset
10 MHz offset
Mid Power Mode, Pout=17dBm
-36
-46
dBc
dBc
5 MHz offset
10 MHz offset
Mid Power Mode, Pout=16dBm
(HSDPA, HSUPA MPR=0dB)
-36
-46
dBc
dBc
5 MHz offset
10 MHz offset
Bypass Mode, Pout=8dBm
-36
-46
dBc
dBc
5 MHz offset
10 MHz offset
Bypass Mode, Pout=7dBm
(HSDPA, HSUPA MPR=0dB)
-36
-46
dBc
dBc
Second
Third
High Power Mode, Pout=27dBm
-30
-40
dBc
dBc
Harmonic Suppression
Input VSWR
Stability (Spurious Output)
0.2
2:1
In-Band Load VSWR <= 5:1, All Phase
Out of Band Load VSWR <= 10:1,
All Phase
Forwarded power fixed
2.5:1
-60
dBc
Rx Band Noise Power
-140
-136
dBm/Hz
GPS Band Noise
-141
-137
dBm/Hz
ISM Band Noise
-144
-140
dBm/Hz
Phase Discontinuity
Ruggedness
3
mid power mode
at Pout=17dBm
low power mode
at Pout=8dBm
high power mode,
19
mid power mode,
4
No Damage
Pout<27dBm, Pin<10dBm, All phase
High Power Mode
deg
deg
10:1
VSWR
Electrical Characteristics in Band8
– Conditions: Vcc=3.4V, Ven_Low=2.6V, T=25°C, Zin/Zout=50ohm
– Signal Configuration: 3GPP (DPCCH+1DPDCH) Up-Link unless specified otherwise
Characteristics
Condition
Operating Frequency Range
Gain
High Power Mode, Pout=27.5dBm
Total Supply Current
Min.
Typ.
Max.
Unit
890
–
915
MHz
24
27.2
Mid Power Mode, Pout=17dBm
13.5
17.5
dB
Bypass Power Mode, Pout=8dBm
10
14.4
dB
High Power Mode, Pout=27.5dBm
429
485
mA
Mid Power Mode, Pout=17dBm
74
105
mA
14
20
mA
95
120
mA
Bypass Power Mode, Pout=8dBm
Quiescent Current
High Power Mode
Enable Current
dB
70
Mid Power Mode
10
21
30
mA
Bypass Mode
2
3.5
5
mA
High Power Mode
10
PA
Mid Power Mode
10
PA
Bypass Mode
10
PA
Mid Power Mode
5
PA
Bypass Mode
5
PA
Total Current in Power-down mode
Ven_Low=0V, Vmode=0V, Vbp=0V
0.2
Adjacent Channel
Leakage Ratio
5 MHz offset
10 MHz offset
Mode Control Current
Bypass Control Current
Harmonic Suppression
100
uA
5
PA
High Power Mode, Pout=27.5dBm
-36
-46
dBc
dBc
5 MHz offset
10 MHz offset
High Power Mode, Pout=26.5dBm
(HSDPA, HSUPA MPR=0dB)
-35
-46
dBc
dBc
5 MHz offset
10 MHz offset
Mid Power Mode, Pout=17dBm
-36
-46
dBc
dBc
5 MHz offset
10 MHz offset
Mid Power Mode, Pout=16dBm
(HSDPA, HSUPA MPR=0dB)
-36
-46
dBc
dBc
5 MHz offset
10 MHz offset
Bypass Mode, Pout=8dBm
-36
-46
dBc
dBc
5 MHz offset
10 MHz offset
Bypass Mode, Pout=7dBm
(HSDPA, HSUPA MPR=0dB)
-36
-46
dBc
dBc
Second
Third
High Power Mode, Pout=27.5 dBm
-30
-40
dBc
dBc
Input VSWR
Stability (Spurious Output)
2:1
In-Band Load VSWR <= 5:1, All Phase
Out of Band Load VSWR <= 10:1,
All Phase
Forwarded power fixed
2.5:1
-60
dBc
Rx Band Noise Power
-135.5
-133
dBm/Hz
GPS Band Noise
-150
-145
dBm/Hz
-160
-155
ISM Band Noise
Phase Discontinuity
Ruggedness
4
mid power mode
at Pout=17dBm
low power mode
at Pout=8dBm
high power mode,
6
mid power mode,
25
No Damage
Pout<27.5dBm, Pin<10dBm, All phase
High Power Mode
dBm/Hz
deg
deg
10:1
VSWR
HSDPA Signal configuration used:
3GPP TS 34.121-1
Annex C (normative e): Measurement channels
C.10.1 UL reference measurement channel for HSDPA tests
Table C.10.1.4: E values for transmitter characteristics tests with HS-DPCCH
Sub-test 2 (CM=1.0, MPR=0.0)
HSUPA signal configuration used:
3GPP TS 34.121-1
Annex C (normative): Measurement channels
C.11.1 UL reference measurement channel for E-DCH tests
Table C.11.1.3: E values for transmitter characteristics tests with HS-DPCCH and E-DCH
Sub-test 1 (CM=1.0, MPR=0.0)
5
Characteristics Data of Band1
35
500
450
400
350
300
250
200
150
100
50
0
1920MHz, 3.4V
1950MHz, 3.4V
1980MHz, 3.4V
25
0
0
5
10
15
Pout (dBm)
20
25
30
-5
5
10
15
Pout (dBm)
20
25
30
10
15
Pout (dBm)
20
25
30
-40
1920MHz, 3.4V
1950MHz, 3.4V
1980MHz, 3.4V
-35
1920MHz, 3.4V
1950MHz, 3.4V
1980MHz, 3.4V
-45
-40
ACLR2 (dBc)
ACLR1 (dBc)
0
Gain vs. Output Power
-30
-45
-50
-55
-50
-55
-60
-65
-60
-5
0
5
10
15
Pout (dBm)
20
25
30
Adjacent Channel Leakage Ratio 1 vs. Output Power
PAE(%)
15
5
Total Current vs. Output Power
-5
0
5
10
15
Pout (dBm)
-70
-5
0
5
Adjacent Channel Leakage Ratio 2 vs. Output Power
1920MHz, 3.4V
1950MHz, 3.4V
1980MHz, 3.4V
Power Added Efficiency vs. Output Power
6
20
10
-5
50
45
40
35
30
25
20
15
10
5
0
1920MHz, 3.4V
1950MHz, 3.4V
1980MHz, 3.4V
30
Gain (dB)
Current (mA)
(Vcc=3.4V, Ven_Hi=2.6, Vbp, Vmode= 0V or 2.6V, T=25°C, Zin/Zout=50ohm, Rel99)
20
25
30
Characteristics Data of Band8
500
450
400
350
300
250
200
150
100
50
0
35
880MHz, 3.4V
898MHz, 3.4V
915MHz, 3.4V
25
0
-5
0
5
10
15
Pout (dBm)
20
25
30
-5
5
10
15
Pout (dBm)
20
25
30
10
15
Pout (dBm)
20
25
30
-40
880MHz, 3.4V
898MHz, 3.4V
915MHz, 3.4V
-45
-40
ACLR2 (dBc)
ACLR1 (dBc)
0
Gain vs. Output Power
880MHz, 3.4V
898MHz, 3.4V
915MHz, 3.4V
-35
-45
-50
-55
-50
-55
-60
-65
-60
-70
-5
0
5
10
15
Pout (dBm)
20
25
30
Adjacent Channel Power Ratio 1 vs. Output Power
PAE(%)
15
5
-30
-5
0
5
10
15
Pout (dBm)
-5
0
5
Adjacent Channel Power Ratio 2 vs. Output Power
880MHz, 3.4V
898MHz, 3.4V
915MHz, 3.4V
Power Added Efficiency vs. Output Power
7
20
10
Total Current vs. Output Power
50
45
40
35
30
25
20
15
10
5
0
880MHz, 3.4V
898MHz, 3.4V
915MHz, 3.4V
30
Gain (dB)
Current (mA)
(Vcc=3.4V, Ven_Low=2.6, Vbp and Vmode= 0V or 2.6V, T=25°C, Zin/Zout=50ohm, Rel99)
20
25
30
Footprint
All dimensions are in millimeter
PIN DESCRIPTIONS
Pin #
Name
1
RFIn_Low
Band8 RF Input
2
Vmode
Mode Control
3
Vbp
Bypass Control
4
Vcc1
Supply Voltage
5
Ven_Low
Band8 PA Enable
6
Ven_Hi
Band1 PA Enable
7
RFIn_Hi
Band1 RF Input
8
RFOut_Hi
Band1 RF Output
9
GND
Ground
10
GND
Ground
11
Vcc2
Supply Voltage
12
GND
Ground
13
GND
Ground
14
RFOut_Low
Band8 RF Output
XRAY TOP VIEW
Package Dimensions
All dimensions are in millimeter
0.6
Pin 1 Mark
1
14
2
13
3
12
4
11
5
10
6
9
7
8
4 ± 0.1
8
5 ± 0.1
1.0 ± 0.05
Description
Marking Specification
Pin1 Mark
AVAGO
ACPM-7357
PYYWW
AAAAA
Manufacturing Part Number
Lot Number
P
YY
WW
AAAAA
Manufacturing info
Manufacturing Year
Work Week
Assembly Lot Number
CoolPAM
Avago Technologies’ CoolPAM is stage-bypass PA technology which saves more power compared with conventional PA. With this technology, the ACPM-7357 has very low
quiescent current, and efficiencies at low and medium
output power ranges are high.
Incorporation of bias circuit
The ACPM-7357 has internal bias circuit, which removes
the need for external constant voltage source (LDO). PA
on/off is controlled by Ven. This is digitally control pin.
3-mode power control with two mode control pins
Figure 1. PDF and Current
The ACPM-7357 supports three power modes (bypass
power mode/mid power mode/high power mode) with
two mode control pins (Vmode and Vbp). This control
scheme enables the ACPM-7357 to save power consumption more, which accordingly gives extended talk time.
Average current & Talk time
PDF (probability density function) in the Figure 1. showing
distribution of output power of mobile in real field gives
motivation for stage-bypass PA. Output power is less than
16dBm for most of operating time (during talking), so it is
important to save power consumption at low and medium
output power ranges.
9
Average current consumed by PA can be calculated by
summing up current at each output power weighted with
probability. So it is expressed with integration of multiplication of current and probability at each output power.
Average current = ³ (PDF x Current) dp
Talk time is extended more as average current consumption is lowered.
Mode control pins
Vmode and Vbp are digitally controlled by baseband and they control the operating mode of the PA. The logic table is
summarized in the below table. These pins do not require constant voltage for interface.
Power Mode
Ven_Low,
Ven_Hi
Vbp
Vmode
Pout (Rel99)
Pout (HSDPA, HSUPA MPR=0dB)
High Power Mode
HIGH
LOW
LOW
~27.0dBm (Band1)
~27.5dBm(Band8)
~26.0dBm (Band1)
~ 26.5dBm (Band8)
Mid Power Mode
HIGH
LOW
HIGH
~17dBm
~16dBm
Bypass Mode
HIGH
HIGH
HIGH
~8dBm
~7dBm
Shut Down Mode
LOW
LOW
LOW
–
–
Operating logic table.
UMTS PA performance comparison
– CoolPAM 4 and CoolPAM 5
450
350
Current (mA)
The 5th generation of CoolPAM technology, ACPM-7357
can dramatically reduce Icc down to 3mA at bypass mode,
which improves overall talk time and battery usage time
of handset more compared with the CP4.
CP5
CP4
400
300
250
200
150
100
50
Current (mA)
0
-10
70
65
60
55
50
45
40
35
30
25
20
15
10
5
0
-10 -8
0
10
Pout(dBm)
20
CP5
CP4
-6 -4
-2
0
2 4 6
Pout(dBm)
8
Figure 2. Icc Comparison of CP5 to CP4 (Avago CoolPAM)
10
30
10 12 14 16
Application on mobile phone board
The figure 3 shows an application example in mobile. C5 and C6 should be placed close to pin4 and pin11. Bypass cap
C1, C2, C3 and C4 should be also placed nearby from pin2, pin3, pin5 and pin6, respectively. The length of post-PA transmission line should be minimized to reduce line loss.
TX filter
C8
RF In Low
C10
Coupler
C1
C2
C11
PA_R0
L1
ACPM-7357
PA_R1
Low IN
Vmode
Vbp
Vcc1
Ven_L
Ven_H
High IN
PA_ON_Low Band
PA_ON _High Band
Low OUT
GND
GND
Vcc2
GND
GND
High OUT
RF Out Low
output matching circuit
C4
C3
RF In High
C5
C12
C6
Coupler
C13
C7
TX filter
L2
C9
RF Out High
VBATT
Figure 3. Peripheral Circuits
PCB layout and part placement on phone board
2
1
Via hole
4
3
Figure 4. PCB guideline on phone board
11
Notes:
1. To prevent voltage drop, make the bias lines as wide as
possible (Pink line).
2. Use many via holes to fence off PA RF input and output
traces for better isolation. Output signal of the PA should
be isolated from input signal and the receive signal. Output
signal should not be fed into PA input. (Green line)
3. Use via holes to connect outer ground plates to internal
ground planes. They help heat spread out more easily and
accordingly the board temperature can be lowered. They
also help to improve RF stability (Yellow square).
4. PA which has a ground slug requires many via holes which
go through all the layers (Red square).
Metallization
PCB Design Guidelines
The recommended PCB land pattern is shown in figures
on the left side. The substrate is coated with solder mask
between the I/O and conductive paddle to protect the
gold pads from short circuit that is caused by solder
bleeding/bridging.
0.50
0.60
0.40
Stencil Design Guidelines
A properly designed solder screen or stencil is required
to ensure optimum amount of solder paste is deposited
onto the PCB pads.
0.73
0.33
0.25
ø 0.3 Via
on 0.6 pitch
Solder Mask Opening
0.55
0.70
0.50
2.30
0.73
2.40
Solder Paste Stencil Aperture
0.50
0.60
0.40
2.10
0.73
2.00
12
The recommended stencil layout is shown here. Reducing
the stencil opening can potentially generate more voids.
On the other hand, stencil openings larger than 100% will
lead to excessive solder paste smear or bridging across
the I/O pads or conductive paddle to adjacent I/O pads.
Considering the fact that solder paste thickness will
directly affect the quality of the solder joint, a good choice
is to use laser cut stencil composed of 0.100mm(4mils) or
0.127mm(5mils) thick stainless steel which is capable of
producing the required fine stencil outline.
Evaluation Board Schematic
Band8 RF In
Band8 RF Out
1 RFIn_Low
RFOut_Low 14
Vmode
Vbp
C6
100pF
Vcc1
C5
100pF
Ven_Band8
C3
1000pF
C4
2.2uF
C2
100pF
C1
100pF
Ven_Band1
Band1 RF In
2 Vmode
GND 13
3 Vbp
GND 12
4 Vcc1
Vcc2 11
5 Ven_Low
GND 10
Vcc2
6 Ven_Hi
GND 9
7 RFIn_Hi
RFOut_Hi 8
13
C8
2.2uF
Band1 RF Out
Evaluation Board Description
C4
C7
1000pF
AVAGO
ACPM-7357
PYYWW
AAAAA
C8
C7
Tape and Reel Information
AVAGO
ACPM-7357
PYYWW
AAAAA
Dimension List
Dimension
Millimeter
Dimension
Millimeter
A0
4.40±0.10
P2
2.00±0.05
B0
5.30±0.10
P10
40.00±0.20
K0
1.20±0.10
E
1.75±0.10
D0
1.55±0.05
F
5.50±0.05
D1
1.60±0.10
W
12.00±0.30
P0
4.00±0.10
T
0.30±0.05
P1
8.00±0.10
Tape and Reel Format – 4 mm x 5 mm
14
Reel Drawing
BACK VIEW
Shading indicates
thru slots
18.4 max.
178 +0.4
-0.2
50 min.
25
min wide (ref)
Slot for carrier tape
insertion for attachment
to reel hub (2 places 180° apart)
12.4 +2.0
-0.0
FRONT VIEW
1.5 min.
13.0 ± 0.2
21.0 ± 0.8
Plastic Reel Format (all dimensions are in millimeters)
15
NOTES:
1. Reel shall be labeled with the following
information (as a minimum).
a. manufacturers name or symbol
b. Avago Technologies part number
c. purchase order number
d. date code
e. quantity of units
2. A certificate of compliance (c of c) shall
be issued and accompany each shipment
of product.
3. Reel must not be made with or contain
ozone depleting materials.
4. All dimensions in millimeters (mm)
Handling and Storage
ESD (Electrostatic Discharge)
Electrostatic discharge occurs naturally in the environment. With the increase in voltage potential, the outlet of
neutralization or discharge will be sought. If the acquired
discharge route is through a semiconductor device, destructive damage will result.
ESD countermeasure methods should be developed and
used to control potential ESD damage during handling in
a factory environment at each manufacturing site.
MSL (Moisture Sensitivity Level)
Plastic encapsulated surface mount package is sensitive to
damage induced by absorbed moisture and temperature.
Avago Technologies follows JEDEC Standard J-STD 020B.
Each component and package type is classified for
moisture sensitivity by soaking a known dry package at
various temperatures and relative humidity, and times.
After soak, the components are subjected to three consecutive simulated reflows.
The out of bag exposure time maximum limits are determined by the classification test describe below which corresponds to a MSL classification level 6 to 1 according to
the JEDEC standard IPC/JEDEC J-STD-020B and J-STD-033.
ACPM-7357 is MSL3. Thus, according to the J-STD-033
p.10, the maximum Manufacturers Exposure Time (MET)
for this part is 168 hours. After this time period, the part
would need to be removed from the reel, de-taped and
then re-baked. MSL classification reflow temperature for
the ACPM-7357 is targeted at 260°C +0/-5°C. Figure and
table on next page show typical SMT profile for maximum
temperature of 260 +0/-5°C.
Moisture Classification Level and Floor Life
MSL Level
Floor Life (out of bag) at factory ambient =< 30°C/60% RH or as stated
1
Unlimited at =< 30°C/85% RH
2
1 year
2a
4 weeks
3
168 hours
4
72 hours
5
48 hours
5a
24 hours
6
Mandatory bake before use. After bake, must be reflowed within the time limit specified on the label
Note :
1. The MSL Level is marked on the MSL Label on each shipping bag.
16
Reflow Profile Recommendations
tp
Tp
Critical Zone
TL to Tp
Ramp-up
Temperature
TL
tL
Tsmax
Tsmin
Ramp-down
ts
Preheat
25
t 25°C to Peak
Time
Typical SMT Reflow Profile for Maximum Temperature = 260 +0/-5°C
Typical SMT Reflow Profile for Maximum Temperature = 260 +0/ -5°C
Profile Feature
Sn-Pb Solder
Pb-Free Solder
Average ramp-up rate (TL to TP)
3°C/sec max
3°C/sec max
100°C
150°C
60-120 sec
150°C
200°C
60-120 sec
Preheat
– Temperature Min (Tsmin)
– Temperature Max (Tsmax)
– Time (min to max) (ts)
Tsmax to TL
– Ramp-up Rate
3°C/sec max
Time maintained above:
– Temperature (TL)
– Time (TL)
183°C
60-150 sec
217°C
60-150 sec
Peak temperature (Tp)
240 +0/-5°C
260 +0/-5°C
10-30 sec
20-40 sec
Ramp-down Rate
6°C/sec max
6°C/sec max
Time 25°C to Peak Temperature
6 min max.
8 min max.
Time within 5°C of actual Peak Temperature (tp)
17
Storage Condition
Baking of Populated Boards
Packages described in this document must be stored
in sealed moisture barrier, antistatic bags. Shelf life in a
sealed moisture barrier bag is 12 months at <40°C and
90% relative humidity (RH) J-STD-033 p.6.
Some SMD packages and board materials are not able to
withstand long duration bakes at 125°C. Examples of this
are some FR-4 materials, which cannot withstand a 24 hr
bake at 125°C. Batteries and electrolytic capacitors are
also temperature sensitive. With component and board
temperature restrictions in mind, choose a bake temperature from Table 4-1 in J-STD 033; then determine the
appropriate bake duration based on the component to
be removed. For additional considerations see IPC-7711
andIPC-7721.
Out-of-Bag Time Duration
After unpacking the device must be soldered to the PCB
within 168 hours with factory conditions <30°C and 60%
RH as listed in the Table 5-1 on the J-STD-020D p.6.
Baking
It is not necessary to re-bake the part if both conditions
(storage conditions and out-of bag conditions) have been
satisfied. Baking must be done if at least one of the conditions above has not been satisfied. The baking conditions
are listed in the Table 4-1 on the J-STD-033 p.8.
CAUTION
Tape and reel materials typically cannot be baked at the
temperature described above. If out-of-bag exposure
time is exceeded, parts must be baked for a longer time
at low temperatures, or the parts must be de-reeled, detaped, re-baked and then put back on tape and reel. (See
moisture sensitive warning label on each shipping bag for
information of baking).
Board Rework
Component Removal, Rework and Remount
If a component is to be removed from the board, it is
recommended that localized heating be used and the
maximum body temperatures of any surface mount
component on the board not exceed 200°C. This method
will minimize moisture related component damage. If any
component temperature exceeds 200°C, the board must
be baked dry per 4-2 prior to rework and/or component
removal. Component temperatures shall be measured at
the top center of the package body. Any SMD packages
that have not exceeded their floor life can be exposed to
a maximum body temperature as high as their specified
maximum reflow temperature.
Removal for Failure Analysis
Not following the above requirements may cause moisture/
reflow damage that could hinder or completely prevent
the determination of the original failure mechanism.
18
Derating due to Factory Environmental Conditions
Factory floor life exposures for SMD packages removed
from the dry bags will be a function of the ambient environmental conditions. A safe, yet conservative, handling
approach is to expose the SMD packages only up to
the maximum time limits for each moisture sensitivity
level as shown in table of Moisture Classification Level
and Floor Life. This approach, however, does not work if
the factory humidity or temperature is greater than the
testing conditions of 30°C/60% RH. A solution for addressing this problem is to derate the exposure times based on
the knowledge of moisture diffusion in the component
package materials ref. JESD22-A120). Recommended
equivalent total floor life exposures can be estimated for
a range of humidities and temperatures based on the
nominal plastic thickness for each device.
Table on follwoing page lists equivalent derated floor lives
for humidities ranging from 20-90% RH for three temperature, 20°C, 25°C, and 30°C.
This table is applicable to SMDs molded with novolac,
biphenyl or multifunctional epoxy mold compounds.
The following assumptions were used in calculating this
table:
1. Activation Energy for diffusion = 0.35eV (smallest
known value).
2. For ≤60% RH, use Diffusivity = 0.121exp (-0.35eV/kT)
mm2/s (this used smallest known Diffusivity @ 30°C).
3. For >60% RH, use Diffusivity = 1.320exp (-0.35eV/kT)
mm2/s (this used largest known Diffusivity @ 30°C).
Recommended Equivalent Total Floor Life (days) @ 20°C, 25°C & 30°C, 35°C
For ICs with Novolac, Biphenyl and Multifunctional Epoxies (Reflow at same temperature at which the component was
classified) Maximum Percent Relative Humidity
Maximum Percent Relative Humidity
Package Type and
Moisture
Body Thickness
Sensitivity Level
Body Thickness ≥3.1 mm
Including
PQFPs >84 pin,
PLCCs (square)
All MQFPs
or
All BGAs ≥1 mm
Level 2a
Level 3
Level 4
Level 5
Level 5a
Body 2.1 mm
≤ Thickness
<3.1 mm including
PLCCs (rectangular)
18-32 pin
SOICs (wide body)
SOICs ≥20 pins,
PQFPs ≤80 pins
Level 2a
Level 3
Level 4
Level 5
Level 5a
Body Thickness <2.1 mm
including
SOICs <18 pin
All TQFPs, TSOPs
or
All BGAs <1 mm body
thickness
Level 2a
Level 3
Level 4
Level 5
Level 5a
5%
10%
20%
30%
40%
50%
60%
70%
80%
90%
∞
∞
∞
∞
∞
∞
∞
∞
∞
∞
∞
∞
∞
∞
∞
∞
∞
∞
∞
∞
∞
∞
∞
∞
∞
∞
∞
∞
∞
∞
∞
∞
∞
∞
∞
∞
∞
∞
∞
∞
∞
∞
∞
∞
∞
∞
∞
∞
∞
∞
∞
∞
∞
∞
∞
∞
∞
∞
∞
∞
∞
∞
∞
∞
∞
∞
∞
∞
3
5
6
8
2
4
5
7
1
2
3
5
∞
∞
∞
∞
∞
∞
∞
∞
5
7
9
11
3
4
5
6
1
2
2
3
∞
∞
∞
∞
∞
∞
∞
∞
∞
∞
∞
∞
∞
∞
∞
∞
7
10
13
18
94
124
167
231
8
10
13
17
3
4
5
7
2
3
5
7
1
1
2
4
∞
∞
∞
∞
12
19
25
32
4
5
7
9
2
3
4
5
1
1
2
2
∞
∞
∞
∞
∞
∞
∞
∞
∞
∞
∞
∞
7
13
18
26
2
3
5
6
44
60
78
103
7
9
11
14
3
4
5
7
2
3
4
6
1
1
2
3
∞
∞
∞
∞
9
12
15
19
3
4
5
7
2
3
3
5
1
1
2
2
∞
∞
∞
∞
∞
∞
∞
∞
7
9
12
17
3
5
6
8
1
2
3
4
32
41
53
69
6
8
10
13
2
4
5
7
2
2
4
5
1
1
2
3
58
86
148
∞
7
9
12
15
3
4
5
6
2
2
3
4
1
1
2
2
∞
∞
∞
∞
∞
∞
∞
∞
4
5
7
9
2
3
4
6
1
1
2
3
26
33
42
57
6
7
9
12
2
3
5
7
1
2
3
5
1
1
2
3
30
39
51
69
6
8
10
13
2
3
4
6
2
2
3
4
1
1
2
2
∞
∞
∞
∞
8
11
14
20
3
4
5
7
2
2
3
5
1
1
2
2
16
28
36
47
6
7
9
12
2
3
4
6
1
2
3
4
1
1
2
2
22
28
37
49
5
7
9
12
2
3
4
5
1
2
3
4
1
1
2
2
17
28
∞
∞
5
7
10
13
2
3
4
6
1
2
3
4
1
1
2
2
7
10
14
19
4
5
7
10
2
3
3
5
1
2
2
3
1
1
1
2
3
4
6
8
2
3
5
7
1
2
3
4
1
1
2
3
1
1
1
2
1
1
2
2
1
1
2
2
1
1
2
2
1
1
2
2
1
1
1
2
5
7
10
13
3
4
6
8
1
2
3
4
1
1
2
3
1
1
1
2
2
3
4
5
2
2
3
5
1
2
2
3
1
1
1
3
0.5
0.5
1
2
0.5
1
1
2
0.5
1
1
2
0.5
1
1
2
0.5
1
1
2
0.5
1
1
2
4
6
8
10
3
4
5
7
1
2
3
4
1
1
2
3
1
1
1
2
1
2
3
4
1
2
3
4
1
1
2
3
1
1
1
2
0.5
0.5
1
1
0.5
1
1
1
0.5
1
1
1
0.5
1
1
1
0.5
1
1
1
0.5
0.5
1
1
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www.avagotech.com
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Data subject to change. Copyright © 2005-2009 Avago Technologies. All rights reserved.
AV02-2036EN - July 30, 2009
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