AD ADM1486 5 v low power rs-485 profibus transceiver Datasheet

PRELIMINARY TECHNICAL DATA
a
Preliminary Technical Data
FEATURES
Meets & Exceeds EIA RS-485 & EIA RS-422 Standard
50 Mb/s Data Rate
Recommended for PROFIBUS Applications
⍀
2.1V Minimum Differential Output with 54⍀
Termination
Low Power 0.5mA ICC
Thermal Shutdown & Short Circuit Protection
Zero Skew Driver & Receiver
Driver Propagation Delay: 8 ns
Receiver Propagation Delay: 12 ns
High Z Outputs with Drivers Disabled or Power Off
Superior Upgrade for SN65ALS1176
15kV HBM ESD Protection on I/O Pins A & B
Available in Standard 8-pin SOIC & Miniature 8-pin
Micro SOIC packages
+5 V Low Power
RS-485 PROFIBUS Transceiver
ADM1486
FUNCTIONAL BLOCK DIAGRAM
R
RE
VCC
B
DE
A
RO
DI
D
GND
ADM1486
APPLICATIONS
Industrial Field Equipment
GENERAL DESCRIPTION
The ADM1486 is a differential line transceiver suitable
for high speed bidirectional data communication on
multipoint bus transmission lines. It is designed for
balanced data transmission, complies with EIA Standards
RS-485 and RS-422 and is recommended for PROFIBUS
applications. The part contains a differential line driver
and a differential line receiver. Both the driver and the
receiver may be enabled independently. When disabled or
with power off, the driver outputs are tristated.
The ADM1486 operates from a single +5 V power supply.
Excessive power dissipation caused by bus contention or
by output shorting is prevented by a thermal shutdown
circuit. This feature forces the driver output into a high
impedance state if during fault conditions a significant
temperature increase is detected in the internal driver
circuitry.
Up to 50 transceivers may be connected simultaneously on
a bus, but only one driver should be enabled at any time.
It is important therefore that the remaining disabled
drivers do not load the bus. To ensure this, the ADM1486
driver features high output impedance when disabled and
also when powered down.
This minimizes the loading effect when the transceiver is
not being utilized. The high impedance driver output is
maintained over the entire common-mode voltage range
from –7 V to +12 V.
The receiver contains a fail safe feature which results in a
logic high output state if the inputs are unconnected
(floating).
The ADM1486 is fabricated on BiCMOS, an advanced
mixed technology process combining low power CMOS
with fast switching bipolar technology. All inputs and
outputs contain protection against ESD; all driver outputs
feature high source and sink current capability. An epitaxial layer is used to guard against latch-up.
The ADM1486 features extremely fast switching speeds.
Minimal driver propagation delays permit transmission at
data rates up to 50 Mbits/s while low skew minimizes
EMI interference.
The part is fully specified over the commercial and industrial temperature range and is available in an 8-lead
DIL/SOIC/µSOIC package.
REV Pr. B
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 2000
PRELIMINARY TECHNICAL DATA
ADM1486–SPECIFICATIONS
Parameter
(VCC = +5 V ± 5%. All specifications TMIN to TMAX unless otherwise noted.)
Min Typ
DRIVER
Differential Output Voltage, VOD
2.0
2.1
2.1
V OD3
⌬|VOD| for Complementary Output States
Common-Mode Output Voltage VOC
⌬|VOD| for Complementary Output States
Output Short Circuit Current(V OUT=High) 60
Output Short Circuit Current(VOUT=Low) 60
CMOS Input Logic Threshold Low, VINL
CMOS Input Logic Threshold High, VINH 2.0
Logic Input Current (DE, DI)
Unit
Test Conditions/Comments
5.0
5.0
5.0
5.0
0.2
3
0.2
150
150
0.8
V
V
V
V
V
V
V
mA
mA
V
V
µA
R = Infinity, Figure 1
VCC = 5 V, R = 50 ⍀ (RS-422), Figure 1
R = 27 ⍀ (RS-485), Figure 1
VTST = –7 V to +12 V, Figure 2
R = 27 ⍀ or 50 ⍀, Figure 1
R = 27 ⍀ or 50 ⍀, Figure 1
R = 27 ⍀ or 50 ⍀
–7 V ⭐ VO ⭐ +12 V
–7 V ⭐ VO ⭐ +12 V
–7 V ⭐ VCM ⭐ +12 V
VCM = 0 V
–7 V ⭐ VCM ⭐ +12 V
VIN = 12 V
VIN = –7 V
85
±1.0
V
mV
k⍀
mA
mA
µA
V
V
mA
µA
IOUT = +4.0 mA
IOUT = –4.0 mA
VOUT = GND or VCC
0.4 V ⭐ VOUT ⭐ +2.4 V
2.0
1.5
mA
mA
Outputs Unloaded, Digital Inputs = GND or VCC
Outputs Unloaded, Digital Inputs = GND or VCC
±1.0
RECEIVER
Differential Input Threshold Voltage, VTH –0.2
Input Voltage Hysteresis, ⌬VTH
70
Input Resistance
20
Input Current (A, B)
Logic Enable Input Current (RE)
CMOS Output Voltage Low, VOL
CMOS Output Voltage High, VOH
Short Circuit Output Current
Tristate Output Leakage Current
Max
+0.2
+ 1
–0.8
±1
0.4
4.0
7
POWER SUPPLY CURRENT
ICC (Outputs Enabled)
ICC (Outputs Disabled)
1.2
0.9
Specifications subject to change without notice.
TIMING SPECIFICATIONS
(VCC = +5 V ± 5%. All specifications TMIN to TMAX unless otherwise noted.)
Parameter
Min
Typ
Max
Unit
Test Conditions/Comments
4
8
0
5
8
8
15
2
10
15
15
ns
ns
ns
ns
ns
RL Diff = 54 ⍀ CL1 = CL2 = 100 pF, Figure 3
RL Diff = 54 ⍀ CL1 = CL2 = 100 pF, Figure 3
RL Diff = 54 ⍀ CL1 = CL2 = 100 pF, Figure 3
8
0
5
5
12
2
10
10
20
ns
ns
ns
ns
DRIVER
Propagation Delay Input to Output TPLH, TPHL
Driver O/P to O/P TSKEW
Driver Rise/Fall Time TR, TF
Driver Enable to Output Valid
Driver Disable Timing
RECEIVER
Propagation Delay Input to Output TPLH, TPHL
Skew |T PLH –T PHL |
Receiver Enable TEN1
Receiver Disable T EN2
CL = 15 pF, Figure 5
Figure 6
Figure 6
Specifications subject to change without notice.
–2–
REV. B
PRELIMINARY TECHNICAL DATA
ADM1486
ABSOLUTE MAXIMUM RATINGS*
PIN FUNCTION DESCRIPTION
(TA = +25°C unless otherwise noted)
VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +7 V
Inputs
Driver Input (DI) . . . . . . . . . . . . –0.3 V to VCC + 0.3 V
Control Inputs (DE, RE) . . . . . . –0.3 V to VCC + 0.3 V
Receiver Inputs (A, B) . . . . . . . . . . . . . . –9 V to +14 V
Outputs
Driver Outputs . . . . . . . . . . . . . . . . . . . . –9 V to +14 V
Receiver Output . . . . . . . . . . . . . –0.5 V to VCC + 0.5 V
Power Dissipation 8-Lead DIP . . . . . . . . . . . . . . 500 mW
θJA, Thermal Impedance . . . . . . . . . . . . . . . . +130°C/W
Power Dissipation 8-Lead SOIC . . . . . . . . . . . . 450 mW
θJA, Thermal Impedance . . . . . . . . . . . . . . . . +170°C/W
Power Dissipation 8-Lead Cerdip . . . . . . . . . . . . 500 mW
θJA, Thermal Impedance . . . . . . . . . . . . . . . . +125°C/W
Power Dissipation 8-Lead µSOIC . . . . . . . . . . . . . . mW
θJA, Thermal Impedance . . . . . . . . . . . . . . . . . . . . +°C/W
Operating Temperature Range
Commercial (J Version) . . . . . . . . . . . . . . 0°C to +70°C
Industrial (A Version) . . . . . . . . . . . . . . –40°C to +85°C
Storage Temperature Range . . . . . . . –65°C to +150°C
Lead Temperature (Soldering, 10 sec) . . . . . . . . +300°C
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . +215°C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . +220°C
Pin Mnemonic Function
1
RO
2
RE
3
DE
4
DI
5
6
GND
A
7
B
8
VCC
*Stresses above those listed under Absolute Maximum Ratings may cause permanent
damage to the device. This is a stress rating only; functional operation of the device
at these or any other conditions above those listed in the operational sections of this
specification is not implied. Exposure to absolute maximum ratings for extended
periods of time may affect device reliability.
PIN CONFIGURATION
Table I. Transmitting
RE
INPUTS
DE
DI
OUTPUTS
B
A
X
X
X
1
1
0
1
0
X
0
1
Z
Receiver Output. When enabled if A >B
by 200 mV, then RO = High. If A < B
by 200 mV, then RO = Low.
Receiver Output Enable. A low level
enables the receiver output, RO. A high
level places it in a high impedance state.
Driver Output Enable. A high level
enables the driver differential outputs, A
and B. A low level places it in a high
impedance state.
Driver Input. When the driver is enabled a logic Low on DI forces A low
and B high while a logic High on DI
forces A high and B low.
Ground Connection, 0 V.
Noninverting Receiver Input A/Driver
Output A.
Inverting Receiver Input B/Driver
Output B.
Power Supply, 5 V ± 5%.
1
0
Z
RO
1
RE
2
DE
3
DI
4
AD M 1 4 86
TO P V IE W
(N o t to s c a le )
8
VC C
7
B
6
A
5
GND
Table II. Receiving
ORDERING GUIDE
INPUTS
RE
0
0
0
1
DE
0
0
0
0
A-B
⭓+0.2 V
⭐ –0.2 V
Inputs Open
X
OUTPUT
RO
1
0
1
Z
Model
Temperature
Range
Package
Option
ADM1486JN
ADM1486JR
ADM1486AN
ADM1486AR
ADM1486ARM
ADM1486AQ
0°C to +70°C
0°C to +70°C
–40°C to +85°C
–40°C to +85°C
-40°C to +85°C
–40°C to +85°C
N-8
SO-8
N-8
SO-8
RM-8
Q-8
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V
readily accumulate on the human body and test equipment and can discharge without
detection. Although the ADM1486 features proprietary ESD protection circuitry,
permanent damage may occur on devices subjected to high-energy electrostatic
discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
REV. PrB
–3–
WARNING!
ESD SENSITIVE DEVICE
PRELIMINARY TECHNICAL DATA
ADM1486
Test Circuits
VCC
A
R
RL
DE
R
S2
S1
0V OR 3V
VOD
VOC
CL
B
VOUT
DE IN
Figure 4. Driver Enable/Disable Test Circuit
Figure 1. Driver Voltage Measurement Test Circuit
375⍀
A
VOD3
VTST
60⍀
VOUT
RE
B
CL
375⍀
Figure 2. Driver Voltage Measurement Test Circuit 2
Figure 5. Receiver Propagation Delay Test Circuit
VCC
+1.5V
A
S1
CL1
RL
S2
–1.5V
RLDIFF
RE
CL
CL2
B
VOUT
RE IN
Figure 3. Driver Propagation Delay Test Circuit
Figure 6. Receiver Enable/Disable Test Circuit
Switching Characteristics
3V
1.5V
0V
1.5V
TPLH
A, B
0V
0V
TPLH
TPHL
TPHL
B
1/2VO
VO
VOH
A
TSKEW
VO
TSKEW
RO
1.5V
1.5V
90% POINT
90% POINT
0V
–VO
VOL
10% POINT
10% POINT
Figure 9. Receiver Propagation Delay
TF
TR
Figure 7. Driver Propagation Delay, Rise/Fall Timing
3V
3V
RE
DE
1.5V
1.5V
0V
0V
TZL
TZL
TLZ
TLZ
1.5V
R
2.3V
A, B
1.5V
1.5V
VOL
O/P HIGH
VOH
A, B
VOL
THZ
TZH
THZ
TZH
VOL +0.5V
O/P LOW
VOL +0.5V
VOH –0.5V
R
2.3V
0V
1.5V
VOH
VOH –0.5V
0V
Figure 8. Driver Enable/Disable Timing
Figure 10. Receiver Enable/Disable Timing
–4–
REV. PrB
PRELIMINARY TECHNICAL DATA
ADM1486
RT
RT
D
D
R
R
R
R
D
D
Figure 11. Typical RS-485 Network
Table III. Comparison of RS-422 and RS-485 Interface Standards
REV. PrB
Specification
RS-422
RS-485
PROFIBUS
Transmission Type
Maximum Cable Length
Minimum Driver Output Voltage
Driver Load Impedance
Receiver Input Resistance
Receiver Input Sensitivity
Receiver Input Voltage Range
No of Drivers/Receivers Per Line
Differential
4000 ft.
±2 V
100⍀
4 k⍀ min
±200 mV
–7 V to +7 V
1/10
Differential
4000 ft.
±1.5 V
54⍀
12 k⍀ min
±200 mV
–7 V to +12 V
32/32
Differential
±2.1 V
54⍀
200 k⍀ min
±200 mV
–7 V to +12 V
50/50
–5–
PRELIMINARY TECHNICAL DATA
ADM1486
flowing through each wire, thereby, reducing the effective
inductance of the pair.
APPLICATIONS INFORMATION
Differential Data Transmission
Differential data transmission is used to reliably transmit
data at high rates over long distances and through noisy
environments. Differential transmission nullifies the effects
of ground shifts and noise signals which appear as
common-mode voltages on the line. There are two main
standards approved by the Electronics Industries Association
(EIA) which specify the electrical characteristics of transceivers used in differential data transmission.
The RS-422 standard specifies data rates up to 10 MBaud
and line lengths up to 4000 ft. A single driver can drive a
transmission line with up to 10 receivers.
In order to cater for true multipoint communications, the
RS-485 standard was defined. This standard meets or
exceeds all the requirements of RS-422 but also allows for
up to 32 drivers and 32 receivers to be connected to a
single bus. An extended common-mode range of –7 V to
+12 V is defined. The most significant difference between
RS-422 and RS-485 is the fact that the drivers may be
disabled thereby allowing more than one (32 in fact) to be
connected to a single line. Only one driver should be
enabled at time, but the RS-485 standard contains additional specifications to guarantee device safety in the event
of line contention.
Cable and Data Rate
The transmission line of choice for RS-485
communications is a twisted pair. Twisted pair cable tends
to cancel common-mode noise and also causes cancellation of the magnetic fields generated by the current
The ADM1486 is designed for bidirectional data communications on multipoint transmission lines. A typical
application showing a multipoint transmission network is
illustrated in Figure 11. An RS-485 transmission line can
have as many as 32 transceivers on the bus. Only one
driver can transmit at a particular time but multiple
receivers may be enabled simultaneously.
As with any transmission line, it is important that
reflections are minimized. This may be achieved by
terminating the extreme ends of the line using resistors
equal to the characteristic impedance of the line. Stub
lengths of the main line should also be kept as short as
possible. A properly terminated transmission line appears
purely resistive to the driver.
Thermal Shutdown
The ADM1486 contains thermal shutdown circuitry
which protects the part from excessive power dissipation
during fault conditions. Shorting the driver outputs to a
low impedance source can result in high driver currents.
The thermal sensing circuitry detects the increase in die
temperature and disables the driver outputs. The thermal
sensing circuitry is designed to disable the driver outputs
when a die temperature of 150°C is reached. As the device
cools, the drivers are re-enabled at 140°C.
Propagation Delay
The ADM1486 features very low propagation delay
ensuring maximum baud rate operation. The driver is
well balanced ensuring distortion free transmission.
Another important specification is a measure of the skew
between the complementary outputs. Excessive skew
impairs the noise immunity of the system and increases
the amount of electromagnetic interference (EMI).
Receiver Open-Circuit Fail Safe
The receiver input includes a fail-safe feature which
guarantees a logic high on the receiver when the inputs
are open circuit or floating.
–6–
REV. PrB
PRELIMINARY TECHNICAL DATA
ADM1486
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
8-Lead SOIC (SO-8)
0.1968 (5.00)
0.1890 (4.80)
0.1574 (4.00)
0.1497 (3.80)
8
5
1
4
0.2440 (6.20)
0.2284 (5.80)
PIN 1
0.0196 (0.50)
ⴛ 45ⴗ
0.0099 (0.25)
0.0500 (1.27)
BSC
0.0688 (1.75)
0.0532 (1.35)
0.0098 (0.25)
0.0040 (0.10)
8ⴗ
0.0500 (1.27)
0.0098 (0.25) 0ⴗ
0.0160 (0.41)
0.0075 (0.19)
0.0192 (0.49)
0.0138 (0.35)
SEATING
PLANE
8-Lead Plastic DIP (N-8)
0.430 (10.92)
0.348 (8.84)
8
5
1
0.280 (7.11)
0.240 (6.10)
4
0.325 (8.25)
0.300 (7.62)
PIN 1
0.100 (2.54)
BSC
0.060 (1.52)
0.015 (0.38)
0.210
(5.33)
MAX
0.195 (4.95)
0.115 (2.93)
0.130
(3.30)
MIN
0.160 (4.06)
0.115 (2.93)
0.015 (0.381)
0.008 (0.204)
0.022 (0.558) 0.070 (1.77) SEATING
0.014 (0.356) 0.045 (1.15) PLANE
8-Lead Cerdip (Q-8)
0.005 (0.13)
MIN
0.055 (1.4)
MAX
8
5
0.310 (7.87)
0.220 (5.59)
1
4
PIN 1
0.405 (10.29)
MAX
0.200 (5.08)
MAX
0.200 (5.08)
0.125 (3.18)
0.023 (0.58) 0.100 0.070 (1.78)
0.014 (0.36) (2.54) 0.030 (0.76)
BSC
REV. PrB
0.320 (8.13)
0.290 (7.37)
0.060 (1.52)
0.015 (0.38)
0.150
(3.81)
MIN
SEATING
PLANE
–7–
15°
0°
0.015 (0.38)
0.008 (0.20)
PRELIMINARY TECHNICAL DATA
ADM1486
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
8-Lead µSOIC (RM-8)
0.122 (3.10)
0.114 (2.90)
8
5
0.193
(4.90)
BSC
0.122 (3.10)
0.114 (2.90)
1
4
PIN 1
0.0256 (0.65) BSC
0.037 (0.95)
0.030 (0.75)
0.043
(1.10)
MAX
0.006 (0.15)
0.002 (0.05)
0.016 (0.40)
0.010 (0.25)
6ⴗⴗ
0ⴗⴗ
SEATING
0.009 (0.23)
PLANE
0.005 (0.13)
–8–
0.028 (0.70)
0.016 (0.40)
REV. PrB
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