CD74HC138-Q1
HIGH-SPEED CMOS LOGIC
3- TO 8-LINE INVERTING DECODER/DEMULTIPLEXER
SCLS580A − APRIL 2004 − REVISED APRIL 2008
D Qualified for Automotive Applications
D Select One of Eight Data Outputs Active
D
D
D
D
Low
I/O Port or Memory Selector
Three Enable Inputs to Simplify Cascading
Typical Propagation Delay of 13 ns at
VCC = 5 V, CL = 15 pF, TA = 255C
Fanout (Over Temperature Range)
− Standard Outputs . . . 10 LSTTL Loads
− Bus Driver Outputs . . . 15 LSTTL Loads
D Significant Power Reduction Compared to
LSTTL Logic ICs
D 2-V to 6-V VCC Operation
D High Noise Immunity; NIL or NIH = 30% of
VCC, VCC = 5 V
M PACKAGE
(TOP VIEW)
A0
A1
A2
E1
E2
E3
Y7
GND
D Balanced Propagation Delay and Transition
Times
description/ordering information
1
16
2
15
3
14
4
13
5
12
6
11
7
10
8
9
VCC
Y0
Y1
Y2
Y3
Y4
Y5
Y6
The CD74HC138 is a high-speed silicon-gate CMOS
decoder well suited to memory address decoding or
data routing applications. This circuit features low
power consumption usually associated with CMOS circuitry, yet has speeds comparable to low-power Schottky
TTL logic. The circuit has three binary select inputs (A0, A1, and A2). If the device is enabled, these inputs
determine which one of the eight normally high outputs of the HC138 will go low.
Two active-low and one active-high enables (E1, E2, and E3) are provided to ease the cascading of decoders.
The decoder’s eight outputs can drive ten low-power Schottky TTL equivalent loads.
ORDERING INFORMATION{
PACKAGE‡
TA
−40°C to 125°C
SOIC − M
Reel of 2500
ORDERABLE
PART NUMBER
CD74HC138QM96Q1
TOP-SIDE
MARKING
HC138Q
†
For the most current package and ordering information, see the Package Option Addendum at the
end of this document, or see the TI web site at http://www.ti.com.
‡ Package drawings, thermal data, and symbolization are available at http://www.ti.com/packaging.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 2008, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
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1
CD74HC138-Q1
HIGH-SPEED CMOS LOGIC
3- TO 8-LINE INVERTING DECODER/DEMULTIPLEXER
SCLS580A − APRIL 2004 − REVISED APRIL 2008
FUNCTION TABLE
SELECT INPUTS
ENABLE INPUTS
E3
E2
E1
A2
A1
X
X
L
X
H
X
X
X
X
X
A0
OUTPUTS
Y0
Y1
Y2
Y3
Y4
Y5
Y6
X
H
H
H
H
H
H
H
H
X
H
H
H
H
H
H
H
H
X
H
X
X
X
X
H
H
H
H
H
H
H
H
H
L
L
L
L
L
L
H
H
H
H
H
H
H
H
L
L
L
L
H
H
L
H
H
H
H
H
H
H
L
L
L
H
L
H
H
L
H
H
H
H
H
H
L
L
L
H
H
H
H
H
L
H
H
H
H
H
L
L
H
L
L
H
H
H
H
L
H
H
H
H
L
L
H
L
H
H
H
H
H
H
L
H
H
H
L
L
H
H
L
H
H
H
H
H
H
L
H
H
L
L
H
H
H
H
H
H
H
H
H
H
L
NOTE: H = High voltage level, L = Low voltage level, X = Don’t care
logic diagram (positive logic)
15
A0
Y0
1
14
Y1
13
Select
Inputs
A1
Y2
2
12
11
3
Y3
Data
Outputs
Y4
A2
10
9
E1
Enable
Inputs
E2
E3
2
Y7
4
7
5
6
POST OFFICE BOX 655303
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Y5
Y6
Y7
CD74HC138-Q1
HIGH-SPEED CMOS LOGIC
3- TO 8-LINE INVERTING DECODER/DEMULTIPLEXER
SCLS580A − APRIL 2004 − REVISED APRIL 2008
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
Input clamp current, IIK (VI < −0.5 V or VI > VCC + 0.5 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
Output clamp current, IOK (VO < −0.5 V or VO > VCC + 0.5 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
Source or sink current per output pin, IO (VO > −0.5 V or VO < VCC + 0.5 V) . . . . . . . . . . . . . . . . . . . . ±25 mA
Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
Package thermal impedance, θJA (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73°C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltages referenced to GND unless otherwise specified.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions (see Note 3)
VCC
Supply voltage
VCC = 2 V
VIH
VCC = 4.5 V
High-level
High
level input voltage
VCC = 6 V
MIN
MAX
2
6
3.15
0.5
1.35
VCC = 6 V
VI
Input voltage
VO
Output voltage
tt
Input transition (rise and fall) time
TA
Operating free-air temperature
V
4.2
VCC = 4.5 V
Low-level
Low
level input voltage
V
1.8
0
VCC
V
V
0
VCC
VCC = 2 V
0
1000
VCC = 4.5 V
0
500
0
400
−40
125
VCC = 6 V
V
1.5
VCC = 2 V
VIL
UNIT
ns
°C
NOTES: 3. All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
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3
CD74HC138-Q1
HIGH-SPEED CMOS LOGIC
3- TO 8-LINE INVERTING DECODER/DEMULTIPLEXER
SCLS580A − APRIL 2004 − REVISED APRIL 2008
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
CMOS loads
VOH
VI = VIH or VIL
TTL loads
CMOS loads
VOL
VI = VIH or VIL
TTL loads
II
VI = VCC or GND
ICC
VI = VCC or GND
TA = −40°C
TO 125°C
TA = 25°C
IO
(mA)
VCC
−0.02
2V
1.9
1.9
−0.02
4.5 V
4.4
4.4
−0.02
6V
5.9
5.9
−4
4.5 V
3.98
3.7
−5.2
6V
5.48
0.02
2V
0.1
0.1
0.02
4.5 V
0.1
0.1
MIN
TYP
MAX
MIN
UNIT
MAX
V
5.2
0.02
6V
0.1
0.1
4
4.5 V
0.26
0.4
5.2
6V
0.26
0.4
6V
±0.1
±1
µA
6V
8
160
µA
10
10
pF
0
CIN
V
switching characteristics over recommended operating free-air temperature range (unless
otherwise noted) (see Figure 1)
PARAMETER
FROM
(INPUT)
A
TO
(OUTPUT)
Y
LOAD
CAPACITANCE
VCC
CL = 15 pF
5V
CL = 50 pF
tpd
E
tt
Y
Y
CL = 50 pF
CL = 50 pF
p
TA = −40°C
TO 125°C
TA = 25°C
MIN
TYP
MAX
MIN
UNIT
MAX
13
2V
150
225
4.5 V
30
45
6V
26
38
2V
150
265
4.5 V
30
53
6V
26
45
2V
75
110
4.5 V
15
22
6V
13
19
ns
ns
operating characteristics, VCC = 5 V, TA = 25°C, Input tr, tf = 6 ns, CL = 15 pF
PARAMETER
Cpd
TYP
Power dissipation capacitance (see Note 4)
67
NOTE 4: Cpd is used to determine the dynamic power consumption, per gate.
PD = VCC2 fI (Cpd + CL)
fI = input frequency
CL = output load capacitance
VCC = supply voltage
4
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UNIT
pF
CD74HC138-Q1
HIGH-SPEED CMOS LOGIC
3- TO 8-LINE INVERTING DECODER/DEMULTIPLEXER
SCLS580A − APRIL 2004 − REVISED APRIL 2008
PARAMETER MEASUREMENT INFORMATION
From Output
Under Test
VCC
Test
Point
Input
50%
50%
0V
CL = 50 pF
(see Note A)
tPLH
In-Phase
Output
LOAD CIRCUIT
50%
10%
tPHL
90%
90%
tr
Input
50%
10%
90%
90%
tr
tPHL
VCC
50%
10% 0 V
Out-of-Phase
Output
90%
tf
VOLTAGE WAVEFORM
INPUT RISE AND FALL TIMES
VOH
50%
10%
VOL
tf
tPLH
50%
10%
tf
50%
10%
90%
VOH
VOL
tr
VOLTAGE WAVEFORMS
PROPAGATION DELAY AND OUTPUT TRANSITION TIMES
NOTES: A. CL includes probe and test-fixture capacitance.
B. Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having the following
characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr = 6 ns, tf = 6 ns.
C. The outputs are measured one at a time, with one input transition per measurement.
D. tPLH and tPHL are the same as tpd.
Figure 1. Load Circuit and Voltage Waveforms
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5
PACKAGE OPTION ADDENDUM
www.ti.com
23-Mar-2010
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
CD74HC138QM96G4Q1
ACTIVE
SOIC
D
16
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
CD74HC138QM96Q1
ACTIVE
SOIC
D
16
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
Lead/Ball Finish
MSL Peak Temp (3)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF CD74HC138-Q1 :
CD74HC138
• Catalog:
• Military: CD54HC138
NOTE: Qualified Version Definitions:
- TI's standard catalog product
• Catalog
• Military - QML certified for Military and Defense Applications
Addendum-Page 1
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