Murata ADS-916GC 14-bit, 500khz, low-power sampling a/d converter Datasheet

®
®
ADS-926
14-Bit, 500kHz, Low-Power
Sampling A/D Converters
FEATURES
•
•
•
•
•
•
•
•
•
14-bit resolution
500kHz sampling rate
Functionally complete; No missing codes
Small 24-pin DDIP or SMT package
Operates from ±15V or ±12V supplies
Low power, 1.75 Watts maximum
Samples up to Nyquist frequencies
Outstanding dynamic performance
Bipolar ±5V input range
GENERAL DESCRIPTION
The ADS-926 is a high-performance, 14-bit, 500kHz sampling
A/D converter. This device accurately samples full-scale input
signals up to Nyquist frequencies with no missing codes and
exhibits outstanding dynamic performance that surpasses
most 16-bit, 500kHz sampling A/D's. THD and SNR, for
example, are typically –90dB and 80dB when converting fullscale input signals up to 100kHz.
INPUT/OUTPUT CONNECTIONS
Housed in a small 24-pin DDIP or SMT (gull-wing) package,
the functionally complete ADS-926 contains a fast-settling
sample-hold amplifier, a subranging (two-pass) A/D converter,
a precise voltage reference, timing/control logic, and errorcorrection circuitry. Digital input and output levels are TTL.
Requiring ±15V (or ±12V) and +5V supplies, the ADS-926
dissipates only 1.75W (1.6W for ±12V), maximum. The unit is
offered with a bipolar input (–5V to +5V). Models are available
for use in either commercial (0 to +70°C) or military (–55 to
+125°C) operating temperature ranges.
PIN
FUNCTION
PIN
1
2
3
4
5
6
7
8
9
10
11
12
BIT 14 (LSB)
BIT 13
BIT 12
BIT 11
BIT 10
BIT 9
BIT 8
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
24
23
22
21
20
19
18
17
16
15
14
13
FUNCTION
–12V/–15V SUPPLY
ANALOG GROUND
+12V/+15V SUPPLY
+10V REFERENCE OUT
ANALOG INPUT
ANALOG GROUND
BIT 1 (MSB)
BIT 2
START CONVERT
EOC
DIGITAL GROUND
+5V SUPPLY
Applications include radar, sonar, spectrum analysis, and
graphic/medical imaging. Contact DATEL for information on
devices screened to MIL-STD-883.
DAC
18 BIT 1 (MSB)
17 BIT 2
+10V REF. OUT 21
REF
FLASH
ADC
S/H
ANALOG INPUT 20
S1
REGISTER
S2
BUFFER
–
REGISTER
+
DIGITAL CORRECTION LOGIC
12 BIT 3
11 BIT 4
10 BIT 5
9
BIT 6
8
BIT 7
7
BIT 8
6
BIT 9
5
BIT 10
4
BIT 11
3
BIT 12
2
BIT 13
1
BIT 14 (LSB)
START CONVERT 16
TIMING AND
CONTROL LOGIC
EOC 15
13
14
22
19, 23
24
+5V SUPPLY
DIGITAL GROUND
+12V/+15V SUPPLY
ANALOG GROUND
–12V/–15V SUPPLY
Figure 1. ADS-926 Functional Block Diagram
DATEL, Inc., 11 Cabot Boulevard, Mansfield, MA 02048-1151 (U.S.A.) • Tel: (508) 339-3000 Fax: (508) 339-6356 • For immediate assistance: (800) 233-2765
®
®
ADS-926
ABSOLUTE MAXIMUM RATINGS
PARAMETERS
+12V/+15V Supply (Pin 22)
–12V/–15V Supply (Pin 24)
+5V Supply (Pin 13)
Digital Input (Pin 16)
Analog Input (Pin 20)
Lead Temperature (10 seconds)
PHYSICAL/ENVIRONMENTAL
LIMITS
UNITS
0 to +16
0 to –16
0 to +6
–0.3 to +VDD +0.3
±15
+300
Volts
Volts
Volts
Volts
Volts
°C
PARAMETERS
Operating Temp. Range, Case
ADS-926MC, GC
ADS-926MM, GM, 883
Thermal Impedance
θjc
θca
Storage Temperature
Package Type
Weight
MIN.
TYP.
MAX.
UNITS
0
–55
—
—
+70
+125
°C
°C
6
°C/Watt
24
°C/Watt
–65
—
+150
°C
24-pin, metal-sealed, ceramic DDIP or SMT
0.42 ounces (12 grams)
FUNCTIONAL SPECIFICATIONS
(TA = +25°C, ±VCC = ±15V (or ±12V), +VDD = +5V, 500kHz sampling rate, and a minimum 1 minute warmup ➀ unless otherwise specified.)
+25°C
ANALOG INPUT
Input Voltage Range ➁
Input Resistance
Input Capacitance
0 to +70°C
MIN.
TYP.
MAX.
—
—
—
±5
1
7
—
—
15
+2.0
—
—
—
175
—
—
—
—
200
—
—
—
—
—
—
—
14
MIN.
–55 to +125°C
TYP.
MAX.
—
—
—
±5
1
7
—
—
15
—
+0.8
+20
–20
225
+2.0
—
—
—
175
—
—
—
—
200
14
±0.5
±0.5
±0.08
±0.05
±0.05
±0.1
—
—
—
±0.95
±0.15
±0.1
±0.1
±0.15
—
—
—
—
—
—
—
—
14
—
—
–92
–90
–88
–85
—
—
–90
–87
78
78
MIN.
TYP.
MAX.
UNITS
—
—
—
±5
1
7
—
—
15
Volts
kΩ
pF
—
+0.8
+20
–20
225
+2.0
—
—
—
175
—
—
—
—
200
—
+0.8
+20
–20
225
Volts
Volts
µA
µA
ns
14
±0.75
±0.5
±0.15
±0.1
±0.1
±0.15
—
—
—
±0.95
±0.25
±0.25
±0.25
±0.25
—
—
—
—
—
—
—
—
14
14
±1.5
±0.75
±0.3
±0.15
±0.25
±0.25
—
—
—
±0.99
±0.5
±0.3
±0.4
±0.4
—
Bits
LSB
LSB
%FSR
%FSR
%FSR
%
Bits
—
—
–90
–90
–85
–85
—
—
–88
–86
–81
–80
dB
dB
–86
–82
—
—
–89
–87
–82
–82
—
—
–87
–81
–78
–76
dB
dB
80
80
—
—
78
78
80
80
—
—
74
74
78
77
—
—
dB
dB
77
77
79
79
—
—
77
77
79
79
—
—
74
73
78
77
—
—
dB
dB
—
—
–87
300
—
—
—
—
–86
300
—
—
—
—
–85
350
—
—
dB
µVrms
—
—
—
—
—
—
7
3
84
±40
±20
5
—
—
—
—
—
—
—
—
—
—
—
—
7
3
84
±40
±20
5
—
—
—
—
—
—
—
—
—
—
—
—
7
3
84
±40
±20
5
—
—
—
—
—
—
MHz
MHz
dB
V/µs
ns
ps rms
1335
—
500
1390
1400
—
1445
2000
—
1335
—
500
1390
1400
—
1445
2000
—
1335
—
500
1390
1400
—
1445
2000
—
ns
ns
kHz
DIGITAL INPUT
Logic Levels
Logic "1"
Logic "0"
Logic Loading "1"
Logic Loading "0"
Start Convert Positive Pulse Width ➂
STATIC PERFORMANCE
Resolution
Integral Nonlinearity (fin = 10kHz)
Differential Nonlinearity (fin = 10kHz)
Full Scale Absolute Accuracy
Bipolar Zero Error (Tech Note 2)
Bipolar Offset Error (Tech Note 2)
Gain Error (Tech Note 2)
No Missing Codes (fin = 10kHz)
DYNAMIC PERFORMANCE
Peak Harmonics (–0.5dB)
dc to 100kHz
100kHz to 250kHz
Total Harmonic Distortion (–0.5dB)
dc to 100kHz
100kHz to 250kHz
Signal-to-Noise Ratio
(w/o distortion, –0.5dB)
dc to 100kHz
100kHz to 250kHz
Signal-to-Noise Ratio ➃
(& distortion, –0.5dB)
dc to 100kHz
100kHz to 250kHz
Two-Tone Intermodulation
Distortion (fin = 100kHz,
240kHz, fs = 500kHz, –0.5dB)
Noise
Input Bandwidth (–3dB)
Small Signal (–20dB input)
Large Signal (–0.5dB input)
Feedthrough Rejection (fin = 250kHz)
Slew Rate
Aperture Delay Time
Aperture Uncertainty
S/H Acquisition Time
(to ±0.003%FSR, 10V step)
Overvoltage Recovery Time ➄
A/D Conversion Rate
2
®
®
ADS-926
+25°C
0 to +70°C
ANALOG OUTPUT
MIN.
TYP.
MAX.
Internal Reference
Voltage
Drift
External Current
+9.95
—
—
+10.0
±5
—
+10.05
—
1.5
+2.4
—
—
—
—
—
—
—
—
MIN.
–55 to +125°C
TYP.
MAX.
MIN.
TYP.
MAX.
UNITS
+9.95
—
—
+10.0
±5
—
+10.05
—
1.5
+9.95
—
—
+10.0
±5
—
+10.05
—
1.5
Volts
ppm/°C
mA
—
+0.4
–4
+4
+2.4
—
—
—
—
—
—
—
—
+0.4
–4
+4
+2.4
—
—
—
—
—
—
—
—
+0.4
–4
+4
Volts
Volts
mA
mA
—
35
—
—
Offset Binary
35
—
—
35
ns
+14.5
–14.5
+4.75
+15.0
–15.0
+5.0
+15.5
–15.5
+5.25
+14.5
–14.5
+4.75
+15.0
–15.0
+5.0
+15.5
–15.5
+5.25
+14.5
–14.5
+4.75
+15.0
–15.0
+5.0
+15.5
–15.5
+5.25
Volts
Volts
Volts
—
—
—
—
—
+41
–23
+71
1.4
—
+60
–40
+85
1.75
±0.02
—
—
—
—
—
+41
–23
+71
1.4
—
+60
–40
+85
1.75
±0.02
—
—
—
—
—
+41
–23
+71
1.4
—
+60
–40
+85
1.75
±0.02
mA
mA
mA
Watts
%FSR/%V
+14.5
–14.5
+4.75
+15.0
–15.0
+5.0
+15.5
–15.5
+5.25
+14.5
–14.5
+4.75
+15.0
–15.0
+5.0
+15.5
–15.5
+5.25
+14.5
–14.5
+4.75
+15.0
–15.0
+5.0
+15.5
–15.5
+5.25
Volts
Volts
Volts
—
—
—
—
—
+41
–23
+71
1.3
—
+60
–40
+85
1.6
±0.02
—
—
—
—
—
+41
–23
+71
1.3
—
+60
–40
+85
1.6
±0.02
—
—
—
—
—
+41
–23
+71
1.3
—
+60
–40
+85
1.6
±0.02
mA
mA
mA
Watts
%FSR/%V
DIGITAL OUTPUTS
Logic Levels
Logic "1"
Logic "0"
Logic Loading "1"
Logic Loading "0"
Delay, Falling Edge of EOC
to Output Data Valid
Output Coding
POWER REQUIREMENTS, ±15V
Power Supply Ranges
+15V Supply
–15V Supply
+5V Supply
Power Supply Currents
+15V Supply
–15V Supply
+5V Supply
Power Dissipation
Power Supply Rejection
POWER REQUIREMENTS, ±12V
Power Supply Ranges
+12V Supply
–12V Supply
+5V Supply
Power Supply Currents
+12V Supply
–12V Supply
+5V Supply
Power Dissipation
Power Supply Rejection
Footnotes:
➀ All power supplies must be on before applying a start convert pulse. All supplies
and the clock (START CONVERT) must be present during warmup periods. The
device must be continuously converting during this time.
➃ Effective bits is equal to:
(SNR + Distortion) – 1.76 +
➁ See Ordering Information for 0 to +10V input range. Contact DATEL for availability
of other input voltage ranges.
20 log
Full Scale Amplitude
Actual Input Amplitude
6.02
➄ This is the time required before the A/D output data is valid after the analog input
is back within the specified range.
➂ A 500kHz clock with a 200ns wide start convert pulse is used for all production
testing. For applications requiring less than a 500kHz sampling rate, wider start
convert pulses can be used. See Timing Diagram for more details.
need for external calibration. If required, the device's small
initial offset and gain errors can be reduced to zero using
the input circuit of Figure 2. When using this circuit, or any
similar offset and gain-calibration hardware, make adjustments following warmup. To avoid interaction, always adjust
offset before gain.
TECHNICAL NOTES
1. Obtaining fully specified performance from the ADS-926
requires careful attention to pc-card layout and power
supply decoupling. The device's analog and digital ground
systems are connected to each other internally. For
optimal performance, tie all ground pins (14, 19 and 23)
directly to a large analog ground plane beneath the unit.
3. When operating the ADS-926 from ±12V supplies, do not
drive external circuitry with the REFERENCE OUTPUT. The
reference's accuracy and drift specifications may not be
met, and loading the circuit may cause accuracy errors
within the converter.
Bypass all power supplies and the REFERENCE OUTPUT
(pin 21) to ground with 4.7µF tantalum capacitors in parallel
with 0.1µF ceramic capacitors. Locate the bypass capacitors as close to the unit as possible. If the user-installed
offset and gain adjusting circuit shown in Figure 2 is used,
also locate it as close to the ADS-926 as possible.
4. Applying a start convert pulse while a conversion is in
progress (EOC = logic "1") initiates a new and inaccurate
conversion cycle. Data for the interrupted and subsequent
conversions will be invalid.
2. The ADS-926 achieves its specified accuracies without the
3
®
®
ADS-926
CALIBRATION PROCEDURE
Zero/Offset Adjust Procedure
(Refer to Figures 2 and 3)
1. Apply a train of pulses to the START CONVERT input
(pin 16) so the converter is continuously converting. If using
LED's on the outputs, a 200kHz conversion rate will reduce
flicker.
Any offset and/or gain calibration procedures should not be
implemented until devices are fully warmed up. To avoid
interaction, offset must be adjusted before gain. The ranges of
adjustment for the circuit of Figure 2 are guaranteed to
compensate for the ADS-926's initial accuracy errors and may
not be able to compensate for additional system errors.
2. Apply +305µV to the ANALOG INPUT (pin 20).
3. Adjust the offset potentiometer until the output bits are
a 1 and all 0's and the LSB flickers between 0 and 1.
All fixed resistors in Figure 2 should be metal-film types, and
multiturn potentiometers should have TCR’s of 100ppm/°C or
less to minimize drift with temperature.
Gain Adjust Procedure
1. Apply +4.999085V to the ANALOG INPUT (pin 20).
A/D converters are calibrated by positioning their digital outputs
exactly on the transition point between two adjacent digital
output codes. This can be accomplished by connecting LED's
to the digital outputs and adjusting until certain LED's "flicker"
equally between on and off. Other approaches employ digital
comparators or microcontrollers to detect when the outputs
change from one code to the next.
2. Adjust the gain potentiometer until the output bits are all 1's
and the LSB flickers between 1 and 0.
Table 1. Zero and Gain Adjust
INPUT VOLTAGE
RANGE
For the ADS-926, offset adjusting is normally accomplished at
the point where the MSB is a 1 and all other output bits are 0's
and the LSB just changes from a 0 to a 1. This digital output
transition ideally occurs when the applied analog input is
+½ LSB (+305µV).
±5V
+15V
20kΩ
–15V
SIGNAL
INPUT
1.2MΩ
2kΩ
GAIN
ADJUST
+15V
1.98kΩ
To Pin 20
of ADS-926
50Ω
GAIN ADJUST
+FS –1½ LSB
+305µV
+4.999085V
Table 2. Output Coding
Gain adjusting is accomplished when all bits are 1's and the
LSB just changes from a 1 to a 0. This transition ideally occurs
when the analog input is at +full scale minus 1½ LSB's
(+4.999085V).
ZERO/
OFFSET
ADJUST
ZERO ADJUST
+½ LSB
OUTPUT CODING
MSB
LSB
INPUT RANGE
±5V
BIPOLAR
SCALE
11 1111 1111 1111
11 1000 0000 0000
11 0000 0000 0000
10 0000 0000 0000
01 0000 0000 0000
00 1000 0000 0000
00 0000 0000 0001
00 0000 0000 0000
+4.99939
+3.75000
+2.50000
0.00000
–2.50000
–3.75000
–4.99939
–5.00000
+FS –1 LSB
+3/4 FS
+1/2FS
0
–1/2FS
–3/4FS
–FS +1 LSB
–FS
Coding is offset binary; 1LSB = 610µV.
–15V
Figure 2. ADS-926 Calibration Circuit
18 BIT 1 (MSB)
+5V
+
4.7µF
13
17 BIT 2
12 BIT 3
14 DIGITAL
GROUND
11 BIT 4
10 BIT 5
9 BIT 6
0.1µF
ADS-926
24
–12V/–15V
4.7µF
+
4.7µF
0.1µF
ANALOG
19, 23 GROUND
6 BIT 9
5 BIT 10
4 BIT 11
22
3 BIT 12
2 BIT 13
0.1µF
+
+12V/+15V
ANALOG
20 INPUT
–5V to +5V
1 BIT 14 (LSB)
15 EOC
21 +10V REF. OUT
0.1µF
8 BIT 7
7 BIT 8
+
START
16
CONVERT
4.7µF
Figure 3. Typical ADS-926 Connection Diagram
4
®
®
ADS-926
THERMAL REQUIREMENTS
Electrically-insulating, thermally-conductive "pads" may be
installed underneath the package. Devices should be soldered
to boards rather than "socketed", and of course, minimal air
flow over the surface can greatly help reduce the package
temperature.
All DATEL sampling A/D converters are fully characterized and
specified over operating temperature (case) ranges of
0 to +70°C and –55 to +125°C. All room-temperature
(TA = +25°C) production testing is performed without the use of
heat sinks or forced-air cooling. Thermal impedance figures for
each device are listed in their respective specification tables.
In more severe ambient conditions, the package/junction
temperature of a given device can be reduced dramatically
(typically 35%) by using one of DATEL's HS Series heat sinks.
See Ordering Information for the assigned part number. See
page 1-183 of the DATEL Data Acquisition Components
Catalog for more information on the HS Series. Request
DATEL Application Note AN-8, "Heat Sinks for DIP Data
Converters", or contact DATEL directly, for additional
information.
These devices do not normally require heat sinks, however,
standard precautionary design and layout procedures should
be used to ensure devices do not overheat. The ground and
power planes beneath the package, as well as all pcb signal
runs to and from the device, should be as heavy as possible to
help conduct heat away from the package.
N
START
CONVERT
N+1
200ns
±25ns
10ns typ.
Acquisition Time
Hold
610ns typ.
INTERNAL S/H
1390ns ±55ns
10ns typ.
70ns ±10ns
Conversion Time
EOC
480ns ±20ns
35ns max.
115ns max.
OUTPUT
DATA
Data N Valid (1885ns min.)
Data (N – 1) Valid
Invalid
Data
Notes: 1. fs = 500kHz.
2. The ADS-926 is a pulse-triggered device. Its internal operations
are triggered by both the rising and falling edges of the start
convert pulse. When sampling at 500kHz, the start pulse must be
between 175 and 225nsec wide. For lower sampling rates, wider
start pulses may be used, however, a 50nsec minimum pulse
width low must be maintained.
Figure 4. ADS-926 Timing Diagram
5
ANALOG
INPUT
11
13
15
17
19
21
23
12
14
16
18
20
22
24
6
SG1
26
50
+15V
3
2
C11
2.2MF
P3
+15V
-15V
C10
0.1MF
+5V
.1%
R4
1.98K
1.2M 5%
START
CONVERT
GAIN
ADJ
R1
C1
0.1MF
+
-
0.1%
2
1
-15V
C12
0.1MF
C9
2.2MF
6
AD845
C6
2.2MF
4
-15V
U5
C4
7 2.2MF
+15V
R5
2K
C2
15pF
U4
3
74LS86
2.2MF
C14
C15
0.1MF
+5V
13
12
10
9
24
23
22
21
20
19
18
17
16
15
14
13
5
4
2
3
4
5
6
7
8
9
10
11
12
74LS86
U4
B14 1
B13
B12
ADS-926/927
-15V
AGND
+15V
B11
B10
B9
B8
B7
B6
B5
B4
B3
C8
2.2MF
U1
+10VREF
INPUT
AGND
B1
B2
11
8
74LS86
STRTCONV
EOC'
DGND
+5V
C7
0.1MF
U4
U4
74LS86
6
Figure 5. ADS-926 Evaluation Board Schematic
7
14
+5V
C5
0.1
MF
C3
0.1MF
COG
C13
0.1MF
+
25
9
10
5
6
7
3
4
8
1
2
P1
P4
-15V
R2
20K
R3
+
+
+
OFFSET
ADJ
+
+
+15V
11
18
17
14
13
8
7
4
3
CLK
8D
7D
6D
5D
4D
3D
2D
1D
OC
8Q
7Q
6Q
5Q
10
OC
8Q
7Q
6Q
5Q
4Q
3Q
2Q
1Q
20
U3
1
19
16
15
12
9
6
5
1
19
16
15
12
9
6
5
2
C17
0.1MF
10
U2
4Q
3Q
2Q
1Q
2
C16
0.1MF
20
+5V
CLK
8D
7D
6D
5D
4D
3D
2D
1D
74ALS534
11
18
17
14
13
8
7
4
3
74ALS534
+5V
N/C
N/C
B14
B13
B12
B11
B10
B9
B8
B7
B6
B5
B4
B3
B2
B1
34
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
P2
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
®
®
ADS-926
®
®
ADS-926
0
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
–120
–130
–140
–150
0
25
50
75
100
125
150
175
200
Frequency (kHz)
(fs = 500kHz, fin = 240kHz, Vin = –0.5dB, 16,384-point FFT)
Figure 6. ADS-926 FFT Analysis
+0.59
DNL (LSB's)
0
Number of Occurrences
Amplitude Relative to Full Scale (dB)
–10
–0.57
0
0
Digital Output Code
Digital Output Code
16,384
16,384
Figure 7. ADS-926 Histogram and Differential Nonlinearity
7
225
250
®
®
ADS-926
MECHANICAL DIMENSIONS INCHES (mm)
1.31 MAX.
(33.27)
24-Pin DDIP
Versions
24
ADS-926MC
ADS-926MM
ADS-926/883
ADS-916MC
ADS-916MM
Dimension Tolerances (unless otherwise indicated):
2 place decimal (.XX) ±0.010 (±0.254)
3 place decimal (.XXX) ±0.005 (±0.127)
13
Lead Material: Kovar alloy
0.80 MAX.
(20.32)
1
Lead Finish: 50 microinches (minimum) gold plating
over 100 microinches (nominal) nickel plating
12
0.100 TYP.
(2.540)
1.100
(27.940)
0.235 MAX.
(5.969)
PIN 1 INDEX
0.200 MAX.
(5.080)
0.010
(0.254)
0.190 MAX.
(4.826)
0.100
(2.540)
24-Pin
Surface Mount
Versions
0.600 ±0.010
(15.240)
SEATING
PLANE
0.025
(0.635)
0.040
(1.016)
0.018 ±0.002
(0.457)
+0.002
–0.001
0.100
(2.540)
1.31 MAX.
(33.02)
Dimension Tolerances (unless otherwise indicated):
2 place decimal (.XX) ±0.010 (±0.254)
3 place decimal (.XXX) ±0.005 (±0.127)
13
24
ADS-926GC
ADS-926GM
ADS-916GC
ADS-916GM
0.80 MAX.
(20.32)
1
0.190 MAX.
(4.826)
Lead Material: Kovar alloy
Lead Finish: 50 microinches (minimum) gold plating
over 100 microinches (nominal) nickel plating
12
0.020 TYP.
(0.508)
0.060 TYP.
(1.524)
0.130 TYP.
(3.302)
PIN 1
INDEX
0.100
(2.540)
0.100 TYP.
(2.540)
0.020
(0.508)
0.015
(0.381)
MAX. radius
for any pin
0.010 TYP.
(0.254)
0.040
(1.016)
ORDERING INFORMATION
MODEL
NUMBER
ADS-926MC
ADS-926MM
ADS-926/883
ADS-926GC
ADS-926GM
ADS-916MC
ADS-916MM
ADS-916GC
ADS-916GM
®
OPERATING
TEMP. RANGE
0 to +70°C
–55 to +125°C
–55 to +125°C
0 to +70°C
–55 to +125°C
0 to +70°C
–55 to +125°C
0 to +70°C
–55 to +125°C
®
ANALOG
INPUT
Bipolar (±5V)
Bipolar (±5V)
Bipolar (±5V)
Bipolar (±5V)
Bipolar (±5V)
Unipolar (0 to +10V)*
Unipolar (0 to +10V)*
Unipolar (0 to +10V)*
Unipolar (0 to +10V)*
ACCESSORIES
ADS-B926/927
HS-24
Receptacles for PC board mounting can be ordered through
AMP Inc. Part #3-331272-8 (Component Lead Socket), 24 required.
For MIL-STD-883 product specifications, contact DATEL.
* For information, see ADS-916 data sheet.
ISO 9001
R
E
DATEL, Inc. 11 Cabot Boulevard, Mansfield, MA 02048-1151
Tel: (508) 339-3000 (800) 233-2765
Fax: (508) 339-6356
Internet: www.datel.com E-mail:[email protected]
Data Sheet Fax Back: (508) 261-2857
G
Evaluation Board (without ADS-926)
Heat Sinks for all ADS-916/926 DDIP models.
I
S
T
E
R
E
D
DS-0265C
11/96
DATEL (UK) LTD. Tadley, England Tel: (01256)-880444
DATEL S.A.R.L. Montigny Le Bretonneux, France Tel: 1-34-60-01-01
DATEL GmbH München, Germany Tel: 89-544334-0
DATEL KK Tokyo, Japan Tel: 3-3779-1031, Osaka Tel: 6-354-2025
DATEL makes no representation that the use of its products in the circuits described herein, or the use of other technical information contained herein, will not infringe upon existing or future patent rights. The descriptions contained herein
do not imply the granting of licenses to make, use, or sell equipment constructed in accordance therewith. Specifications are subject to change without notice. The DATEL logo is a registered DATEL, Inc. trademark.
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