Rohm BD9122GUL Output 0.5a or less high efficiency step-down switching regulator with built-in power mosfet Datasheet

Single-chip Type with built-in FET Switching Regulator Series
Output 0.5A or Less High Efficiency
Step-down Switching Regulator
with Built-in Power MOSFET
No.09027EAT31
BD9122GUL
●Description
ROHM’s high efficiency step-down switching regulator (BD9122GUL) is a power supply designed to produce a low voltage
including 1 volts from 5/3.3 volts power supply line. Offers high efficiency with our original pulse skip control technology and
synchronous rectifier. Employs a current mode control system to provide faster transient response to sudden change in load.
●Features
1) Offers fast transient response with current mode PWM control system.
TM
2) Offers highly efficiency for all load range with synchronous rectifier (Nch/Pch FET) and SLLM (Simple Light Load Mode)
3) Incorporates soft-start function.
4) Incorporates thermal protection and ULVO functions.
5) Incorporates short-current protection circuit with time delay function.
6) Incorporates shutdown function
7) Employs WL-CSP : VCSP50L2
●Use
Power supply for LSI including DSP, Micro computer and ASIC
●Absolute Maximum Ratings (Ta=25℃)
Parameter
VCC Voltage
PVCC Voltage
EN Voltage
SW,ITH Voltage
Power Dissipation
Operating temperature range
Storage temperature range
Maximum junction temperature
＊1
＊2
Symbol
VCC
PVCC
VEN
VSW,VITH
Pd
Topr
Tstg
Tjmax
Limits
-0.3～+7 ＊1
-0.3～+7 ＊1
-0.3～+7
-0.3～+7
660＊2
-25～+85
-55～+150
+150
Unit
V
V
V
V
mW
℃
℃
℃
Pd should not be exceeded.
Derating in done 5.28mW/℃ for temperatures above Ta=25℃, Mounted on 50mm×58mm×1.6mm Glass Epoxy PCB.
●Operating Conditions (Ta=25℃)
Parameter
VCC Voltage
PVCC Voltage
EN Voltage
SW average output
Output voltage Setting Range
＊3
＊4
Symbol
VCC *3
PVCC *3
EN
Isw *3
VOUT
Min.
2.5*4
2.5*4
0
1.0
Limits
Typ.
3.3
3.3
-
Max.
5.5
5.5
VCC
0.3
2.0
Unit
V
V
V
A
V
Pd should not be exceeded.
In case set output voltage 1.8V or more, VccMin = 2.7V.
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1/13
2009.05 - Rev.A
Technical Note
BD9122GUL
●Electrical Characteristics
◎(Ta=25℃, VCC=PVCC=3.3V, EN=VCC, R1=20kΩ, R2=10kΩ, unless otherwise specified.)
Limits
Parameter
Symbol
Min.
Typ.
Max.
Standby current
ISTB
-
Bias current
Unit
0
10
μA
Conditions
EN=GND
ICC
-
250
400
μA
EN Low voltage
VENL
-
GND
0.8
V
Standby mode
EN High voltage
VENH
2.0
VCC
-
V
Active mode
VEN=3.3V
EN input current
IEN
-
1
10
μA
FOSC
0.8
1
1.2
MHz
Pch FET ON resistance
RONP
-
0.3
0.6
Ω
PVCC=3.3V
Nch FET ON resistance
RONN
-
0.2
0.5
Ω
PVCC=3.3V
ADJ Voltage
VADJ
0.780
0.800
0.820
V
Output voltage
VOUT
-
1.200
-
V
ITH SInk current
ITHSI
10
20
-
μA
Oscillation frequency
ITH Source Current
VADJ=1.0V
ITHSO
10
20
-
μA
VADJ=0.6V
UVLO threshold voltage
VUVLO1
2.2
2.3
2.4
V
VCC=3→0V
UVLO release voltage
VUVLO2
2.22
2.35
2.5
V
VCC=0→3V
Soft start time
Timer latch time
TSS
0.5
1
2
ms
TLATCH
1
2
4
ms
VSCP
-
VOUT×0.5
-
V
Output Short circuit Threshold Voltage
SCP/TSD operated
VOUT=2→0V
●Block Diagram, Application Circuit
VCC
EN
VCC
VREF
3.3V
Input
PVCC
Current
Comp
R Q
+
S
Gm Amp SLOPE
CLK
OSC
+
VCC
Soft
Start
Current
Sense/
Protect
10µF
+
4.7µH
Driver
Logic
SW
4.7μF
UVLO
TSD
Output
PGND
SCP
GND
ADJ
ITH
RITH CITH
R1
R2
Fig.1 Block Diagram
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2/13
2009.05 - Rev.A
Technical Note
BD9122GUL
●Pin configuration
9122
Lot No.
SW B1
A1 PGND
(unit : mm)
PVcc B2
A2 GND
Vcc B3
A3 EN
ADJ B4
A4 ITH
TOP View
Fig.2 TOP View
Fig.3 Physical Dimension : VCSP50L2
●Pin number and function
Pin No.
Pin name
Pin function
A1
PGND
Nch FET source pin
A2
GND
A3
EN
Enable pin（Active High）
A4
ITH
Gm Amp output pin/Connected phase compensation capacitor
B1
SW
Pch/Nch FET drain output pin
B2
PVCC
Ground
Pch FET source pin
B3
VCC
Vcc power supply input pin
B4
ADJ
Output voltage detect pin
●Characteristics data(Reference data)
【VOUT=1.5V】
【VOUT=1.5V】
1.0
0.5
0.0
OUTPUT VOLTAGE:VOUT[V]
1.5
2.0
2.0
【VOUT=1.5V】
Ta=25℃
Io=0A
OUTPUT VOLTAGE:VOUT[V]
OUTPUT VOLTAGE:VOUT[V]
2.0
1.5
1.0
0.5
VCC=3.3V
Ta=25℃
Io=0A
1
2
3
4
INPUT VOLTAGE:VCC[V]
5
Fig.4 Vcc - VOUT
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1.0
0.5
VCC=3.3V
Ta=25℃
0.0
0.0
0
1.5
0
1
2
3
EN VOLTAGE:VEN[V]
Fig.5 VEN - VOUT
3/13
4
5
0
1
2
OUTPUT CURRENT:IOUT [A]
3
Fig.6 IOUT - VOUT
2009.05 - Rev.A
Technical Note
BD9122GUL
●Characteristics data(Reference data) – Continued
1.55
1.15
80
1.52
1.51
1.50
1.49
1.48
FREQUENCY:FOSC[MHz]
1.53
70
60
50
40
30
1.47
20
1.46
10
1.45
VCC=3.3V
Ta=25℃
-5
5
15
25
35
45
55
65
75
10
100
OUTPUT CURRENT:IOUT[mA]
TEMPERATURE:Ta[℃]
Fig. 7 Ta - VOUT
VCC=3.3V
1.8
0.30
PMOS
0.15
NMOS
0.10
0.05
0.00
45
55
65
75
370
1.4
1.2
1.0
0.8
0.6
85
FREQUENCY:FOSC[MHz]
55
65
75
85
VCC=3.3V
280
250
220
190
160
100
-5
5
15
25
35
1.2
45
55
65
75
85
-25 -15
-5
5
15
25
35
45
55
65
75
85
TEMPERATURE:Ta[℃]
Fig.12 Ta - Icc
【SLLMTM control
【VOUT=1.5V】
VCC=PVCC
=EN
1.1
45
310
Fig.11 Ta - VEN
Ta=25℃
25 35
340
TEMPERATURE:Ta[℃]
Fig.10 Ta – RONN, RONP
15
130
-25 -15
TEMPERATURE:Ta [℃]
5
400
VCC=3.3V
0.0
25 35
-5
Fig.9 Ta - Fosc
0.2
15
-25 -15
TEMPERATURE:Ta[℃]
0.4
5
0.90
CIRCUIT CURRENT:I CC [μA]
EN VOLTAGE:VEN[V]
0.20
-5
0.95
1000
1.6
0.25
-25 -15
VCC=3.3V
1.00
Fig.8 Efficiency
2.0
0.35
1.05
0.80
1
85
1.10
0.85
0
-25 -15
ON RESISTANCE:R ON [ Ω]
1.20
【VOUT=1.5V】
90
EFFICIENCY:η[%]
OUTPUT VOLTAGE:VOUT[V]
100
【VOUT=1.5V】
VCC=3.3V
Io=0A
1.54
VOUT=1.5V】
SW
1
VOUT
VOUT
0.9
0.8
2.5
4
INPUT VOLTAGE:VCC [V]
VCC=3.3V
Ta=25℃
Io=0A
5.5
Fig.13 Vcc - Fosc
【PWM control
VCC=3.3V
Ta=25℃
Fig.14 Soft start waveform
VOUT=1.5V】
Fig.15 SW waveform Io=10mA
【VOUT=1.8V】
【VOUT=1.8V】
VOUT
SW
VOUT
VOUT
VCC=3.3V
Ta=25℃
Fig.16 SW waveform Io=200mA
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IOUT
IOUT
VCC=3.3V
Ta=25℃
Fig.17 Transient Response
Io=50→125mA(10μs)
4/13
VCC=3.3V
Ta=25℃
Fig.18 Transient Response
o=125→50mA(10μs)
2009.05 - Rev.A
Technical Note
BD9122GUL
●Information on advantages
Advantage 1：Offers fast transient response with current mode control system.
BD9122GUL(transient response IO=50mA⇔125mA)
【VOUT=1.8V】
【VOUT=1.8V】
VOUT
VOUT
IOUT
IOUT
VCC=3.3V
Ta=25℃
VCC=3.3V
Ta=25℃
Io=50→125mA
Io=125→50mA
Fig.19 Comparison of transient response
Advantage 2： Offers high efficiency for all load range.
・For lighter load:
Utilizes the current mode control mode called SLLM for lighter load, which reduces various dissipation such as switching
dissipation (PSW), gate charge/discharge dissipation, ESR dissipation of output capacitor (PESR) and on-resistance
dissipation (PRON) that may otherwise cause degradation in efficiency for lighter load.
Achieves efficiency improvement for lighter load.
100
Efficiency η[%]
・For heavier load:
Utilizes the synchronous rectifying mode and the low on-resistance
MOS FETs incorporated as power transistor.
ON resistance of P-channel MOS FET : 0.3Ω(Typ.)
ON resistance of N-channel MOS FET : 0.2Ω(Typ.)
SLLMTM
②
50
①
PWM
①inprovement by SLLM system
②improvement by synchronous rectifier
0
0.001
0.01
0.1
Output current Io[A]
1
Fig.20 Efficiency
Achieves efficiency improvement for heavier load.
Offers high efficiency for all load range with the improvements mentioned above.
Advantage 3：・Supplied in smaller package due to small-sized power MOS FET incorporated.
・Output capacitor Co required for current mode control: 10μF ceramic capacitor
・Inductance L required for the operating frequency of 1 MHz: 2.2μH inductor
Reduces a mounting area required.
VCC
8mm
Cin
RITH
RITH
DC/DC
Convertor
Controller
L
VOUT
8mm
Co
CVCC
CITH
CIN CO
L
CITH
Fig.21 Example application
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5/13
2009.05 - Rev.A
Technical Note
BD9122GUL
●Operation
BD9122GUL is a synchronous rectifying step-down switching regulator that achieves faster transient response by employing
current mode PWM control system. It utilizes switching operation in PWM (Pulse Width Modulation) mode for heavier load,
while it utilizes SLLM (Simple Light Load Mode) operation for lighter load to improve efficiency.
○Synchronous rectifier
It does not require the power to be dissipated by a rectifier externally connected to a conventional DC/DC converter IC,
and its P.N junction shoot-through protection circuit limits the shoot-through current during operation, by which the power
dissipation of the set is reduced.
○Current mode PWM control
Synthesizes a PWM control signal with a inductor current feedback loop added to the voltage feedback.
・PWM (Pulse Width Modulation) control
The oscillation frequency for PWM is 1 MHz. SET signal form OSC turns ON a P-channel MOS FET (while a
N-channel MOS FET is turned OFF), and an inductor current IL increases. The current comparator (Current Comp)
receives two signals, a current feedback control signal (SENSE: Voltage converted from IL) and a voltage feedback
control signal (FB), and issues a RESET signal if both input signals are identical to each other, and turns OFF the
P-channel MOS FET (while a N-channel MOS FET is turned ON) for the rest of the fixed period. The PWM control
repeat this operation.
・SLLM (Simple Light Load Mode) control
When the control mode is shifted from PWM for heavier load to the one for lighter load or vise versa, the switching pulse
is designed to turn OFF with the device held operated in normal PWM control loop, which allows linear operation without
voltage drop or deterioration in transient response during the mode switching from light load to heavy load or vise versa
Although the PWM control loop continues to operate with a SET signal from OSC and a RESET signal from Current
Comp, it is so designed that the RESET signal is held issued if shifted to the light load mode, with which the switching is
tuned OFF and the switching pulses are thinned out under control. Activating the switching intermittently reduces the
switching dissipation and improves the efficiency.
SENSE
Current
Comp
RESET
VOUT
Level
Shift
R Q
FB
SET
Gm Amp.
ITH
IL
Driver
Logic
S
VOUT
SW
Load
OSC
Fig.22 Diagram of current mode PWM control
PVCC
Current
Comp
SENSE
PVCC
SENSE
Current
Comp
FB
FB
GND
SET
GND
RESET
GND
RESET
GND
SW
GND
SW
SET
IL
GND
IL(AVE)
IL
0A
VOUT
VOUT
VOUT(AVE)
VOUT(AVE)
Not switching
Fig.23 PWM switching timing chart
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Fig.24 SLLM
6/13
TM
switching timing chart
2009.05 - Rev.A
Technical Note
BD9122GUL
●Description of operations
・Soft-start function
EN terminal shifted to “High” activates a soft-starter to gradually establish the output voltage with the current limited during
startup, by which it is possible to prevent an overshoot of output voltage and an inrush current.
・Shutdown function
With EN terminal shifted to “Low”, the device turns to Standby Mode, and all the function blocks including reference
voltage circuit, internal oscillator and drivers are turned to OFF. Circuit current during standby is 0μF (Typ.).
・UVLO function
Detects whether the input voltage sufficient to secure the output voltage of this IC is supplied. And the hysteresis width of
50 mV (Typ.) is provided to prevent output chattering.
Hysteresis 50mV
VCC
EN
VOUT
Tss
Tss
Tss
Soft start
Standby mode
Operating mode
Standby
mode
Standby
mode
Operating mode
UVLO
UVLO
Operating mode
Standby mode
EN
UVLO
Fig.25 Soft start, Shutdown, UVLO timing chart
・Short-current protection circuit with time delay function
Turns OFF the output to protect the IC from breakdown when the incorporated current limiter is activated continuously for the
fixed time(TLATCH) or more. The output thus held tuned OFF may be recovered by restarting EN or by re-unlocking UVLO.
EN
Output OFF
latch
Output Short circuit
Threshold Voltage
VOUT
IL Limit
IL
t1<TLATCH
Standby
mode
t2=TLATCH
Operating mode
Standby
mode
Timer latch
EN
Operating mode
EN
Fig.26 Short-current protection circuit with time delay timing chart
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2009.05 - Rev.A
Technical Note
BD9122GUL
●Switching regulator efficiency
Efficiency ŋ may be expressed by the equation shown below:
POUT
POUT
VOUT×IOUT
η=
×100[%]=
×100[%]=
Vin×Iin
Pin
POUT+PDα
×100[%]
Efficiency may be improved by reducing the switching regulator power dissipation factors PDα as follows:
Dissipation factors:
2
1) ON resistance dissipation of inductor and FET：PD(I R)
2) Gate charge/discharge dissipation：PD(Gate)
3) Switching dissipation：PD(SW)
4) ESR dissipation of capacitor：PD(ESR)
5) Operating current dissipation of IC：PD(IC)
2
2
1)PD(I R)=IOUT ×(RCOIL+RON) (RCOIL[Ω]：DC resistance of inductor, RON[Ω]：ON resistance of FET, IOUT[A]：Output
current.)
2)PD(Gate)=Cgs×f×V (Cgs[F]：Gate capacitance of FET, f[H]：Switching frequency, V[V]：Gate driving voltage of FET)
Vin2×CRSS×IOUT×f
3)PD(SW)=
(CRSS[F]：Reverse transfer capacitance of FET, IDRIVE[A]：Peak current of gate.)
IDRIVE
2
4)PD(ESR)=IRMS ×ESR (IRMS[A]：Ripple current of capacitor, ESR[Ω]：Equivalent series resistance.)
5)PD(IC)=Vin×ICC (ICC[A]：Circuit current.)
●Consideration on permissible dissipation and heat generation
As this IC functions with high efficiency without significant heat generation in most applications, no special consideration is
needed on permissible dissipation or heat generation. In case of extreme conditions, however, including lower input
voltage, higher output voltage, heavier load, and/or higher temperature, the permissible dissipation and/or heat generation
must be carefully considered.
For dissipation, only conduction losses due to DC resistance of inductor and ON resistance of FET are considered.
Because the conduction losses are considered to play the leading role among other dissipation mentioned above including
gate charge/discharge dissipation and switching dissipation.
1.0
VCSP50L2(2.50×1.10mm□)
ROHM standard 1 layer board
Board size：50mm×58mm
θj-a=189.4℃/W
0.8
P=IOUT2×RON
RON=D×RONP+(1-D)RONN
Power dissipation:Pd [W]
0.66W
D：ON duty (=VOUT/VCC)
RCOIL：DC resistance of coil
RONP：ON resistance of P-channel MOS FET
RONN：ON resistance of N-channel MOS FET
IOUT：Output current
0.6
0.4
0.2
0
0
25
50
75
100
125
150
Ambient temperature:Ta [℃]
Fig.27 Thermal derating curve
(VCSP50L2)
If VCC=3.3V, VOUT=1.5V, RONP=0.3Ω, RONN=0.2Ω
IOUT=0.3A, for example,
D=VOUT/VCC=1.5/3.3=0.45
RON=0.45×0.3+(1-0.45)×0.2
=0.135+0.11
=0.245[Ω]
P=0.32×0.245≒22.1[mW]
As RONP is greater than RONN in this IC, the dissipation increases as the ON duty becomes greater. With the consideration
on the dissipation as above, thermal design must be carried out with sufficient margin allowed.
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8/13
2009.05 - Rev.A
Technical Note
BD9122GUL
●Selection of components externally connected
1. Selection of inductor (L)
IL
ΔIL
The inductance significantly depends on output ripple current.
As seen in the equation (1), the ripple current decreases as the
inductor and/or switching frequency increases.
VCC
ΔIL=
IL
VOUT
(VCC-VOUT)×VOUT
L×VCC×f
[A]・・・(1)
Appropriate ripple current at output should be 30% more or less of the
maximum output current.
ΔIL=0.3×IOUTmax. [A]・・・(2)
(VCC-VOUT)×VOUT
[H]・・・(3)
L=
ΔIL×VCC×f
L
Co
(ΔIL: Output ripple current, and f: Switching frequency)
Fig.28 Output ripple current
* Current exceeding the current rating of the inductor results in magnetic saturation of the inductor, which decreases efficiency.
The inductor must be selected allowing sufficient margin with which the peak current may not exceed its current rating.
* Select the inductor of low resistance component (such as DCR and ACR) to minimize dissipation in the inductor for
better efficiency.
2. Selection of output capacitor (CO)
Output capacitor should be selected with the consideration on the stability region
and the equivalent series resistance required to smooth ripple voltage.
VCC
Output ripple voltage is determined by the equation (4)：
VOUT
L
ΔVOUT=ΔIL×ESR [V]・・・(4)
ESR
(ΔIL: Output ripple current, ESR: Equivalent series resistance of output capacitor)
Co
* Rating of the capacitor should be determined allowing sufficient margin
against output voltage. Less ESR allows reduction in output ripple voltage.
Fig.29 Output capacitor
As the output rise time must be designed to fall within the soft-start time, the capacitance of output capacitor should be
determined with consideration on the requirements of equation (5):
Tss: Soft-start time
TSS×(Ilimit-IOUT)
Co≦
・・・(5)
Ilimit: Over current detection level, 1A(Typ)
VOUT
if VOUT=1.5V, IOUT=0.3A, and TSS=1ms,
1m×(1-0.3)
Co≦
≒467 [μF]
1.5
Inappropriate capacitance may cause problem in startup. 10μF to 100μF ceramic capacitor is recommended.
3. Selection of input capacitor (Cin)
VCC
Input capacitor to select must be a low ESR capacitor of the capacitance
sufficient to cope with high ripple current to prevent high transient voltage. The
ripple current IRMS is given by the equation (6):
Cin
VOUT
L
Co
IRMS=IOUT×
√VOUT(VCC-VOUT)
VCC
[A]・・・(6)
< Worst case > IRMS(max.)
When Vcc is twice the VOUT, IRMS=
Fig.30 Input capacitor
IOUT
2
If VCC=3.3V, VOUT=1.5V, and IOUTmax.=0.3A
IRMS=0.3×
√1.5(3.3-1.5)
=0.15[ARMS]
3.3
A low ESR 10μF/10V ceramic capacitor is recommended to reduce ESR dissipation of input capacitor for better efficiency.
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9/13
2009.05 - Rev.A
Technical Note
BD9122GUL
4. Determination of RITH, CITH that works as a phase compensator
As the Current Mode Control is designed to limit a inductor current, a pole (phase lag) appears in the low frequency area
due to a CR filter consisting of a output capacitor and a load resistance, while a zero (phase lead) appears in the high
frequency area due to the output capacitor and its ESR. So, the phases are easily compensated by adding a zero to the
power amplifier output with C and R as described below to cancel a pole at the power amplifier.
fp(Min.)
1
2π×RO×CO
1
fz(ESR)=
2π×ESR×CO
fp=
A
Gain
[dB]
fp(Max.)
0
fz(ESR)
IOUTMin.
Phase
[deg]
IOUTMax.
Pole at power amplifier
When the output current decreases, the load resistance Ro
increases and the pole frequency lowers.
0
-90
fp(Min.)=
1
2π×ROMax.×CO
[Hz]←with lighter load
fp(Max.)=
1
2π×ROMin.×CO
[Hz] ←with heavier load
Fig.31 Open loop gain characteristics
A
fz(Amp.)
Zero at power amplifier
Gain
[dB]
Increasing capacitance of the output capacitor lowers the pole
frequency while the zero frequency does not change. (This
is because when the capacitance is doubled, the capacitor
ESR reduces to half.)
0
Phase
[deg]
0
fz(Amp.)=
-90
1
2π×RITH×CITH
Fig.32 Error amp phase compensation characteristics
Cin
VCC
EN
VOUT
L
VCC,PVCC
SW
ITH
VOUT
ESR
VOUT
GND,PGND
RO
CO
RITH
CITH
Fig.33 Typical application
Stable feedback loop may be achieved by canceling the pole fp (Min.) produced by the output capacitor and the load
resistance with CR zero correction by the error amplifier.
fz(Amp.)= fp(Min.)
1
2π×RITH×CITH
=
1
2π×ROMax.×CO
5. Determination of output voltage
The output voltage VOUT is determined by the equation (7):
VOUT=(R2/R1+1)×VADJ・・・(7) VADJ: Voltage at ADJ terminal (0.8V Typ.)
With R1 and R2 adjusted, the output voltage may be determined as required.
Use 1 kΩ～100 kΩ resistor for R1. If a resistor of the resistance higher than
100 kΩ is used, check the assembled set carefully for ripple voltage etc.
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Output
SW
Co
ADJ
Adjustable output voltage range : 1.0V～2.0V
© 2009 ROHM Co., Ltd. All rights reserved.
L
10/13
R2
R1
Fig.34 Deter mination
of output voltage
2009.05 - Rev.A
Technical Note
BD9122GUL
●Cautions on PC Board layout
②
CO
①
CIN
L
VOUT
SW
PGND
PVcc
VCC
GND
③
CITH
GND
RITH
R2
Vcc
EN
ADJ
ITH
EN
R1
Fig.35 Layout diagram
①
②
③
For the sections drawn with heavy line, use thick conductor pattern as short as possible.
Lay out the input ceramic capacitor CIN closer to the pins PVCC and PGND, and the output capacitor Co closer to the pin PGND.
Lay out CITH and RITH between the pins ITH and GND as neat as possible with least necessary wiring.
●Recommended components Lists on above application
Symbol
Part
Value
L
Coil
2.2uH
CIN
Ceramic capacitor
10uF
CO
Ceramic capacitor
10uF
VOUT=1.0V
VOUT=1.2V
CITH
Ceramic capacitor
VOUT=1.5V
VOUT=1.8V
VOUT=2.0V
VOUT=1.0V
VOUT=1.2V
RITH
Resistance
VOUT=1.5V
VOUT=1.8V
VOUT=2.0V
Manufacturer
FDK
murata
murata
Series
MIPF2016D2R2
GRM188B30J106ME47B
GRM188B30J106ME47B
murata
GRM15 Series
2200pF
1000pF
6.8kΩ
MCR006 6801
ROHM
4.7kΩ
MCR006 4701
* The parts list presented above is an example of recommended parts. Although the parts are sound, actual circuit characteristics should be checked on your
application carefully before use. Be sure to allow sufficient margins to accommodate variations between external devices and this IC when employing the
depicted circuit with other circuit constants modified. Both static and transient characteristics should be considered in establishing these margins. When
switching noise is substantial and may impact the system, a low pass filter should be inserted between the VCC and PVCC pins, and a schottky barrier diode
established between the SW and PGND pins.
●I/O equivalent circuit
・EN pin
PVCC
・SW pin
PVCC
PVCC
EN
SW
・ITH pin
・ADJ pin
VCC
ADJ
ITH
Fig.36 I/O equivalent circuit
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© 2009 ROHM Co., Ltd. All rights reserved.
11/13
2009.05 - Rev.A
Technical Note
BD9122GUL
●Cautions on use
1. Absolute Maximum Ratings
While utmost care is taken to quality control of this product, any application that may exceed some of the absolute
maximum ratings including the voltage applied and the operating temperature range may result in breakage. If broken,
short-mode or open-mode may not be identified. So if it is expected to encounter with special mode that may exceed the
absolute maximum ratings, it is requested to take necessary safety measures physically including insertion of fuses.
2. Electrical potential at GND
GND must be designed to have the lowest electrical potential In any operating conditions.
3. Short-circuiting between terminals, and mismounting
When mounting to pc board, care must be taken to avoid mistake in its orientation and alignment. Failure to do so may
result in IC breakdown. Short-circuiting due to foreign matters entered between output terminals, or between output and
power supply or GND may also cause breakdown.
4.Operation in Strong electromagnetic field
Be noted that using the IC in the strong electromagnetic radiation can cause operation failures.
5. Thermal shutdown protection circuit
Thermal shutdown protection circuit is the circuit designed to isolate the IC from thermal runaway, and not intended to
protect and guarantee the IC. So, the IC the thermal shutdown protection circuit of which is once activated should not be
used thereafter for any operation originally intended.
6. Inspection with the IC set to a pc board
If a capacitor must be connected to the pin of lower impedance during inspection with the IC set to a pc board, the
capacitor must be discharged after each process to avoid stress to the IC. For electrostatic protection, provide proper
grounding to assembling processes with special care taken in handling and storage. When connecting to jigs in the
inspection process, be sure to turn OFF the power supply before it is connected and removed.
7. Input to IC terminals
+
This is a monolithic IC with P isolation between P-substrate and each element as illustrated below. This P-layer and the
N-layer of each element form a P-N junction, and various parasitic element are formed.
If a resistor is joined to a transistor terminal as shown in Fig 37.
○P-N junction works as a parasitic diode if the following relationship is satisfied; GND>Terminal A (at resistor side), or
GND>Terminal B (at transistor side); and
○if GND>Terminal B (at NPN transistor side),
a parasitic NPN transistor is activated by N-layer of other element adjacent to the above-mentioned parasitic diode.
The structure of the IC inevitably forms parasitic elements, the activation of which may cause interference among circuits,
and/or malfunctions contributing to breakdown. It is therefore requested to take care not to use the device in such
manner that the voltage lower than GND (at P-substrate) may be applied to the input terminal, which may result in
activation of parasitic elements.
Resistor
Transistor (NPN)
Pin A
Pin B
C
Pin B
B
E
Pin A
N
P
+
N
P
P
+
N
Parasitic
element
N
P+
P substrate
Parasitic element
GND
B
N
P
P
C
+
N
E
Parasitic
element
P substrate
Parasitic element
GND
GND
GND
Other adjacent elements
Fig.37 Simplified structure of monorisic IC
8. Ground wiring pattern
If small-signal GND and large-current GND are provided, It will be recommended to separate the large-current GND
pattern from the small-signal GND pattern and establish a single ground at the reference point of the set PCB so that
resistance to the wiring pattern and voltage fluctuations due to a large current will cause no fluctuations in voltages of the
small-signal GND. Pay attention not to cause fluctuations in the GND wiring pattern of external parts as well.
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© 2009 ROHM Co., Ltd. All rights reserved.
12/13
2009.05 - Rev.A
Technical Note
BD9122GUL
●Ordering part number
B
D
Part No.
9
1
2
2
G
Part No.
9122
U
L
-
Package
GUL: VCSP50L2
VCSP50L2
<Dimension>
E
2
Packaging and forming specification
E2: Embossed tape and reel
(VCSP50L2)
<Tape and Reel information>
Tape
Embossed carrier tape
Quantity
3000pcs
Direction
of feed
E2
(The direction is the 1pin of product is at the upper left when you hold
reel on the left hand and you pull out the tape on the right hand.)
1234
(Unit:mm)
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© 2009 ROHM Co., Ltd. All rights reserved.
1234
Reel
1234
1Pin
1234
1234
1234
Direction of feed
※When you order , please order in times the amount of package quantity.
13/13
2009.05 - Rev.A
Notice
Notes
No copying or reproduction of this document, in part or in whole, is permitted without the
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The content specified herein is subject to change for improvement without notice.
The content specified herein is for the purpose of introducing ROHM's products (hereinafter
"Products"). If you wish to use any such Product, please be sure to refer to the specifications,
which can be obtained from ROHM upon request.
Examples of application circuits, circuit constants and any other information contained herein
illustrate the standard usage and operations of the Products. The peripheral conditions must
be taken into account when designing circuits for mass production.
Great care was taken in ensuring the accuracy of the information specified in this document.
However, should you incur any damage arising from any inaccuracy or misprint of such
information, ROHM shall bear no responsibility for such damage.
The technical information specified herein is intended only to show the typical functions of and
examples of application circuits for the Products. ROHM does not grant you, explicitly or
implicitly, any license to use or exercise intellectual property or other rights held by ROHM and
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use of such technical information.
The Products specified in this document are intended to be used with general-use electronic
equipment or devices (such as audio visual equipment, office-automation equipment, communication devices, electronic appliances and amusement devices).
The Products specified in this document are not designed to be radiation tolerant.
While ROHM always makes efforts to enhance the quality and reliability of its Products, a
Product may fail or malfunction for a variety of reasons.
Please be sure to implement in your equipment using the Products safety measures to guard
against the possibility of physical injury, fire or any other damage caused in the event of the
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More detail product informations and catalogs are available, please contact us.
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R0039A