Order Now Product Folder Support & Community Tools & Software Technical Documents bq294502, bq294504, bq294512, bq294514 bq294515, bq294522, bq294524, bq294532 bq294533, bq294562, bq294572, bq294582, bq294592 SLUSAJ3F – SEPTEMBER 2011 – REVISED JUNE 2017 bq2945xx Overvoltage Protection For 2-Series and 3-Series Cell Li-Ion Batteries 1 Features 2 Applications • • 1 • • • • • • • 2-Series and 3-Series Cell Overvoltage Monitor for Secondary Protection Fixed Programmable Delay Timer Fixed OVP Threshold – Available Range From 3.85 V to 4.6 V Fixed OVP Delay Option: 4 s or 6.5 s High-Accuracy Overvoltage Protection: ±10 mV Low Power Consumption ICC ≈ 1 µA (VCELL(ALL) < VPROTECT) Low Leakage Current per Cell Input < 100 nA Small Package Footprint – 6-Pin SON Second-Level Protection in Li-Ion Battery Packs in: – Tablets – Slates – Power Tools – Notebook Computers – Portable Equipment and Instrumentation 3 Description The bq2945xx family of products is a secondary-level voltage monitor and protector for Li-Ion battery pack systems. Each cell is monitored independently for an overvoltage condition. Based on the configuration, an output is triggered after a fixed delay if any of the two or three cells has an overvoltage condition. This output is triggered into a high state after an overvoltage condition satisfies the specified delay timer. Device Information(1) PART NUMBER bq2945xx PACKAGE SON (6) BODY SIZE (NOM) 2.00 mm × 2.00 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. Simplified Schematic Pack + RVD bq2945xx RIN VCELL3 RIN VCELL2 RIN CIN V3 OUT V2 VDD CIN V1 VSS CVD PWRPAD VCELL1 CIN Pack– 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. UNLESS OTHERWISE NOTED, this document contains PRODUCTION DATA. bq294502, bq294504, bq294512, bq294514 bq294515, bq294522, bq294524, bq294532 bq294533, bq294562, bq294572, bq294582, bq294592 SLUSAJ3F – SEPTEMBER 2011 – REVISED JUNE 2017 www.ti.com Table of Contents 1 2 3 4 5 6 7 8 Features .................................................................. Applications ........................................................... Description ............................................................. Revision History..................................................... Device Options....................................................... Pin Configuration and Functions ......................... Specifications......................................................... 1 1 1 2 4 4 5 7.1 7.2 7.3 7.4 7.5 7.6 5 5 5 5 6 8 Absolute Maximum Ratings ...................................... ESD Ratings.............................................................. Recommended Operating Conditions....................... Thermal Information .................................................. Electrical Characteristics........................................... Typical Characteristics .............................................. Detailed Description .............................................. 9 8.1 8.2 8.3 8.4 Overview ................................................................... 9 Functional Block Diagram ......................................... 9 Feature Description................................................... 9 Device Functional Modes........................................ 10 9 Application and Implementation ........................ 12 9.1 Application Information............................................ 12 9.2 Typical Application .................................................. 12 9.3 System Examples ................................................... 13 10 Power Supply Recommendations ..................... 14 11 Layout................................................................... 14 11.1 Layout Guidelines ................................................. 14 11.2 Layout Example .................................................... 14 12 Device and Documentation Support ................. 15 12.1 12.2 12.3 12.4 12.5 12.6 12.7 Device Support...................................................... Related Links ........................................................ Receiving Notification of Documentation Updates Community Resources.......................................... Trademarks ........................................................... Electrostatic Discharge Caution ............................ Glossary ................................................................ 15 15 15 15 15 16 16 13 Mechanical, Packaging, and Orderable Information ........................................................... 16 4 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision E (December 2016) to Revision F Page • Added bq294533 to Device Options table ............................................................................................................................. 4 • Added bq294533 to VOV Electrical Characteristics. .............................................................................................................. 6 Changes from Revision D (July 2015) to Revision E Page • Changed RIN range values in Design Requirements section from: MIN: 900, MAX: 1100 to: MIN: 100, MAX: 4700 ........ 12 • Changed CIN range values Design Requirements section from: MIN: 0.01, MAX: 0.1 to: MIN: 0.1, MAX: 1 ..................... 12 • Added Receiving Notification of Documentation Updates section ...................................................................................... 15 Changes from Revision C (May 2012) to Revision D Page • Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section .................................................................................................. 1 • Added Overvoltage to description .......................................................................................................................................... 1 • Changed bullets to consolidate feature item ......................................................................................................................... 1 • Added the bq294514 Device .................................................................................................................................................. 1 • Added Fixed OVP Delay Option to Features ........................................................................................................................ 1 • Changed Absolute Maximum Ratings .................................................................................................................................... 5 • Changed format of graphs...................................................................................................................................................... 8 2 Submit Documentation Feedback Copyright © 2011–2017, Texas Instruments Incorporated Product Folder Links: bq294502 bq294504 bq294512 bq294514 bq294515 bq294522 bq294524 bq294532 bq294533 bq294562 bq294572 bq294582 bq294592 bq294502, bq294504, bq294512, bq294514 bq294515, bq294522, bq294524, bq294532 bq294533, bq294562, bq294572, bq294582, bq294592 www.ti.com SLUSAJ3F – SEPTEMBER 2011 – REVISED JUNE 2017 Changes from Revision B (February 2012) to Revision C Page • Added the bq294515 Device to Production Data ................................................................................................................... 4 • Added the bq294524 Device to Production Data ................................................................................................................... 4 • Added the bq294532 Device to Production Data ................................................................................................................... 4 • Added the bq294572 Device to Production Data ................................................................................................................... 4 • Changed Overvoltage Detection Hysteresis........................................................................................................................... 6 • Added Output Voltage Versus Output Current graphic .......................................................................................................... 8 • Changed Timing for Customer Test Mode figure ................................................................................................................. 11 Changes from Revision A (November 2011) to Revision B Page • Changed the bq294504 Device to Production Data ............................................................................................................... 1 • Added the bq294512 Device .................................................................................................................................................. 1 • Added the bq294592 Device .................................................................................................................................................. 1 • Added a second ICC Test Condition........................................................................................................................................ 6 • Changed Fault Detection Delay Time in bq2945x4 Test Mode Specifications ...................................................................... 7 Changes from Original (September 2011) to Revision A • Page Added the bq294582 Device to Production Data ................................................................................................................... 4 Copyright © 2011–2017, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: bq294502 bq294504 bq294512 bq294514 bq294515 bq294522 bq294524 bq294532 bq294533 bq294562 bq294572 bq294582 bq294592 3 bq294502, bq294504, bq294512, bq294514 bq294515, bq294522, bq294524, bq294532 bq294533, bq294562, bq294572, bq294582, bq294592 SLUSAJ3F – SEPTEMBER 2011 – REVISED JUNE 2017 www.ti.com 5 Device Options TA PART NUMBER OVP (V) bq294502 4.35 4 bq294504 4.35 6.5 bq294512 4.4 4 bq294514 4.4 6.5 bq294515 4.425 4 bq294522 4.45 4 bq294524 4.45 6.5 bq294532 4.5 4 bq294533 4.5 6.5 bq294562 4.25 4 bq294572 4 4 bq294582 4.225 4 4.225 6.5 4.3 4 –40°C to +110°C bq294584 (1) bq294592 (1) DELAY TIME (s) Product Preview only 6 Pin Configuration and Functions DRV Package 6-Pin SON Top View V3 1 V2 2 VSS 3 6 OUT 5 VDD 4 V1 PWR PAD Pin Functions PIN NAME NO. I/O DESCRIPTION OUT 6 OA Output drive for external N-channel FET. PWRPAD — — VSS pin to be connected to the PWRPAD on the printed-circuit-board (PCB) for proper operation. V1 4 IA Sense input for positive voltage of the lowest cell in the stack. V2 2 IA Sense input for positive voltage of the second cell from the bottom of the stack. V3 1 IA Sense input for positive voltage of the third cell from the bottom of the stack. VDD 5 P Power supply VSS 3 P Electrically connected to IC ground and negative terminal of the lowest cell in the stack. 4 Submit Documentation Feedback Copyright © 2011–2017, Texas Instruments Incorporated Product Folder Links: bq294502 bq294504 bq294512 bq294514 bq294515 bq294522 bq294524 bq294532 bq294533 bq294562 bq294572 bq294582 bq294592 bq294502, bq294504, bq294512, bq294514 bq294515, bq294522, bq294524, bq294532 bq294533, bq294562, bq294572, bq294582, bq294592 www.ti.com SLUSAJ3F – SEPTEMBER 2011 – REVISED JUNE 2017 7 Specifications 7.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted) (1) (2) Supply voltage Input voltage Output voltage MIN MAX UNIT VDD–VSS –0.3 30 V V1–VSS or V2–VSS or V3–VSS+ –0.3 30 V V3–V2 or V2–V1 –0.3 8 V OUT–VSS –0.3 30 V See Thermal Information Continuous total power dissipation, PTOT Lead temperature (soldering, 10 s), TSOLDER Storage temperature, Tstg (1) (2) –65 300 °C 150 °C Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. See Figure 8. 7.2 ESD Ratings VALUE V(ESD) (1) (2) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1) UNIT ±2000 Charged device model (CDM), per JEDEC specification JESD22-C101 (2) V ±500 JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. 7.3 Recommended Operating Conditions over operating free-air temperature range (unless otherwise noted) Supply voltage, VDD (1) Input voltage V3–V2 or V2–V1 or V1–VSS Operating ambient temperature, TA (1) MIN MAX UNIT 3 25 V 0 5 V –40 110 °C See Typical Application. 7.4 Thermal Information bq2945xx THERMAL METRIC (1) DRV (SON) UNIT 6 PINS RθJA Junction-to-ambient thermal resistance 186.4 °C/W RθJC(top) Junction-to-case(top) thermal resistance 90.4 °C/W RθJB Junction-to-board thermal resistance 110.7 °C/W ψJT Junction-to-top characterization parameter 96.7 °C/W ψJB Junction-to-board characterization parameter 90 °C/W RθJC(bot) Junction-to-case(bottom) thermal resistance N/A °C/W (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report. Copyright © 2011–2017, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: bq294502 bq294504 bq294512 bq294514 bq294515 bq294522 bq294524 bq294532 bq294533 bq294562 bq294572 bq294582 bq294592 5 bq294502, bq294504, bq294512, bq294514 bq294515, bq294522, bq294524, bq294532 bq294533, bq294562, bq294572, bq294582, bq294592 SLUSAJ3F – SEPTEMBER 2011 – REVISED JUNE 2017 www.ti.com 7.5 Electrical Characteristics Typical values stated where TA = 25°C and VDD = 10.8 V, MIN/MAX values stated where TA = –40°C to +110°C and VDD = 3 V to 15 V (unless otherwise noted). TEST NO. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VOLTAGE PROTECTION THRESHOLD VCx 1.0 1.1 1.2 bq294502, fixed delay 4 s 4.35 bq294504, fixed delay 6.5 s 4.35 1.3 bq294512, fixed delay 4 s 1.4 bq294514, fixed delay 6.5 s 1.5 bq294515, fixed delay 4 s 4.425 bq294522, fixed delay 4 s 4.45 bq294524, fixed delay 6.5 s 4.45 1.6 1.7 VOV V(PROTECT) – Overvoltage Detection 1.8 4.4 4.4 bq294532, fixed delay 4 s 4.5 bq294533, fixed delay 6.5 s 4.5 1.9 bq294562, fixed delay 4 s 1.10 bq294572, fixed delay 4 s 4 1.11 bq294582, fixed delay 4 s 4.225 1.12 bq294584, fixed delay 6.5 s (1) 4.225 1.13 1.14 VHYS 1.15 VOA OV Detection Accuracy TA = 25°C, bq2945xx VOA –DRIFT OV Detection Accuracy due to Temperature TA TA TA TA 1.16 4.25 bq294592, fixed delay 4 s Overvoltage VHYS Detection Hysteresis V 4.3 = –40°C = 0°C = 60°C = 110°C 250 300 400 mV –10 10 mV –40 –20 –24 –54 44 20 24 54 SUPPLY AND LEAKAGE CURRENT 1.17 1.18 ICC IIN Supply Current Input Current at Vx Pins (V3–V2) = (V2–V1) = (V1–VSS) = 4 V (See Figure 8 for reference) 1 µA (V3–V2) = (V2–V1) = (V1–VSS) = 2.8 V with TA = –40°C to 60°C Measured at V3, V2, and V1 = 4 V (V2–V1) = (V1–VSS) = 4 V TA = 0°C to 60°C (See Figure 8 for reference.) 2 1.25 –0.1 0.1 µA OUTPUT DRIVE OUT (V3–V2) or (V2–V1) or (V1–VSS) > VOV VDD = 7.2 V, IOH = 100 µA, TA = –40°C to +110°C 1.19 1.20 VOUT Two of the three cells are short circuit and only one cell is powered Output Drive Voltage (V3–V2) or (V2–V1) or (V1–VSS) > VOV VDD = Vx (Cell voltage), IOH = 100 µA, TA = –40°C to +110°C (V3–V2), (V2–V1), and (V1–VSS) < VOV, IOL = 100 µA, TA = 25°C TA = –40°C to +110°C 1.21 1.22 IOUT(Short) OUT Short Circuit Current 1.23 tR Output Rise Time 1.24 ZO Output Impedance (1) (2) 6 6 V VDD – 0.2 250 OUT = 0 V (V3–V2) or (V2–V1) or (V1–VSS) > VOV CL = 1 nF, VOH(OUT) = 0 V to 5 V (2) V 400 mV 4.5 mA 5 kΩ 5 2 µs Product Preview only. Specified by design. Not 100% tested in production. Submit Documentation Feedback Copyright © 2011–2017, Texas Instruments Incorporated Product Folder Links: bq294502 bq294504 bq294512 bq294514 bq294515 bq294522 bq294524 bq294532 bq294533 bq294562 bq294572 bq294582 bq294592 bq294502, bq294504, bq294512, bq294514 bq294515, bq294522, bq294524, bq294532 bq294533, bq294562, bq294572, bq294582, bq294592 www.ti.com SLUSAJ3F – SEPTEMBER 2011 – REVISED JUNE 2017 Electrical Characteristics (continued) Typical values stated where TA = 25°C and VDD = 10.8 V, MIN/MAX values stated where TA = –40°C to +110°C and VDD = 3 V to 15 V (unless otherwise noted). TEST NO. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT FIXED DELAY TIMER 1.25 tDELAY Fault Detection Delay Time 1.26 tDELAY_CTM Fault Detection Delay Time in Test Mode Copyright © 2011–2017, Texas Instruments Incorporated Fixed Delay, bq2945xx with delay set to 4s typ 3.2 4 4.8 Fixed Delay, bq2945xx with delay set to 6.5s 5.2 6.5 7.8 Fixed Delay (Internal settings) 15 Submit Documentation Feedback Product Folder Links: bq294502 bq294504 bq294512 bq294514 bq294515 bq294522 bq294524 bq294532 bq294533 bq294562 bq294572 bq294582 bq294592 s ms 7 bq294502, bq294504, bq294512, bq294514 bq294515, bq294522, bq294524, bq294532 bq294533, bq294562, bq294572, bq294582, bq294592 SLUSAJ3F – SEPTEMBER 2011 – REVISED JUNE 2017 www.ti.com 1.3 4.38 1.2 4.37 Overvoltage Threshold (V) ICC Current (PA) 7.6 Typical Characteristics 1.1 1 0.9 0.8 Min Max Mean 4.36 4.35 4.34 4.33 4.32 0.7 -40 -20 0 20 40 60 Temperature (qC) 80 100 4.31 -40 120 -20 0 D001 Figure 1. ICC Current Consumption vs Temperature 20 40 60 Temperature (qC) 80 100 120 D002 Figure 2. bq294502 Overvoltage Threshold (OVT) vs Temperature -3.85 325 324 -3.9 Output Current (mA) Hysteresis (mV) 323 322 321 320 319 318 -3.95 -4 -4.05 317 316 315 -40 -20 0 20 40 60 Temperature (qC) 80 100 120 -4.1 -40 -20 0 20 40 60 Temperature (qC) D003 Figure 3. Hysteresis VHYS vs Temperature 80 100 120 D004 Figure 4. Output Current IOUT vs Temperature 8 3-Cell Data 2-Cell Data 7.5 Output Voltage (V) 7 6.5 6 5.5 5 4.5 4 0 100 200 300 400 500 600 700 Output Current (PA) 800 900 1000 D005 Figure 5. Output Voltage vs Output Current 8 Submit Documentation Feedback Copyright © 2011–2017, Texas Instruments Incorporated Product Folder Links: bq294502 bq294504 bq294512 bq294514 bq294515 bq294522 bq294524 bq294532 bq294533 bq294562 bq294572 bq294582 bq294592 bq294502, bq294504, bq294512, bq294514 bq294515, bq294522, bq294524, bq294532 bq294533, bq294562, bq294572, bq294582, bq294592 www.ti.com SLUSAJ3F – SEPTEMBER 2011 – REVISED JUNE 2017 8 Detailed Description 8.1 Overview The bq2945xx is a second-level overvoltage (OV) protector. Each cell is monitored independently by comparing the actual cell voltage to a protection voltage threshold, VOV. The protection threshold is preprogrammed at the factory with a range from 3.85 V to 4.65 V. 8.2 Functional Block Diagram PACK+ R VD CVD VDD RIN V3 CIN V2 RIN CIN V1 RIN Multiplexer Switch Network REG INT_EN VOV Delay Timer OUT OSC CIN VSS PWRPAD PACK– 8.3 Feature Description The voltage sensing for each cell is done independently using a multiplexer. The method of overvoltage detection is comparing the voltage to an overvoltage protection voltage VOV. Once the voltage exceeds the programmed fixed value, the delay timer circuit is activated. This delay (tDELAY) is fixed for either a 4-s or 6.5-s delay. When these conditions are satisfied, the OUT terminal is transitioned to a high level. This output (OUT) is released to a low condition if all of the cell inputs (Vx) are below the OVP threshold minus the Vhys. Copyright © 2011–2017, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: bq294502 bq294504 bq294512 bq294514 bq294515 bq294522 bq294524 bq294532 bq294533 bq294562 bq294572 bq294582 bq294592 9 bq294502, bq294504, bq294512, bq294514 bq294515, bq294522, bq294524, bq294532 bq294533, bq294562, bq294572, bq294582, bq294592 SLUSAJ3F – SEPTEMBER 2011 – REVISED JUNE 2017 www.ti.com Cell Voltage (V) (V3 –V2, V2 – V1, V1–VSS) Feature Description (continued) VOV VOV –VHYS tDELAY OUT (V) Figure 6. Timing for Overvoltage Sensing 8.3.1 Sense Positive Input for VX This is an input to sense each single battery cell voltage. A series resistor and a capacitor across the cell for each input is required for noise filtering and stable voltage monitoring. 8.3.2 Output Drive, OUT The gate of an external N-channel MOSFET is connected to this terminal. This output transitions to a high level when an overvoltage condition is detected and after the programmed delay timer. OUT will reset to a low level if the cell voltage falls below the VOV threshold before the fixed delay timer expires. 8.3.3 Supply Input, VDD This terminal is the unregulated input power source for the IC. A series resistor is connected to limit the current, and a capacitor is connected to ground for noise filtering. 8.3.4 Thermal Pad, PWRPAD For correct operation, the power pad (PWRPAD) is connected to the VSS terminal on the PCB. 8.4 Device Functional Modes 8.4.1 NORMAL Mode When all of the cell voltages are below the overvoltage threshold, VOV, the device operates in NORMAL mode. The device monitors the differential cell voltages connected across (V1–VSS), (V2–V1) and (V3–V2). The OUT pin is inactive in this mode. 8.4.2 OVERVOLTAGE Mode OVERVOLTAGE mode is detected if any of the cell voltages exceeds the overvoltage threshold, VOV for the configured OV delay time, tDELAY. The OUT pin will pull high internally. An external FET ihen turns on, shorting the fuse to ground, which allows the battery or charger power to blow the fuse. When all of the cell voltages fall below (VOV–VHYS), the device returns to NORMAL mode. 10 Submit Documentation Feedback Copyright © 2011–2017, Texas Instruments Incorporated Product Folder Links: bq294502 bq294504 bq294512 bq294514 bq294515 bq294522 bq294524 bq294532 bq294533 bq294562 bq294572 bq294582 bq294592 bq294502, bq294504, bq294512, bq294514 bq294515, bq294522, bq294524, bq294532 bq294533, bq294562, bq294572, bq294582, bq294592 www.ti.com SLUSAJ3F – SEPTEMBER 2011 – REVISED JUNE 2017 Device Functional Modes (continued) 8.4.3 Customer Test Mode Customer Test Mode (CTM) helps to reduce test time for checking the overvoltage delay timer parameter once the circuit is implemented in the battery pack. To enter CTM, VDD should be set to at least 10 V higher than V3 (see Figure 7). The delay timer is greater than 10 ms, but considerably shorter than the timer delay in normal operation. To exit CTM, remove the VDD to VC3 voltage differential of 10 V so that the decrease in this value automatically causes an exit. CAUTION Avoid exceeding any Absolute Maximum Voltages on any pins when placing the part into CTM. Also avoid exceeding Absolute Maximum Voltages for the individual cell voltages (V3–V2), (V2–V1), and (V1–VSS). Stressing the pins beyond the rated limits may cause permanent damage to the device. Cell Voltage (V) (V3) VDD – V3 (V) Figure 7 shows the timing for CTM. 10 V VOV VOV – VHYS t DELAY > 10 ms OUT (V) Figure 7. Timing for Customer Test Mode Figure 8 shows the measurement for current consumption for the product for both VDD and Vx. bq2945xx IIN 3.6 V IIN 3.6 V IIN 3.6 V 1 V3 OUT 6 2 V2 VDD 5 V1 4 3 VSS I CC PWRPAD Figure 8. Configuration for IC Current Consumption Test Copyright © 2011–2017, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: bq294502 bq294504 bq294512 bq294514 bq294515 bq294522 bq294524 bq294532 bq294533 bq294562 bq294572 bq294582 bq294592 11 bq294502, bq294504, bq294512, bq294514 bq294515, bq294522, bq294524, bq294532 bq294533, bq294562, bq294572, bq294582, bq294592 SLUSAJ3F – SEPTEMBER 2011 – REVISED JUNE 2017 www.ti.com 9 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality. 9.1 Application Information The bq2945xx devices are a family of second-level protectors used for overvoltage protection of the battery pack in the application. The device, when configuring the OUT pin with active high, drives a NMOS FET that connects the fuse to ground in the event of a fault condition. This provides a shorted path to use the battery or charger power to blow the fuse and cut the power path. 9.2 Typical Application Pack + RVD bq2945xx RIN VCELL3 RIN VCELL2 RIN CIN V3 OUT V2 VDD CIN V1 VSS CVD PWRPAD VCELL1 CIN Pack– Figure 9. Application Configuration Schematic 9.2.1 Design Requirements Changes to the ranges stated in Table 1 will impact the accuracy of the cell measurements. Figure 9 shows each external component. Table 1. Parameters PARAMETER EXTERNAL COMPONENT MIN TYP MAX 1000 UNIT Voltage monitor filter resistance RIN 100 4700 Ω Voltage monitor filter capacitance CIN 0.1 1 µF Supply voltage filter resistance RVD 100 1K Ω Supply voltage filter capacitance CVD 0.1 µF 9.2.2 Detailed Design Procedure 1. Determine the overvoltage threshold and delay time. Select the proper device from the table in Device Options, or contact TI for a different configuration. 2. Determine the number of cell in series. The device supports 2-S to 3-S cell configuration. For 2-S configuration, V3 pin should be shorted to V2. 3. Follow the application configuration schematic (see Figure 9) to connect the device. 12 Submit Documentation Feedback Copyright © 2011–2017, Texas Instruments Incorporated Product Folder Links: bq294502 bq294504 bq294512 bq294514 bq294515 bq294522 bq294524 bq294532 bq294533 bq294562 bq294572 bq294582 bq294592 bq294502, bq294504, bq294512, bq294514 bq294515, bq294522, bq294524, bq294532 bq294533, bq294562, bq294572, bq294582, bq294592 www.ti.com SLUSAJ3F – SEPTEMBER 2011 – REVISED JUNE 2017 9.2.3 Application Curves 325 4.38 324 323 4.36 Hysteresis (mV) Overvoltage Threshold (V) 4.37 Min Max Mean 4.35 4.34 4.33 322 321 320 319 318 317 4.32 4.31 -40 316 -20 0 20 40 60 Temperature (qC) 80 100 315 -40 120 -20 0 20 40 60 Temperature (qC) D002 Figure 10. OVT vs Temperature 80 100 120 D003 Figure 11. VHYS vs Temperature 9.3 System Examples Pack + 100 bq2945xx 1k VCELL3 VCELL2 V3 OUT V2 VDD 1k 0.1µF 1k 0.1µF VSS VCELL1 V1 0.1 µF PWRPAD 0.1µF Pack – Figure 12. 3-Series Cell Configuration With Fixed Delay Pack + 100 bq2945xx V3 OUT V2 VDD 1k VCELL2 1k 0.1 µF VSS VCELL1 V1 0.1µF PWRPAD 0.1µF Pack – Figure 13. 2-Series Cell Configuration With Internal Fixed Delay Copyright © 2011–2017, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: bq294502 bq294504 bq294512 bq294514 bq294515 bq294522 bq294524 bq294532 bq294533 bq294562 bq294572 bq294582 bq294592 13 bq294502, bq294504, bq294512, bq294514 bq294515, bq294522, bq294524, bq294532 bq294533, bq294562, bq294572, bq294582, bq294592 SLUSAJ3F – SEPTEMBER 2011 – REVISED JUNE 2017 www.ti.com 10 Power Supply Recommendations The maximum power of this device is 25 V on VDD. 11 Layout 11.1 Layout Guidelines • • • Ensure the RC filters for the V1 and VDD pins are placed as close as possible to the target terminal, reducing the tracing loop area. The VSS pin should be routed to the CELL– terminal. Ensure the trace connecting the fuse to the gate, source of the NFET to the Pack– is sufficient to withstand the current during a fuse blown event. 11.2 Layout Example Place the RC filters close to the device terminals Power Trace Line Pack + NC OUT VDD V2 Pack ± PWPD VCELL VSS VSS Ensure trace can support sufficient current flow for fuse blow Connect the VSS pins to the CELL- side Figure 14. Layout Schematic 14 Submit Documentation Feedback Copyright © 2011–2017, Texas Instruments Incorporated Product Folder Links: bq294502 bq294504 bq294512 bq294514 bq294515 bq294522 bq294524 bq294532 bq294533 bq294562 bq294572 bq294582 bq294592 bq294502, bq294504, bq294512, bq294514 bq294515, bq294522, bq294524, bq294532 bq294533, bq294562, bq294572, bq294582, bq294592 www.ti.com SLUSAJ3F – SEPTEMBER 2011 – REVISED JUNE 2017 12 Device and Documentation Support 12.1 Device Support 12.1.1 Third-Party Products Disclaimer TI'S PUBLICATION OF INFORMATION REGARDING THIRD-PARTY PRODUCTS OR SERVICES DOES NOT CONSTITUTE AN ENDORSEMENT REGARDING THE SUITABILITY OF SUCH PRODUCTS OR SERVICES OR A WARRANTY, REPRESENTATION OR ENDORSEMENT OF SUCH PRODUCTS OR SERVICES, EITHER ALONE OR IN COMBINATION WITH ANY TI PRODUCT OR SERVICE. 12.2 Related Links The table below lists quick access links. Categories include technical documents, support and community resources, tools and software, and quick access to sample or buy. Table 2. Related Links PARTS PRODUCT FOLDER SAMPLE & BUY TECHNICAL DOCUMENTS TOOLS & SOFTWARE SUPPORT & COMMUNITY bq294502 Click here Click here Click here Click here Click here bq294504 Click here Click here Click here Click here Click here bq294512 Click here Click here Click here Click here Click here bq294514 Click here Click here Click here Click here Click here bq294515 Click here Click here Click here Click here Click here bq294522 Click here Click here Click here Click here Click here bq294533 TBD TBD TBD TBD TBD bq294524 Click here Click here Click here Click here Click here bq294532 Click here Click here Click here Click here Click here bq294562 Click here Click here Click here Click here Click here bq294572 Click here Click here Click here Click here Click here bq294582 Click here Click here Click here Click here Click here bq294592 Click here Click here Click here Click here Click here 12.3 Receiving Notification of Documentation Updates To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper right corner, click on Alert me to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document. 12.4 Community Resources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers. Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and contact information for technical support. 12.5 Trademarks E2E is a trademark of Texas Instruments. All other trademarks are the property of their respective owners. Copyright © 2011–2017, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: bq294502 bq294504 bq294512 bq294514 bq294515 bq294522 bq294524 bq294532 bq294533 bq294562 bq294572 bq294582 bq294592 15 bq294502, bq294504, bq294512, bq294514 bq294515, bq294522, bq294524, bq294532 bq294533, bq294562, bq294572, bq294582, bq294592 SLUSAJ3F – SEPTEMBER 2011 – REVISED JUNE 2017 www.ti.com 12.6 Electrostatic Discharge Caution These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 12.7 Glossary SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions. 13 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. 16 Submit Documentation Feedback Copyright © 2011–2017, Texas Instruments Incorporated Product Folder Links: bq294502 bq294504 bq294512 bq294514 bq294515 bq294522 bq294524 bq294532 bq294533 bq294562 bq294572 bq294582 bq294592 PACKAGE OPTION ADDENDUM www.ti.com 28-Jun-2017 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) BQ294502DRVR ACTIVE WSON DRV 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 4502 BQ294502DRVT ACTIVE WSON DRV 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 4502 BQ294504DRVR ACTIVE WSON DRV 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 4504 BQ294504DRVT ACTIVE WSON DRV 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 4504 BQ294512DRVR ACTIVE WSON DRV 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 4512 BQ294512DRVT ACTIVE WSON DRV 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 4512 BQ294515DRVR PREVIEW WSON DRV 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 4515 BQ294515DRVT PREVIEW WSON DRV 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 4515 BQ294522DRVR ACTIVE WSON DRV 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 4522 BQ294522DRVT ACTIVE WSON DRV 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 4522 BQ294524DRVR ACTIVE WSON DRV 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 4524 BQ294524DRVT ACTIVE WSON DRV 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 4524 BQ294532DRVR ACTIVE WSON DRV 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 4532 BQ294532DRVT ACTIVE WSON DRV 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 4532 BQ294533DRVR ACTIVE WSON DRV 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 4533 BQ294533DRVT ACTIVE WSON DRV 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 4533 BQ294582DRVR ACTIVE WSON DRV 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 4582 Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com Orderable Device 28-Jun-2017 Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) BQ294582DRVT ACTIVE WSON DRV 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 4582 BQ294592DRVR ACTIVE WSON DRV 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 4592 BQ294592DRVT ACTIVE WSON DRV 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 4592 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2 Samples PACKAGE OPTION ADDENDUM www.ti.com 28-Jun-2017 Addendum-Page 3 PACKAGE MATERIALS INFORMATION www.ti.com 27-Jun-2017 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant BQ294502DRVR WSON DRV 6 3000 180.0 8.4 2.3 2.3 1.15 4.0 8.0 Q2 BQ294502DRVR WSON DRV 6 3000 180.0 8.4 2.3 2.3 1.15 4.0 8.0 Q2 BQ294502DRVT WSON DRV 6 250 180.0 8.4 2.3 2.3 1.15 4.0 8.0 Q2 BQ294502DRVT WSON DRV 6 250 180.0 8.4 2.3 2.3 1.15 4.0 8.0 Q2 BQ294504DRVR WSON DRV 6 3000 180.0 8.4 2.3 2.3 1.15 4.0 8.0 Q2 BQ294504DRVR WSON DRV 6 3000 180.0 8.4 2.3 2.3 1.15 4.0 8.0 Q2 BQ294504DRVT WSON DRV 6 250 180.0 8.4 2.3 2.3 1.15 4.0 8.0 Q2 BQ294504DRVT WSON DRV 6 250 180.0 8.4 2.3 2.3 1.15 4.0 8.0 Q2 BQ294512DRVR WSON DRV 6 3000 180.0 8.4 2.3 2.3 1.15 4.0 8.0 Q2 BQ294512DRVT WSON DRV 6 250 180.0 8.4 2.3 2.3 1.15 4.0 8.0 Q2 BQ294515DRVR WSON DRV 6 3000 180.0 8.4 2.3 2.3 1.15 4.0 8.0 Q2 BQ294522DRVR WSON DRV 6 3000 180.0 8.4 2.3 2.3 1.15 4.0 8.0 Q2 BQ294522DRVT WSON DRV 6 250 180.0 8.4 2.3 2.3 1.15 4.0 8.0 Q2 BQ294524DRVR WSON DRV 6 3000 180.0 8.4 2.3 2.3 1.15 4.0 8.0 Q2 BQ294524DRVR WSON DRV 6 3000 180.0 8.4 2.3 2.3 1.15 4.0 8.0 Q2 BQ294524DRVT WSON DRV 6 250 180.0 8.4 2.3 2.3 1.15 4.0 8.0 Q2 BQ294524DRVT WSON DRV 6 250 180.0 8.4 2.3 2.3 1.15 4.0 8.0 Q2 BQ294532DRVR WSON DRV 6 3000 180.0 8.4 2.3 2.3 1.15 4.0 8.0 Q2 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 27-Jun-2017 Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant BQ294532DRVR WSON DRV 6 3000 180.0 8.4 2.3 2.3 1.15 4.0 8.0 Q2 BQ294532DRVT WSON DRV 6 250 180.0 8.4 2.3 2.3 1.15 4.0 8.0 Q2 BQ294532DRVT WSON DRV 6 250 180.0 8.4 2.3 2.3 1.15 4.0 8.0 Q2 BQ294533DRVR WSON DRV 6 3000 180.0 8.4 2.3 2.3 1.15 4.0 8.0 Q2 BQ294533DRVT WSON DRV 6 250 180.0 8.4 2.3 2.3 1.15 4.0 8.0 Q2 BQ294582DRVR WSON DRV 6 3000 180.0 8.4 2.3 2.3 1.15 4.0 8.0 Q2 BQ294582DRVR WSON DRV 6 3000 180.0 8.4 2.3 2.3 1.15 4.0 8.0 Q2 BQ294582DRVT WSON DRV 6 250 180.0 8.4 2.3 2.3 1.15 4.0 8.0 Q2 BQ294582DRVT WSON DRV 6 250 180.0 8.4 2.3 2.3 1.15 4.0 8.0 Q2 BQ294592DRVR WSON DRV 6 3000 180.0 8.4 2.3 2.3 1.15 4.0 8.0 Q2 BQ294592DRVR WSON DRV 6 3000 180.0 8.4 2.3 2.3 1.15 4.0 8.0 Q2 BQ294592DRVT WSON DRV 6 250 180.0 8.4 2.3 2.3 1.15 4.0 8.0 Q2 BQ294592DRVT WSON DRV 6 250 180.0 8.4 2.3 2.3 1.15 4.0 8.0 Q2 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) BQ294502DRVR WSON DRV 6 3000 210.0 185.0 35.0 BQ294502DRVR WSON DRV 6 3000 210.0 185.0 35.0 BQ294502DRVT WSON DRV 6 250 210.0 185.0 35.0 BQ294502DRVT WSON DRV 6 250 210.0 185.0 35.0 Pack Materials-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 27-Jun-2017 Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) BQ294504DRVR WSON DRV 6 3000 210.0 185.0 35.0 BQ294504DRVR WSON DRV 6 3000 210.0 185.0 35.0 BQ294504DRVT WSON DRV 6 250 210.0 185.0 35.0 BQ294504DRVT WSON DRV 6 250 210.0 185.0 35.0 BQ294512DRVR WSON DRV 6 3000 210.0 185.0 35.0 BQ294512DRVT WSON DRV 6 250 210.0 185.0 35.0 BQ294515DRVR WSON DRV 6 3000 210.0 185.0 35.0 BQ294522DRVR WSON DRV 6 3000 210.0 185.0 35.0 BQ294522DRVT WSON DRV 6 250 210.0 185.0 35.0 BQ294524DRVR WSON DRV 6 3000 210.0 185.0 35.0 BQ294524DRVR WSON DRV 6 3000 210.0 185.0 35.0 BQ294524DRVT WSON DRV 6 250 210.0 185.0 35.0 BQ294524DRVT WSON DRV 6 250 210.0 185.0 35.0 BQ294532DRVR WSON DRV 6 3000 210.0 185.0 35.0 BQ294532DRVR WSON DRV 6 3000 210.0 185.0 35.0 BQ294532DRVT WSON DRV 6 250 210.0 185.0 35.0 BQ294532DRVT WSON DRV 6 250 210.0 185.0 35.0 BQ294533DRVR WSON DRV 6 3000 210.0 185.0 35.0 BQ294533DRVT WSON DRV 6 250 210.0 185.0 35.0 BQ294582DRVR WSON DRV 6 3000 210.0 185.0 35.0 BQ294582DRVR WSON DRV 6 3000 210.0 185.0 35.0 BQ294582DRVT WSON DRV 6 250 210.0 185.0 35.0 BQ294582DRVT WSON DRV 6 250 210.0 185.0 35.0 BQ294592DRVR WSON DRV 6 3000 210.0 185.0 35.0 BQ294592DRVR WSON DRV 6 3000 210.0 185.0 35.0 BQ294592DRVT WSON DRV 6 250 210.0 185.0 35.0 BQ294592DRVT WSON DRV 6 250 210.0 185.0 35.0 Pack Materials-Page 3 IMPORTANT NOTICE Texas Instruments Incorporated (TI) reserves the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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