ON ASM162MEUSF Supervisory circuit Datasheet

ASM161, ASM162
mP Supervisory Circuit
Description
The ASM161 and ASM162 are cost effective, low power
supervisory circuits that monitor power supplies in microprocessor,
microcontroller and digital systems. If the power supply drops below
the reset threshold level, a reset is asserted and remains asserted for at
least 800 ms after VCC has risen above the reset threshold. An
improved manual reset architecture gives the system designer
additional flexibility.
The debounced manual reset input is negative edge triggered. The
reset pulse period generated by a MR transition is a minimum of
800 ms and a maximum of 2 sec duration. In addition, The MR input
signal is blocked for an additional 49 mS minimum after the reset pulse
ends. During the MR disable period, the microcontroller is guaranteed
a time period free of additional manual reset signals. During this
period DRAM contents can be refreshed or other critical system tasks
undertaken. Low power consumption makes the ASM161/162 ideal
for use in portable and battery operated equipments. With 3 V
supplies, power consumption is 8 mW typically and 30 mW maximum.
The ASM161 has an open−drain, active−LOW RESET output and
requires an external pull−up resistor. The ASM162 has an active
HIGH RESET output.
The ASM161/162 are offered in compact 4−pin SOT−143 packages.
No external components are required to trim threshold voltage for
monitoring different supply voltages. With six different factory set,
reset, threshold ranges from 2.63 V to 4.63 V, the ASM161/162 are
suitable for monitoring 5 V, 3.6 V and 3.0 V supplies. The
ASM161/162 are available in temperature ranges 0°C to 70°C and
−40°C to +85°C.
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SOT−143
4 LEAD
CASE 527AF
PIN CONFIGURATIONS
1
VCC
GND
RESET
1
GND
VCC
MR RESET
MR
ASM161
(Top View)
ASM162
(Top View)
RESET is open drain
RESET THRESHOLD
Part Suffix
Voltage (V)
L
4.63
Features
M
4.38
•
•
•
•
•
•
J
4.00
•
•
•
•
•
•
Edge Triggered Manual Reset Input
Single Pulse Output
49 mS Minimum MR Disable Period After Reset
CMOS/TTL Logic or Switch Interface
Debounced Input
Low Supply Current Extends Battery Life
6 mA / 15 mA typ/max at 5.5 V
4.5 mA / 10 mA typ/max at 3.6 V
Long Reset Period
0.8 Sec Minimum, 2 Sec Maximum
Two Reset Polarity Options
ASM161: Active LOW, Open−drain
ASM162: Active HIGH
Pinout Matches the ASM811/812
Small 4−Pin SOT−143 Package
Two Temperature Ranges: 0°C to 70°C
and −40°C to +85°C
© Semiconductor Components Industries, LLC, 2011
August, 2011 − Rev. 3
T
3.08
S
2.93
R
2.63
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 6 of this data sheet.
Applications
•
•
•
•
•
•
•
1
PDAs
Appliances
Computers and Embedded Controllers
Wireless Communication Systems
Battery Operated and Intelligent Instruments
Automotive Systems
Safety Systems
Publication Order Number:
ASM161/D
ASM161, ASM162
Figure 1. Typical Operating Circuit
Figure 2. Block Diagram
Table 1. PIN DESCRIPTION
Pin #
ASM161
ASM162
Pin Name
1
1
GND
2
−
RESET
Active−LOW, open−drain reset output. RESET remains LOW while VCC is below the
reset threshold and for 800 ms minimum after VCC rises above the reset threshold.
An external pull−up resistor is needed.
−
2
RESET
Active HIGH reset output. RESET remains HIGH while VCC is below the reset
threshold and for 800 ms after VCC rises above the reset threshold.
3
3
MR
Manual reset input. A negative going edge transition on MR asserts reset. Reset
remains asserted for one reset time−out period (800 ms min). This active−LOW input
has an internal pull−up resistor. It can be driven from a TTL or CMOS logic line or
shorted to ground with a switch. Leave open if unused.
4
4
VCC
Power supply input voltage.
Function
Ground.
Detailed Description
signal remains active as long as the monitored supply
voltage is below the internal threshold voltage.
The ASM161 has an open−drain, active LOW RESET
output (which is guaranteed to be in the correct state for VCC
down to 1.1 V). The ASM161 uses an external pull−up
resistor. Output leakage current is under 1 mA. A high
resistance value can be used to minimize current drain.
The ASM162 generates an active−HIGH RESET output.
The reset function ensures the microprocessor is properly
reset and powers up into a known condition after a power
failure.
Reset Timing
A reset is generated whenever the supply voltage is below
the threshold level (VCC < VTH). The reset duration is at
least 800 ms after VCC has risen above the reset threshold
and is guaranteed to be no more than 2 seconds. The rest
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ASM161, ASM162
Part Number
Reset Polarity
ASM161
LOW (use external pull−up resistor)
ASM162
HIGH
49 mS but not more than 122 mS. This period is specified as
tMRD.
During the MR disabled period, the microcontroller is
guaranteed a time period free of new manual reset signals.
This period can be used to refresh critical DRAM contents
or other system tasks.
The MR pin must be taken HIGH and LOW again after the
tMRD period has been completed to initiate another reset
pulse.
The manual reset input has an internal 20 kW pull−up
resistor. MR can be left open if not used.
Manual Reset
The ASM161/162 have a unique manual reset circuit. A
negative going edge transition on MR initiates the reset. A
manual reset generates a single reset pulse of fixed length.
The output−reset pulse remains asserted for the Reset Active
Time−Out Period tRP and then clears. Once the reset pulse
is completed, the MR input remains disabled for at least
Figure 3. Manual Reset Timing
Figure 4. RESET Valid with VCC under 1.1 V
Application Information
Valid Reset with VCC under 1.1 V
To ensure that logic inputs connected to the ASM162
RESET pin are in a known state when VCC is under 1.1 V,
a 100 kW pull−down resistor at RESET is needed. The value
is not critical.
This scheme does not work with the open−drain outputs
of ASM161.
Glitch Resistance
The ASM161/162 are relatively immune to short duration
negative−going VCC transients/glitches. A VCC transient
that goes 100 mV below the reset threshold and lasts 20s or
less will not typically cause a reset pulse.
Table 2. ABSOLUTE MAXIMUM RATINGS
Parameter
Min
Max
Unit
−0.3
−0.3
6.0
VCC + 0.3
20
V
V
mA
Rate of Rise at VCC
100
V/ms
Power Dissipation (TA = 70°C)
320
mW
Pin Terminal Voltage with Respect to Ground
VCC
RESET, RESET and MR
Input Current at VCC and MR
Operating Temperature Range
−40
85
°C
Storage Temperature Range
−65
160
°C
Lead Temperature (soldering, 10 sec)
300
°C
ESD rating
HBM
MM
2
200
KV
V
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
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ASM161, ASM162
Table 3. ELECTRICAL CHARACTERISTICS
(Unless otherwise noted, VCC is over the full range and TA = 0°C to 70°C for ASM161/162 X C and TA = −40°C to +85°C for ASM161/162
X E devices. Typical values at TA = 25°C, VCC = 5 V for L/M/J devices, VCC = 3.3 V for T/S devices and VCC = 3 V for R devices.)
Parameter
Symbol
Conditions
Min
Input Voltage (VCC)
Range
VCC
TA = 0°C to 70°C
1.1
Supply Current
(Unloaded)
ICC
Reset Threshold
Reset Threshold
Temp Coefficient
VTH
Reset Pulse Width
MR Minimum Pulse
Width
Unit
5.5
V
mA
VCC < 5.5 V L/M/J
6
15
TA = 0°C to 70°C,
TA = −40°C to +85°C
VCC < 3.6 V R/S/T
4.5
10
L Devices
TA = 25°C
(Note 1)
4.56
4.50
4.63
4.70
4.75
M devices
TA = 25°C
(Note 1)
4.31
4.25
4.38
4.45
4.50
J devices
TA = 25°C
(Note 1)
3.93
3.89
4.00
4.06
4.10
T devices
TA = 25°C
(Note 1)
3.04
3.00
3.08
3.11
3.15
S devices
TA = 25°C
(Note 1)
2.89
2.85
2.93
2.96
3.00
R devices
TA = 25°C
(Note 1)
2.59
2.55
2.63
2.66
2.70
VCC = VTH to (VTH −100 mV)
tRPW
Max
TA = 0°C to 70°C,
TA = −40°C to +85°C
TCVTH
VCC to reset delay
Typ
TA = 0°C to 70°C
800
TA = −40°C to 85°C
600
tMR
V
30
ppm/
°C
20
mS
1400
2000
ms
2240
10
mS
MR Glitch Immunity
100
ns
MR to RESET
Propagation Delay
0.5
mS
MR Input Threshold
VIH
VCC > VTH(MAX), L/M/J devices
2.3
V
VIL
VIH
0.8
VCC > VTH(MAX), R/S/T devices
0.7VCC
V
VIL
MR Delay to MR
Retrigger
tMRD
0.25VCC
V
122
mS
30
KW
VCC = VTH min., ISINK = 1.2 mA, ASM161 R/S/T
0.3
V
VCC = VTH min., ISINK = 3.2 mA, ASM161L/M/J
0.4
VCC > 1.1, ISINK = 50 mA
0.3
VCC = VTH max., ISINK = 1.2 mA, ASM162 R/S/T
0.3
VCC = VTH max., ISINK = 3.2 mA, ASM162 L/M/J
0.4
TA = 0°C to 70°C
48
TA = −40°C to 85°C
MR pull−up
resistance
Low RESET output
voltage (ASM161)
RESET Output
Voltage (ASM162)
VOL
HIGH RESET Output
Voltage (ASM162)
VOH
1.8 < VCC < VTHmin., ISOURCE = 150 mA
1. Over operating temperature range.
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4
85
85
10
VOL
V
0.8VCC
20
V
V
ASM161, ASM162
PACKAGE DIMENSIONS
SOT−143, 4 Lead
CASE 527AF−01
ISSUE A
SYMBOL
MIN
A
0.80
1.22
D
A1
0.05
0.15
e
A2
0.75
b
0.30
0.50
b2
0.76
0.89
c
0.08
D
2.80
4
3
E1
1
E
E
2.10
E1
1.20
e
2
TOP VIEW
0.40
0.20
2.90
3.04
1.30
1.40
2.64
0.50
L1
0.54 REF
L2
0.25
θ
A2
0°
c
L
b2
A1
L1
SIDE VIEW
END VIEW
Notes:
(1) All dimensions are in millimeters. Angles in degrees.
(2) Complies with JEDEC TO-253.
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5
0.60
8°
q
A
1.07
0.20 BSC
L
b
0.90
MAX
1.92 BSC
e1
e1
NOM
L2
ASM161, ASM162
Table 4. ORDERING INFORMATION
Part Number (Note 2)
Reset Threshold (V)
Temperature (5C)
Pins−Package
Package Marking
(LL Lot Code)
TIN LEAD DEVICES
ASM161LCUS/T
4.63
0 TO 70
4−SOT−143
TALL
ASM161MCUS/T
4.38
0 TO 70
4−SOT−143
TBLL
ASM161JCUS/T
4.00
0 TO 70
4−SOT−143
TCLL
ASM161TCUS/T
3.08
0 TO 70
4−SOT−143
TDLL
ASM161SCUS/T
2.93
0 TO 70
4−SOT−143
TELL
ASM161RCUS/T
2.63
0 TO 70
4−SOT−143
TFLL
ASM162LCUS/T
4.63
0 TO 70
4−SOT−143
TGLL
ASM162MCUS/T
4.38
0 TO 70
4−SOT−143
THLL
ASM162JCUS/T
4.00
0 TO 70
4−SOT−143
TILL
ASM162TCUS/T
3.08
0 TO 70
4−SOT−143
TJLL
ASM162SCUS/T
2.93
0 TO 70
4−SOT−143
TKLL
ASM162RCUS/T
2.63
0 TO 70
4−SOT−143
TLLL
ASM161LEUS/T
4.63
−40 TO 85
4−SOT−143
TMLL
ASM161MEUS/T
4.38
−40 TO 85
4−SOT−143
TNLL
ASM161JEUS/T
4.00
−40 TO 85
4−SOT−143
TOLL
ASM161TEUS/T
3.08
−40 TO 85
4−SOT−143
TPLL
ASM161SEUS/T
2.93
−40 TO 85
4−SOT−143
TQLL
ASM161REUS/T
2.63
−40 TO 85
4−SOT−143
TRLL
ASM162LEUS/T
4.63
−40 TO 85
4−SOT−143
TSLL
ASM162MEUS/T
4.38
−40 TO 85
4−SOT−143
TTLL
ASM162JEUS/T
4.00
−40 TO 85
4−SOT−143
TULL
ASM162TEUS/T
3.08
−40 TO 85
4−SOT−143
TVLL
ASM162SEUS/T
2.93
−40 TO 85
4−SOT−143
TWLL
ASM162REUS/T
2.63
−40 TO 85
4−SOT−143
TXLL
ASM161LCUSF/T
4.63
0 TO 70
4−SOT−143
MALL
ASM161MCUSF/T
4.38
0 TO 70
4−SOT−143
MBLL
ASM161JCUSF/T
4.00
0 TO 70
4−SOT−143
MCLL
ASM161TCUSF/T
3.08
0 TO 70
4−SOT−143
MDLL
ASM161SCUSF/T
2.93
0 TO 70
4−SOT−143
MELL
ASM161RCUSF/T
2.63
0 TO 70
4−SOT−143
MFLL
LEAD FREE DEVICES
ASM162LCUSF/T
4.63
0 TO 70
4−SOT−143
MGLL
ASM162MCUSF/T
4.38
0 TO 70
4−SOT−143
MHLL
ASM162JCUSF/T
4.00
0 TO 70
4−SOT−143
MILL
ASM162TCUSF/T
3.08
0 TO 70
4−SOT−143
MJLL
ASM162SCUSF/T
2.93
0 TO 70
4−SOT−143
MKLL
ASM162RCUSF/T
2.63
0 TO 70
4−SOT−143
MLLL
ASM161LEUSF/T
4.63
−40 TO 85
4−SOT−143
MMLL
ASM161MEUSF/T
4.38
−40 TO 85
4−SOT−143
MNLL
2. For parts to be packed in Tape and Reel, add “−T” at the end of the part number. ON Semiconductor lead free parts are RoHS compliant.
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6
ASM161, ASM162
Table 4. ORDERING INFORMATION (continued)
Part Number (Note 2)
Reset Threshold (V)
Temperature (5C)
Pins−Package
Package Marking
(LL Lot Code)
LEAD FREE DEVICES
ASM161JEUSF/T
4.00
−40 TO 85
4−SOT−143
MOLL
ASM161TEUSF/T
3.08
−40 TO 85
4−SOT−143
MPLL
ASM161SEUSF/T
2.93
−40 TO 85
4−SOT−143
MQLL
ASM161REUSF/T
2.63
−40 TO 85
4−SOT−143
MRLL
ASM162LEUSF/T
4.63
−40 TO 85
4−SOT−143
MSLL
ASM162MEUSF/T
4.38
−40 TO 85
4−SOT−143
MTLL
ASM162JEUSF/T
4.00
−40 TO 85
4−SOT−143
MULL
ASM162TEUSF/T
3.08
−40 TO 85
4−SOT−143
MVLL
ASM162SEUSF/T
2.93
−40 TO 85
4−SOT−143
MWLL
ASM162REUSF/T
2.63
−40 TO 85
4−SOT−143
MXLL
2. For parts to be packed in Tape and Reel, add “−T” at the end of the part number. ON Semiconductor lead free parts are RoHS compliant.
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are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
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operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
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ASM161/D
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