Datasheet Power supply IC series for TFT-LCD panels 12V Input Multi-Channel System Power Supply IC BM81110MUW General Description BM81110MUW is a system power supply for TFT-LCD panels used for liquid crystal TVs. This IC is incorporated with Negative and Positive charge pump controllers and Gate Pulse Modulation (GPM) function. It also features built-in EEPROM to contain each setting voltage, soft start time, etc. Key Specifications Input voltage range： AVDD Output voltage range： VIO Output voltage range： VCORE Output voltage range： HAVDD Output voltage range： VGH Output voltage range： VGL Output voltage range： Switching Frequency： Features ■ Step-up DC/DC converter (AVDD) (Synchronous rectification, built-in load switch) ■ Step-down DC/DC converter 1 (VIO) (Non-synchronous rectification) ■ Step-down DC/DC converter 2 (VCORE) (Synchronous rectification) ■ Step-down DC/DC converter 3 (HAVDD) (Synchronous rectification) ■ Positive charge pump controller (VGH) ■ Negative charge pump controller (VGL) ■ Gate Pulse Modulation (GPM) function ■ Output voltage control by I2C ■ Built-in EEPROM ■ Switching Frequency 750kHz (AVDD, VIO) ■ Switching Frequency 1MHz (VCORE, HAVDD) Operating temperature range： Package VQFN40W6060A 8.6V to 14.7V 13.5V to 19.8V 2.2V to 3.7V 0.8V to 3.3V 4.8V to 11.1V 20V to 35V -14.5V to -5.5V 750kHz(Typ) 1MHz(Typ) -40℃ to +85℃ W(Typ) x D(Typ) x H(Max) 6.00mm x 6.00mm x 0.8mm Applications ■ TFT-LCD panel Typical Application Circuit（TOP VIEW） SW VGH AVDD VIN HAVDD DRVN VGH DRVP RE VGHM N.C. VINB3 SWB3 VDD3 PGND3 SWB1 EN PGND2 VCORE VGL VGL N.C. SWB2 SWO VDD2 SWI CTRL AVDD VIN SW BM81110MUW COMP AGND AVIN HVS A0 NTC N.C. SCL PGND SWB1 SDA PGND SWB1 FAULT VDD1 VINB1 SW VINB1 VIO VINB2 VL Θ VIN Figure1. Application Circuit ○Product structure：Silicon monolithic chip ○This chip www.rohm.com © 2014 ROHM Co., Ltd. All rights reserved. TSZ22111・14・001 has no designed 1/46 protection against radioactive rays. TSZ02201-0313AAF00410-1-2 2015.08.10 Rev.002 BM81110MUW Contents General Description ........................................................................................................................................................................ 1 Features.......................................................................................................................................................................................... 1 Applications .................................................................................................................................................................................... 1 Typical Application Circuit ............................................................................................................................................................... 1 Key Specifications........................................................................................................................................................................... 1 Package .................................................................................................................................................................................. 1 Pin Configuration ......................................................................................................................................................................... 3 Block Diagram (VGH Doubler) ........................................................................................................................................................ 4 Block Diagram (VGH Trippler) ........................................................................................................................................................ 5 Description of each Block ............................................................................................................................................................... 6 Absolute Maximum Ratings ............................................................................................................................................................ 7 Recommended Operating Conditions Electrical Characteristics ......................................................................................................................................... 7 ............................................................................................................................................................. 8 Typical Performance Curves ..................................................................................................................................................... 11 Timing Chart ................................................................................................................................................................................. 21 Example Application（VGH Doubler） ......................................................................................................................................... 22 Example Application（VGH Trippler） .......................................................................................................................................... 23 Protection function explanation of each block ............................................................................................................................... 24 Protection function list ................................................................................................................................................................... 26 Upper limit voltage setting of VGH thermal compensation ............................................................................................................ 27 FAULT function ............................................................................................................................................................................. 27 Serial transmission ....................................................................................................................................................................... 28 Register Map ................................................................................................................................................................................ 31 Command Table ............................................................................................................................................................................ 32 Selecting Application Components ............................................................................................................................................... 33 Layout Guideline ............................................................................................................................................................................. 38 Power Dissipation ......................................................................................................................................................................... 38 I/O Equivalence Circuit ................................................................................................................................................................. 39 Operational Notes ......................................................................................................................................................................... 42 Ordering Information ..................................................................................................................................................................... 44 Marking Diagram .......................................................................................................................................................................... 44 Physical Dimension Tape and Reel Information ............................................................................................................................ 45 Revision History ............................................................................................................................................................................ 46 www.rohm.com © 2014 ROHM Co., Ltd. All rights reserved. TSZ22111 • 15 • 001 2/46 TSZ02201-0313AAF00410-1-2 2015.08.10 Rev.002 BM81110MUW PGND3 SWB3 N.C. VINB3 RE VGHM VGH DRVP DRVN (TOP View) VDD3 Pin Configuration 30 29 28 27 26 25 24 23 22 21 EN 31 20 VGL PGND2 32 19 N.C. SWB2 33 18 SWO VDD2 34 17 SWI CTRL 35 16 SW Thermal Pad 38 13 PGND SWB1 39 12 NTC N.C. 40 11 VL 2 3 4 5 6 7 8 9 10 COMP 1 AGND SWB1 AVIN PGND HVS 14 A0 37 SCL VDD1 SDA SW FAULT 15 VINB1 36 VINB1 VINB2 Figure 2. Pin Configuration Pin Description PIN No. SYMBOL FUNCTION PIN No. SYMBOL FUNCTION 1 VINB1 Step-down DC/DC power supply input 1 21 DRVN Negative charge pump drive pin 2 VINB1 Step-down DC/DC power supply input 1 22 DRVP Positive charge pump drive pin 3 FAULT FAULT signal output 23 VGH Positive charge pump output 4 SDA Serial data input 24 VGHM GPM output 5 SCL Serial clock input 25 RE GPM Slope adjustment pin 6 A0 I2C address select pin 26 VINB3 Step-down DC/DC power supply input 3 7 HVS HVS mode select pin 27 N.C. ― 8 AVIN Power supply input 28 SWB3 Step-down DC/DC switching pin 3 9 AGND Analog ground 29 PGND3 Step-down DC/DC ground 3 10 COMP Error amplifier output 30 VDD3 Step-down DC/DC output 3 11 VL Internal REG output 31 EN Enable input 12 NTC Thermistor connecting pin 32 PGND2 Step-down DC/DC ground 2 13 PGND Step-up DC/DC ground 33 SWB2 Step-down DC/DC switching pin 2 14 PGND Step-up DC/DC ground 34 VDD2 Step-down DC/DC output 2 15 SW Step-up DC/DC switching pin 35 CTRL GPM control pin 16 SW Step-up DC/DC switching pin 36 VINB2 Step-down DC/DC power supply input 2 17 SWI Load switch input 37 VDD1 Step-down DC/DC output 1 18 SWO Load switch output 38 SWB1 Step-down DC/DC switching pin 1 19 N.C. ― 39 SWB1 Step-down DC/DC switching pin 1 20 VGL Negative charge pump output 40 N.C. ― www.rohm.com © 2014 ROHM Co., Ltd. All rights reserved. TSZ22111 • 15 • 001 3/46 TSZ02201-0313AAF00410-1-2 2015.08.10 Rev.002 BM81110MUW Block Diagram (VGH Doubler) COMP AVDD SWO BOOST CONVERTER SWI VIN SW VIN PGND AVIN INTERNAL REGULATOR VIN VINB1 VL BUCK CONVERTER 1 SWB1 VIO EEPROM VDD1 VINB2 SDA SCL I2C INTERFACE A0 BUCK CONVERTER 2 DAC VCORE SWB2 PGND2 HVS VDD2 SEQUENCE CONTROL EN VIN VINB3 BUCK CONVERTER 3 FAULT SWB3 HAVDD PGND3 VDD3 VGH REGULATOR DRVP AVDD SW VGH VGH VL NTC Θ VGL GPM VGHM RE AGND VGL DRVN CTRL VGL SWB1 Figure 3. Block Diagram (VGH Doubler) www.rohm.com © 2014 ROHM Co., Ltd. All rights reserved. TSZ22111 • 15 • 001 4/46 TSZ02201-0313AAF00410-1-2 2015.08.10 Rev.002 BM81110MUW Block Diagram (VGH Trippler) COMP AVDD SWO BOOST CONVERTER SWI VIN SW VIN PGND AVIN INTERNAL REGULATOR VIN VINB1 VL BUCK CONVERTER 1 SWB1 VIO EEPROM VDD1 VINB2 SDA SCL I2C INTERFACE A0 BUCK CONVERTER 2 DAC VCORE SWB2 PGND2 HVS VDD2 SEQUENCE CONTROL EN VIN VINB3 BUCK CONVERTER 3 FAULT SWB3 HAVDD PGND3 AVDD VDD3 VGH REGULATOR DRVP SW SW VGH VGH VL NTC Θ VGL GPM VGHM RE AGND VGL DRVN CTRL VGL SWB1 Figure 4. Block Diagram (VGH Trippler) www.rohm.com © 2014 ROHM Co., Ltd. All rights reserved. TSZ22111 • 15 • 001 5/46 TSZ02201-0313AAF00410-1-2 2015.08.10 Rev.002 BM81110MUW Description of each Block ① BUCK CONVERTER BLOCK 1 This block generates VIO (VDD1) voltage from Power supply voltage. After releasing UVLO of VIN, VL starts activating. After Auto Read is operated to EEPROM, VIO will be activated. Power on Reset works at the time of VIN startup and the setting written to EEPROM will be reflected in Register. During operation, it is possible to prevent destruction of IC by OVP, UVP and OCP protection functions. ② BUCK CONVERTER BLOCK 2 This block generates VCORE (VDD2) voltage from Power supply voltage of VIO. After completing VIO start-up, VCORE starts activating. Power on Reset works at the time of VIN startup and the setting written to EEPROM will be reflected in Register. During operation, it is possible to prevent destruction of IC by OVP, UVP and OCP protection functions. ③ VGL REGULATOR BLOCK This block generates VGL voltage. After completing VCORE start-up, VGL starts activating. Power on Reset works at the time of VIN startup and the setting written to EEPROM will be reflected in Register. During operation, it is possible to prevent destruction of IC by UVP and OCP protection functions. ④ BOOST CONVERTER BLOCK This block generates AVDD (SWO) voltage from Power supply voltage. It activates when EN=H, and under condition where VIO and VGL are active. Power on Reset works at the time of VIN startup and the setting written to EEPROM will be reflected in Register. During operation, it is possible to prevent destruction of IC by OVP, UVP and OCP protection functions. ⑤ BUCK CONVERTER BLOCK 3 This block generates HAVDD (VDD3) voltage from Power supply voltage. HAVDD starts up following AVDD output voltage. The setting voltage range of the HAVDD voltage depends on the AVDD setting voltage, and the lower limit level of the HAVDD voltage is limited to AVDD×0.4. Power on Reset works at the time of VIN startup and the setting written to EEPROM will be reflected in Register. During operation, it is possible to prevent destruction of IC by OVP, UVP and OCP protection functions. ⑥ VGH REGULATOR BLOCK This block generates VGH voltage from AVDD voltage. After completing AVDD star-up, VGH starts activating. Power on Reset works at the time of VIN startup and the setting written to EEPROM will be reflected in Register. During operation, it is possible to prevent destruction of IC by OVP, UVP and OCP protection functions. ⑦ GPM BLOCK This is a switching circuit to drive a gate voltage for TFT consisted of PMOS FET. VGHM output synchronizes with CTRL input and outputs High voltage = VGH at CTRL=H. GPM Falling Limit voltage can be controlled by EEPROM. ※ Caution ・EN Input tolerant function is built-in. No need to be always EN < VIN. ・When FAULT pin is not used, FAULT pin must be connected to GND, or it should be open. ・When NTC pin is not used, NTC pin must be connected to GND. ・When HVS pin is not used, HVS pin must be connected to GND. www.rohm.com © 2014 ROHM Co., Ltd. All rights reserved. TSZ22111 • 15 • 001 6/46 TSZ02201-0313AAF00410-1-2 2015.08.10 Rev.002 BM81110MUW Absolute Maximum Ratings Limits Parameter Symbol Unit MIN TYP MAX AVIN, VINB1, VINB3 -0.3 - 24 V VINB2 -0.3 - 7 V SDA, SCL, A0, HVS, NTC, EN, CTRL -0.3 - 7 V VL -0.3 - 6.5 V -0.3 - 7 V -0.3 - 24 V VGL, DRVN -15 - 7 V DRVP, VGH, VGHM, RE -0.3 - 40 V Ta -40 - 85 ℃ Tstg -55 - 150 ℃ - - 150 ℃ Supply Voltage Input Voltage COMP, FAULT VDD2, SWB2 SW, SWI, SWO, VDD1, SWB1, VDD3, SWB3 Output Voltage Operating Ambient Temperature Range Storage Temperature Range Maximum Continuous Junction Temperature Power Dissipation *1 *2 Tjmax (*1) Pd 3.20 W θja 39.1 degC/W (*2) It shows junction temperature when stores. Derate by 25.6mW/℃ at Ta>25℃ when mounted on 4-layer 114.3mm×74.2mm×1.6mm glass epoxy board. Recommended Operating Conditions (Ta=-40℃～85℃) Limits Parameter Symbol Unit MIN TYP MAX AVIN 8.6 - 14.7 V EN, A0, HVS, CTRL -0.1 - 5.5 V 2 wire serial pin voltage SDA, SCL -0.1 - 5.5 V 2 wire serial frequency FCLK - - 400 kHz Supply Voltage Functional pin voltage www.rohm.com © 2014 ROHM Co., Ltd. All rights reserved. TSZ22111 • 15 • 001 7/46 TSZ02201-0313AAF00410-1-2 2015.08.10 Rev.002 BM81110MUW Electrical Characteristics (Unless otherwise specified, Ta=25℃, AVIN,VINB1,VINB3=12V, VINB2=3.3V) Parameter Symbol Limits Unit Condition MIN TYP MAX 8.0 8.3 8.6 V VIN rising 7.25 7.55 7.85 V VIN falling 【 GENERAL 】 VIN Under Voltage Lockout Threshold VIN_ UVLO Thermal shutdown TSD - 175 - ℃ Internal Oscillator Frequency 1 FOSC1 600 750 900 kHz AVDD, VIO Internal Oscillator Frequency 2 FOSC2 800 1000 1200 kHz VCORE, HAVDD VL Voltage VL 4.9 5 5.1 V Consumption Current ICC - 5.0 - mA No switching 【 LOGIC SIGNALS SDA, SCL, EN, A0, CTRL, HVS 】 High Level Input Voltage VIH 2 - - V Low Level Input Voltage VIL - - 0.5 V Minimum Output Voltage VSDA - - 0.4 V RLOGIC 140 200 260 kΩ Pull-Down Resistance SDA, ISDA=3mA EN, A0, CTRL, HVS 【 BOOST CONVERTER (AVDD) 】 Output Voltage Range AVDD 13.5 - 19.8 V 0.1V step HVS Mode Offset Voltage VHVS 0 - 3 V 0.2V step Regulation Voltage AVDD_R 14.85 15.0 15.15 V Data：0Fh Hi-Side Leakage Current ILK_SWH - 0 10 uA SW=0V RON_SWH - 100 200 mΩ ISW=-500mA ILK_SWL - 0 10 uA SW=24V RON_SWL - 100 200 mΩ ISW=500mA Load SW ON-Resistance RON_LS - 100 200 mΩ ILS=500mA SW Current Limit ILIM_SW 4.25 5 5.75 A L=10uH SW Current Limit Offset ILIM_SET 0 - 2.8 A 0.4A step 20.5 21.5 22.5 V 20 - - V - AVDD x 0.8 - V 10 - 20 msec - 7 - A Hi-Side SW ON-Resistance Lo-Side SW Leakage Current Lo-Side SW ON-Resistance Over-Voltage Protection Rise Over-Voltage Protection Fall AVDD UVP Detecting Voltage Soft Start Time VOVP_AVD D_RISE VOVP_AVD D_FALL VUVP_ AVDD TSS_ AVDD Load Switch Current Limit www.rohm.com © 2014 ROHM Co., Ltd. All rights reserved. TSZ22111 • 15 • 001 ILIM_LSW 8/46 TSZ02201-0313AAF00410-1-2 2015.08.10 Rev.002 BM81110MUW Electrical Characteristics (Unless otherwise specified, Ta=25℃, AVIN,VINB1,VINB3=12V, VINB2=3.3V) Parameter Symbol Limits Unit Condition MIN TYP MAX VIO 2.2 - 3.7 V 0.1V step VIO_R 2.45 2.5 2.55 V Data：03h - 0 10 uA SWB1=0V SWB1=-500mA 【 BUCK CONVERTER 1 (VIO) 】 Output Voltage Range Regulation Voltage Hi-Side SWB1 Leak Current Hi-Side SWB1 ON-Resistance SWB1 Current Limit VIO Over-Voltage Protection VIO UVP Detecting Voltage Soft Start Time ILK_ SWB1H RON_ SWB1H ILIM_ SWB1 VOVP_ VIO VUVP_ VIO - 200 300 mΩ 2.8 3.5 4.2 A - V - V TSS_VIO - 3 - msec VIO=3.0V VCORE 0.8 - 3.3 V 0.1V step VCORE_R 0.98 1.0 1.02 V Data：02h - 0 10 uA SWB2=0V - 175 300 mΩ SWB2=-500mA - 0 10 uA SWB2=7V - 175 300 mΩ SWB2=500mA 2.0 3.0 4.0 A - V - V Frequency 1/4 VCORE=2.0V - VIO x 1.1 VIO x 0.8 L=10uH Frequency 1/4 【 BUCK CONVERTER 2 (VCORE) 】 Output Voltage Range Regulation Voltage Hi-Side SWB2 Leak Current Hi-Side SWB2 ON-Resistance Lo-Side SWB2 Leak Current Lo-Side SWB2 ON-Resistance SWB2 Current Limit VCORE Over-Voltage Protection VCORE UVP Detecting Voltage Soft Start Time ILK_ SWB2H RON_ SWB2H ILK_ SWB2L RON_ SWB2L ILIM_ SWB2 VOVP_ VCORE VUVP_ VCORE TSS_ VCORE - VCORE x 1.1 VCORE x 0.8 L=10uH - 4 - msec HAVDD 4.8 - 11.1 V 0.1V step HAVDD_R 7.3875 7.5 7.6125 V Data：1Bh - 0 10 uA SWB3=0V - 300 500 mΩ SWB3=-500mA - 0 10 uA SWB3=24V - 300 500 mΩ SWB3=500mA 1.0 1.5 2.0 A - V - V 【 BUCK CONVERTER 3 (HAVDD) 】 Output Voltage Range Regulation Voltage Hi-Side SWB3 Leak Current Hi-Side SWB3 ON-Resistance Lo-Side SWB3 Leak Current Lo-Side SWB3 ON-Resistance SWB3 Current Limit HAVDD Over-Voltage Protection HAVDD UVP Detecting Voltage www.rohm.com © 2014 ROHM Co., Ltd. All rights reserved. TSZ22111 • 15 • 001 ILK_ SWB3H RON_ SWB3H ILK_ SWB3L RON_ SWB3L ILIM_ SWB3 VOVP_ HAVDD VUVP_ HAVDD - HAVDD x 1.1 HAVDD x 0.8 9/46 L=10uH Frequency 1/4 TSZ02201-0313AAF00410-1-2 2015.08.10 Rev.002 BM81110MUW Electrical Characteristics (Unless otherwise specified, Ta=25℃, AVIN,VINB1,VINB3=12V, VINB2=3.3V) Parameter Symbol Limits Unit Condition MIN TYP MAX VGH 20 - 35 V 1V step VGH_R 26.6 28 29.4 V Data：08h Io=5mA VGHH_O 0 - 15 V 5 - - mA - VGH x 0.8 - V 36 38 40 V TSS_VGH - 7 - msec VGH=28V VGL -14.5 - -5.5 V 0.6V step VGL_R -8.0975 -7.9 -7.7025 V Data：04h Io=5mA 5 - - mA - VGL×0.8 - V TDLY_VGL - 2.5 - msec R_DRVN - 100 - kΩ 【 VGH REGULATOR 】 Output Voltage Range Regulation Voltage VGH_H Offset Voltage Over-Current Protection VGH UVP Detecting Voltage VGH Over-Voltage Protection Soft Start Time ILIM_ DRVP VUVP_ VGH VOVP_ VGH 【 VGL REGULATOR 】 Output Voltage Range Regulation Voltage Over-Current Protection VGL UVP Detecting Voltage Delay Time DRVN Internal Register ILIM_ DRVN VUVP_ VGL 【 GATE PULSE MODULATION (GPM) 】 VGH-VGHM ON-Resistance RGHH - 3 5 Ω RE-VGHM ON-Resistance RGHL - 3 - Ω Propagation Delay TGPM 150 250 350 nsec ○This product has no designed protection against radioactive rays. www.rohm.com © 2014 ROHM Co., Ltd. All rights reserved. TSZ22111 • 15 • 001 10/46 TSZ02201-0313AAF00410-1-2 2015.08.10 Rev.002 BM81110MUW Typical Performance Curves (Unless otherwise specified, Ta=25℃, AVIN,VINB1,VINB3=12V, VINB2=3.3V, VIO=3.3V, VCORE=1.8V, AVDD=17.5V, HAVDD=9.0V, VGH=28V, VGL=-7.9V, RL=no load) 1500 8 Internal Oscillatior Freqency : FOSC [kHz] 7 Input Current : Icc[mA] 6 5 4 3 EN=L No Switching 2 1 0 5 6 7 8 9 10 11 12 13 14 1200 AVDD,VIO Frequency 1100 1000 900 800 700 VCORE,HAVDD Frequency 600 5 6 7 8 9 10 11 12 13 14 15 Input Voltage : VIN [V] Figure 5. Input Current vs Input Voltage (EN=L, no switching) Figure 6. Internal Oscillator Frequency vs Input Voltage VIN=12V (20V/Div) VIO=3.3V (5V/Div) VIO=3.3V (5V/Div) VCORE=1.8V (5V/Div) VCORE=1.8V (5V/Div) VGH=28V (10V/Div) VGH=28V (10V/Div) AVDD=15V (10V/Div) AVDD=15V (10V/Div) HAVDD=7.5V (10V/Div) HAVDD=7.5V (10V/Div) VGL=-7.9V (10V/Div) VGL=-7.9V (10V/Div) VGHM (20V/Div) VGHM (20V/Div) 10msec/Div 10msec/Div Figure 8. Power-on 2 (VGL driven AVDD switch node) Figure 7. Power-on 1 (VGL driven by VIO switch node) www.rohm.com © 2014 ROHM Co., Ltd. All rights reserved. TSZ22111 • 15 • 001 1300 500 15 Input Voltage : VIN [V] VIN=12V (20V/Div) 1400 11/46 TSZ02201-0313AAF00410-1-2 2015.08.10 Rev.002 BM81110MUW Typical Performance Curves (Unless otherwise specified, Ta=25 ℃ , AVIN,VINB1,VINB3=12V, VINB2=3.3V, VIO=3.3V, VCORE=1.8V, AVDD=17.5V, HAVDD=9.0V, VGH=28V, VGL=-7.9V, RL=no load) 3 100 90 2 70 Output Voltage [%] Efficiency [%] 80 60 50 40 VIN=12V VIO=3.3V 30 1 0 -1 VIN=12V VIO=3.3V 20 -2 10 -3 0 0 200 400 600 800 1000 1200 1400 0 200 400 600 800 1000 Output Current [mA] Output Current [mA] Figure 9. VIO Efficiency vs Output Current Figure 10. VIO Output Voltage vs Output Current VIO (10mV/Div AC) VIO (100mV/Div AC) ΔV：6.3mV SWB1 (10V/Div) ISWB1 (500mA/Div) IOUT=500mA IOUT=100mA IOUT (500mA/Div) IOUT (500mA/Div) 1usec/Div 50usec/Div Figure 12. VIO Switching (Output Current=500mA) Figure 11. VIO Load Transient www.rohm.com © 2014 ROHM Co., Ltd. All rights reserved. TSZ22111 • 15 • 001 12/46 TSZ02201-0313AAF00410-1-2 2015.08.10 Rev.002 BM81110MUW Typical Performance Curves (Unless otherwise specified, Ta=25 ℃ , AVIN,VINB1,VINB3=12V, VINB2=3.3V, VIO=3.3V, VCORE=1.8V, AVDD=17.5V, HAVDD=9.0V, VGH=28V, VGL=-7.9V, RL=no load) 3 100 90 2 70 Output Voltage [%] Efficiency [%] 80 60 50 40 VIN=12V VIO=3.3V VCORE=1.8V 30 20 1 0 -1 VIN=12V VIO=3.3V VCORE=1.8V -2 10 -3 0 0 200 400 600 800 1000 1200 0 1400 200 400 600 800 1000 Output Current [mA] Output Current [mA] Figure 13. VCORE Efficiency vs Output Current Figure 14. VCORE Output Voltage vs Output Current VCORE (10mV/Div AC) VCORE (100mV/Div AC) ΔV：5.2mV SWB2 (5V/Div) IOUT=300mA ISWB2 (500mA/Div) IOUT=10mA IOUT (500mA/Div) IOUT (200mA/Div) 1usec/Div 50usec/Div Figure 16. VCORE Switching (Output Current=500mA) Figure 15. VCORE Load Transient www.rohm.com © 2014 ROHM Co., Ltd. All rights reserved. TSZ22111 • 15 • 001 13/46 TSZ02201-0313AAF00410-1-2 2015.08.10 Rev.002 BM81110MUW Typical Performance Curves (Unless otherwise specified, Ta=25 ℃ , AVIN,VINB1,VINB3=12V, VINB2=3.3V, VIO=3.3V, VCORE=1.8V, AVDD=17.5V, HAVDD=9.0V, VGH=28V, VGL=-7.9V, RL=no load) 3 100 90 2 70 Output Voltage [%] Efficiency [%] 80 60 50 40 VIN=12V AVDD=17.5V HAVDD=9.0V (source) 30 20 1 0 -1 VIN=12V AVDD=17.5V HAVDD=9.0V （source) -2 10 -3 0 0 200 400 600 800 1000 1200 0 1400 200 400 600 800 1000 Output Current [mA] Output Current [mA] Figure 17. HAVDD Efficiency vs Output Current (source) Figure 18. HAVDD Output Voltage vs Output Current (source) HAVDD (10mV/Div AC) HAVDD (100mV/Div AC) ΔV：6.8mV SWB3 (10V/Div) IOUT=350mA ISWB3 (500mA/Div) IOUT=0mA IOUT (500mA/Div) IOUT (300mA/Div) 1usec/Div 200usec/Div Figure 20. HAVDD Switching (source) (Output Current=500mA) Figure 19. HAVDD Load Transient (source) www.rohm.com © 2014 ROHM Co., Ltd. All rights reserved. TSZ22111 • 15 • 001 14/46 TSZ02201-0313AAF00410-1-2 2015.08.10 Rev.002 BM81110MUW Typical Performance Curves (Unless otherwise specified, Ta=25 ℃ , AVIN,VINB1,VINB3=12V, VINB2=3.3V, VIO=3.3V, VCORE=1.8V, AVDD=17.5V, HAVDD=9.0V, VGH=28V, VGL=-7.9V, RL=no load) 3 100 90 2 70 Output Voltage [%] Efficiency [%] 80 60 50 40 VIN=12V AVDD=17.5V HAVDD=9.0V (sink) 30 20 1 0 -1 VIN=12V AVDD=17.5V HAVDD=9.0V （sink) -2 10 -3 0 0 200 400 600 800 1000 1200 0 1400 200 400 600 800 1000 Output Currnet [mA] Output Current [mA] Figure 21. HAVDD Efficiency vs Output Current (sink) Figure 22. HAVDD Output Voltage vs Output Current (sink) HAVDD (10mV/Div AC) ΔV：9.4mV HAVDD (100mV/Div AC) SWB3 (10V/Div) ISWB3 (500mA/Div) IOUT (300mA/Div) IOUT=0mA IOUT=350mA IOUT (500mA/Div) 1usec/Div 200usec/Div Figure 24. HAVDD Switching (sink) (Output Current=500mA) Figure 23. HAVDD Load Transient (sink) www.rohm.com © 2014 ROHM Co., Ltd. All rights reserved. TSZ22111 • 15 • 001 15/46 TSZ02201-0313AAF00410-1-2 2015.08.10 Rev.002 BM81110MUW Typical Performance Curves (Unless otherwise specified, Ta=25 ℃ , AVIN,VINB1,VINB3=12V, VINB2=3.3V, VIO=3.3V, VCORE=1.8V, AVDD=17.5V, HAVDD=9.0V, VGH=28V, VGL=-7.9V, RL=no load) 3 100 90 2 70 Output Voltage [%] Efficiency [%] 80 60 50 40 VIN=12V AVDD=17.5V 30 1 0 -1 VIN=12V AVDD=17.5V 20 -2 10 -3 0 0 200 400 600 800 1000 1200 0 1400 200 400 600 800 1000 Output Current [mA] Output Current [mA] Figure 25. AVDD Efficiency vs Output Current Figure 26. AVDD Output Voltage vs Output Current AVDD (10mV/Div AC) AVDD (200mV/Div AC) ΔV：12.9mV SW (10V/Div) IOUT=500mA ISW (1A/Div) IOUT=100mA IOUT (500mA/Div) IOUT (500mA/Div) 50usec/Div 1usec/Div Figure 28. AVDD Switching (Output Current=500mA) Figure 27. AVDD Load Transient www.rohm.com © 2014 ROHM Co., Ltd. All rights reserved. TSZ22111 • 15 • 001 16/46 TSZ02201-0313AAF00410-1-2 2015.08.10 Rev.002 BM81110MUW Typical Performance Curves (Unless otherwise specified, Ta=25 ℃ , AVIN,VINB1,VINB3=12V, VINB2=3.3V, VIO=3.3V, VCORE=1.8V, AVDD=17.5V, HAVDD=9.0V, VGH=28V, VGL=-7.9V, RL=no load) 3 VGH (200mV/Div AC) Output Voltage [%] 2 IOUT=50mA IOUT=10mA 1 0 -1 VIN=12V AVDD=17.5V VGH=28V IOUT (50mA/Div) -2 -3 200usec/Div 10 30 50 70 90 110 130 150 Output Current [mA] Figure 29. VGH Load Transient Figure 30. VGH Output Voltage vs Output Current VGH (20mV/Div AC) ΔV：14.4mV SW (10V/Div) IOUT=50mA IOUT (50mA/Div) 5usec/Div Figure 31. VGH Ripple Voltage www.rohm.com © 2014 ROHM Co., Ltd. All rights reserved. TSZ22111 • 15 • 001 17/46 TSZ02201-0313AAF00410-1-2 2015.08.10 Rev.002 BM81110MUW Typical Performance Curves (Unless otherwise specified, Ta=25 ℃ , AVIN,VINB1,VINB3=12V, VINB2=3.3V, VIO=3.3V, VCORE=1.8V, AVDD=17.5V, HAVDD=9.0V, VGH=28V, VGL=-7.9V, RL=no load) 40 VIN=12V AVDD=17.5V VGH=20V Output Voltage [V] 35 VL 5V 30 100[kΩ] NTC 25 390[kΩ] 10[kΩ] NCP18XH103F03RB Θ 20 15 -30 -20 -10 0 10 20 30 Temperature [℃] Figure 32. VGH Voltage vs Ta www.rohm.com © 2014 ROHM Co., Ltd. All rights reserved. TSZ22111 • 15 • 001 18/46 TSZ02201-0313AAF00410-1-2 2015.08.10 Rev.002 BM81110MUW Typical Performance Curves (Unless otherwise specified, Ta=25 ℃ , AVIN,VINB1,VINB3=12V, VINB2=3.3V, VIO=3.3V, VCORE=1.8V, AVDD=17.5V, HAVDD=9.0V, VGH=28V, VGL=-7.9V, RL=no load) 3 VGL (100mV/Div AC) Output Voltage [%] 2 IOUT=50mA IOUT=10mA 1 0 -1 VIN=12V VGL=-7.9V IOUT (50mA/Div) -2 -3 200usec/Div 10 30 50 70 90 110 130 150 Output Current [mA] Figure 34. VGL Output Voltage vs Output Current Figure 33. VGL Load Transient ΔV：17.8mV SWB1 (10V/Div) IOUT=50mA IOUT (50mA/Div) 5usec/Div Figure 35. VGL Ripple Voltage www.rohm.com © 2014 ROHM Co., Ltd. All rights reserved. TSZ22111 • 15 • 001 19/46 TSZ02201-0313AAF00410-1-2 2015.08.10 Rev.002 BM81110MUW Typical Performance Curves (Unless otherwise specified, Ta=25 ℃ , AVIN,VINB1,VINB3=12V, VINB2=3.3V, VIO=3.3V, VCORE=1.8V, AVDD=17.5V, HAVDD=9.0V, VGH=28V, VGL=-7.9V, RL=no load) CTRL (5V/Div) CTRL (5V/Div) VGHM (5V/Div) VGHM (5V/Div) Delay=255nsec Delay=270nsec VGH=28V No Capacitive Load RE Resister=0Ω VGH=28V No Capacitive Load RE Resister=0Ω 500nsec/Div 500nsec/Div Figure 37. GPM Propagation Delay (fall) Figure 36. GPM Propagation Delay (rise) CTRL (5V/Div) Clamp Voltage 5V VGHM (10V/Div) 500usec/Div Figure 38. GPM Clamp Voltage (5V Clamp) www.rohm.com © 2014 ROHM Co., Ltd. All rights reserved. TSZ22111 • 15 • 001 20/46 TSZ02201-0313AAF00410-1-2 2015.08.10 Rev.002 BM81110MUW Timing Chart ON and OFF Sequence of this IC are shown below. VIN_ UVLO VIN_ UVLO VIN VL VL_ UVLO TEAR VIO TSS_VIO / 3ms EEPROM Auto Read TSS_VCORE / 4ms VCORE VGL VGL DELAY (internal) TDLY_VGL / 2.5ms EN TSS_AVDD TSS_LSW / 10ms AVDD HAVDD Load Swith ON TSS_VGH / 7ms VGH CTRL VGHM VGHM = RE VGHM = VGH Figure 39. Timing Chart VL activates with UVLO release of VIN. It reads EEPROM data by Auto Read operation upon VL activation. (TEAR=2msec) After Auto Read completion, VIO activates. The Soft Start time of VIO is 3msec if the setting is 3.0V. After VIO soft-start completion, VCORE activates. The Soft Start time of VCORE is 4msec if the setting is 2.0V. After VCORE soft-start completion, VGL activates. The Soft Start time of VGL depends on output voltage setting, external capacitor, etc. 2.5msec after VCORE soft-start completion, Load SW turns ON (10msec) when EN=High then AVDD activates. The Soft Start time of AVDD can be changed by register setting (10msec or 20msec). After AVDD started, VGH activates. The Soft Start time of VGH is 7msec if the setting is 28V. While VGH is active, CTRL rising or falling will be a trigger to activate GPM operation. When VGHM voltage at CTRL=L reaches the GPM clamp voltage, VGHM output is high impedance. GPM, VGH, AVDD, and HAVDD shut down when EN=Low. GPM output (VGHM) will be the same potential with RE. All outputs shut down when a drop in VIN of UVLO is detected. VGHM will be the same potential with VGH. www.rohm.com © 2014 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 21/46 TSZ02201-0313AAF00410-1-2 2015.08.10 Rev.002 BM81110MUW Example Application（TOP VIEW, VGH Doubler） RFP1 CFP2 CFP1 SW VGH AVDD QP DFP2 C23 RQP DFP1 VIN RQN QN HAVDD L30 C26 C30 R25 DFN2 CFN2 DRVN VGH DRVP RE N.C. VINB3 VGHM EN SWB3 VDD3 PGND3 SWB1 DFN1 CFN1 RFN1 VGL VGL C31 C20 PGND2 VCORE N.C. SWB2 AVDD SWO D16 L34 VDD2 C34 C18 SWI C17 CTRL VIN SW BM81110MUW VINB2 SW VDD1 PGND SWB1 PGND SWB1 NTC C15 L15 L37 COMP AGND AVIN HVS A0 SCL SDA N.C. FAULT D39 VINB1 C37 VINB1 R12_1 VIO VL R12_2 C11 RNTC Θ VIN R10 C1 C8 C10 Figure 40. Example Application Application circuit components list Parts name Value Company Parts Number Parts name Value Company Parts Number C1 10 [uF]×2 MURATA GRM31CB31E106KA75 RQN 100 [kΩ] ROHM MCR03 C8 1 [uF] MURATA GRM188B31E105KA75 RQP 100 [kΩ] ROHM MCR03 R10 75 [kΩ] ROHM MCR03 QP - ROHM 2SAR513P C10 470 [pF] MURATA GRM188B11H471KA01 CFP2 470 [pF] MURATA GRM188B11H471KA01 C11 1 [uF] MURATA GRM188B31E105KA75 DFP1 R12_1 100 [kΩ] ROHM MCR03 DFP2 - ROHM RB558W R12_2 390 [kΩ] ROHM MCR03 CFP1 0.47 [uF] MURATA GRM188B31E474KA75 RNTC 10 [kΩ] MURATA NCP18XH103F03RB RFP1 2.2 [Ω] ROHM MCR15 L15 10 [uH] TAIYO YUDEN NS10165T100MNA C23 4.7 [uF]×2 MURATA GRM31CB31H475KA12 C15 10 [uF]×2 MURATA GRM31CB31E106KA75 R25 300 [Ω] ROHM MCR03 D16 - ROHM RB080L-30TE25 C26 10 [uF] MURATA GRM31CB31E106KA75 C17 10 [uF]×2 MURATA GRM31CB31E106KA75 L30 10[uH] TAIYO YUDEN NRS8040T100M C18 10 [uF]×4 MURATA GRM31CB31E106KA75 C30 10 [uF]×2 MURATA GRM31CB31E106KA75 C20 4.7 [uF]×2 MURATA GRM219B31C475KE15 C31 0.1 [uF] MURATA GRM152B30J104KE19 - ROHM RB558W L34 10[uH] TAIYO YUDEN NRS8040T100M C34 10 [uF]×2 MURATA GRM21BB31A106KE18 CFN1 0.47 [uF] MURATA GRM188B31E474KA75 L37 10[uH] TAIYO YUDEN NRS8040T100M RFN1 2.2 [Ω] ROHM MCR15 C37 10 [uF]×3 MURATA GRM21BB31A106KE18 CFN2 0.22 [uF] MURATA GRM188B31E224KA87 D39 - ROHM RSX301L-30 QN - ROHM 2SCR513P DFN1 DFN2 www.rohm.com © 2014 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 22/46 TSZ02201-0313AAF00410-1-2 2015.08.10 Rev.002 BM81110MUW Example Application（TOP VIEW, VGH Trippler） SW CFP1 RFP1 SW CFP4 RFP2 CFP3 VGH AVDD QP DFP2 C23 DFP1 DFP4 RQP DFP3 VIN RQN QN HAVDD L30 C26 C30 R25 DFN2 CFN2 DRVN VGH DRVP RE N.C. VINB3 VGHM EN SWB3 VDD3 PGND3 SWB1 DFN1 CFN1 RFN1 VGL VGL C31 C20 PGND2 VCORE N.C. SWB2 AVDD SWO D16 L34 VDD2 C34 C18 SWI C17 CTRL VIN SW BM81110MUW VINB2 SW VDD1 PGND SWB1 PGND SWB1 NTC C15 L15 L37 COMP AGND AVIN HVS A0 SCL SDA N.C. FAULT D39 VINB1 C37 VINB1 R12_1 VIO VL R12_2 C11 RNTC Θ VIN R10 C1 C8 C10 Figure 41. Example Application Application circuit components list Parts name Value Company Parts Number Parts name C1 10 [uF]×2 MURATA GRM31CB31E106KA75 QP - ROHM 2SAR513P C8 1 [uF] MURATA GRM188B31E105KA75 CFP1 0.1 [uF] MURATA GRM188B31E104KA75 R10 75 [kΩ] ROHM MCR03 RFP1 2.2 [Ω] ROHM MCR15 C10 470 [pF] MURATA GRM188B11H471KA01 DFP1 C11 1 [uF] MURATA GRM188B31E105KA75 DFP2 - ROHM RB558W R12_1 100 [kΩ] ROHM MCR03 DFP3 R12_2 390 [kΩ] ROHM MCR03 DFP4 - ROHM RB558W RNTC 10 [kΩ] MURATA NCP18XH103F03RB CFP3 1[uF] MURATA GRM21BB31H105KA12 L15 10 [uH] TAIYO YUDEN NS10165T100MNA RFP2 2.2 [Ω] ROHM MCR15 C15 10 [uF]×2 MURATA GRM31CB31E106KA75 CFP4 0.1 [uF] MURATA GRM188B31E104KA75 D16 - ROHM RB080L-30TE25 C23 4.7 [uF]×2 MURATA GRM31CB31H475KA12 C17 Value Company Parts Number 10 [uF]×2 MURATA GRM31CB31E106KA75 R25 300 [Ω] ROHM MCR03 C18 10 [uF]×4 MURATA GRM31CB31E106KA75 C26 10 [uF] MURATA GRM31CB31E106KA75 C20 4.7 [uF]×2 MURATA GRM219B31C475KE15 L30 10[uH] TAIYO YUDEN NRS8040T100M - ROHM RB558W C30 10 [uF]×2 MURATA GRM31CB31E106KA75 C31 0.1 [uF] MURATA GRM152B30J104KE19 CFN1 0.47 [uF] MURATA GRM188B31E474KA75 L34 10[uH] TAIYO YUDEN NRS8040T100M RFN1 2.2 [Ω] ROHM MCR15 C34 10 [uF]×2 MURATA GRM21BB31A106KE18 CFN2 0.22 [uF] MURATA GRM188B31E224KA87 L37 10[uH] TAIYO YUDEN NRS8040T100M QN - ROHM 2SCR513P C37 10 [uF]×3 MURATA GRM21BB31A106KE18 RQN 100 [kΩ] ROHM MCR03 D39 - ROHM RSX301L-30 RQP 100 [kΩ] ROHM MCR03 DFN1 DFN2 www.rohm.com © 2014 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 23/46 TSZ02201-0313AAF00410-1-2 2015.08.10 Rev.002 BM81110MUW Protection function explanation of each block 1. BUCK CONVERTER BLOCK 1 (VIO) 1-1. Over Voltage Protection (OVP) OVP function is incorporated to prevent IC or other components from malfunctioning due to rising VIO voltage. Voltage inputted to VDD1 pin is monitored and if VIO voltage reaches VIO>110%(Typ), it is judged as unusual condition thus OVP function is operated. If OVP is detected, switching is stopped until OVP release voltage (100%, Typ) falls to VIO voltage. After OVP is released, switching is re-started. 1-2. Over Current Protection (OCP) If excessive load current (SWB1 peak current>3.5A, Typ) is present, it limits current to flow to built–in Power MOS by controlling Switching. 1-3. Under Voltage Protection (UVP) Timer-latch type output UVP function is built-in. When the unusual condition (VIO<80%) is detected, SWB1 frequency is divided into 1/4 and UVP timer starts. If the unusual condition continues up to 10msec (Typ), all output will be latched in shutdown state. Power reset is needed to remove the latch state and to re-start. 2. BUCK CONVERTER BLOCK 2 (VCORE) 2-1. Over Voltage Protection (OVP) OVP function is incorporated to prevent IC or others components from malfunctioning due to rising VCORE voltage. Voltage inputted to VDD2 pin is monitored and if VCORE voltage reaches VCORE>110%(Typ), it is judged as unusual condition thus OVP function is operated. If OVP is detected, switching is stopped until OVP release voltage (100%, Typ) falls to VCORE voltage. After OVP is released, switching is re-started. 2-2. Over Current Protection (OCP) If excessive load current (SWB2 peak current>3.0A, Typ) is present, it limits current to flow to built–in Power MOS by controlling Switching. 2-3. Under Voltage Protection (UVP) Timer-latch type output UVP function is built-in. When the unusual condition (VCORE<80%) is detected, SWB2 frequency is divided into 1/4 and UVP timer starts. If the unusual condition continues upto 10msec (Typ), all output will be latched in shutdown state. Power reset is needed to remove the latch state and to re-start. 3. VGL REGULATOR BLOCK 3-1. Over Current Protection (OCP) If excessive load current (I_DRVN>5mA, min.) is present, It controls source current (Base current of NPN Tr ) of DRVN. 3-2. Under Voltage Protection (UVP) Timer-latch type output UVP function is built-in. When unusual condition is detected (VGL>80%), the UVP time counter starts. If the unusual condition continues up to 10msec (Typ), all output is latched in shut-down condition. Power reset is needed to cancel the latch state and to re-start. www.rohm.com © 2014 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 24/46 TSZ02201-0313AAF00410-1-2 2015.08.10 Rev.002 BM81110MUW 4. BOOST CONVERTER BLOCK (AVDD) 4-1. Over Voltage Protection (OVP) OVP function is built in to prevent IC or other components from malfunctioning due to excessive rise in AVDD voltage. The voltage inputted to SWO pin is being monitored. If the SWO pin voltage becomes 21.5V(Typ), OVP is detected. Once OVP is detected, switching is stopped. After AVDD voltage falls below OVP detection release voltage 20V(min.), switching is restarted. 4-2. Over Current Protection (OCP) If excessive load current over 5A (Typ) of SW peak current is present, OCP limits current to rush to built-in Power MOS by controlling its output switching. 4-3. Under Voltage Protection (UVP) Timer-latch type output UVP function is built in. When an unusual condition is detected (AVDD<80%), UVP timer starts. If the unusual condition continues up to 10msec(Typ), all output is latched in shut-down condition. Power reset is needed to remove the latch state and to re-start. 4-4. Load Switch Over Current Protection (LSW_OCP) If excessive load current (7A, Typ) is present, It controls current of load switch. 5. BUCK CONVERTER BLOCK 3 (HAVDD) 5-1. Over Voltage Protection (OVP) OVP function is incorporated to prevent IC or other components from malfunctioning due to rising HAVDD voltage. Voltage inputted to VDD3 pin is being monitored and if HAVDD voltage reaches HAVDD>110% (Typ), it is judged as unusual condition thus OVP function is operated. If OVP is detected, switching is stopped until OVP release voltage (100%, Typ) falls to HAVDD voltage. After OVP release, switching is re-started. 5-2. Over Current Protection (OCP) If excessive load current (SWB3 peak current>1.5A, typ.) is present, it limits current to flow to built–in Power MOS by controlling Switching. 5-3. Under Voltage Protection (UVP) Timer-latch type output UVP function is built in. When the unusual condition (HAVDD<80%) is detected, SWB3 frequency is divided into 1/4 and UVP timer starts. If the unusual condition continues up to 10msec(Typ), all output will be latched in shutdown state. Power reset is needed to remove the latch state and to re-start. 6. VGH REGULATOR BLOCK 6-1. Over Voltage Protection (OVP) OVP function is incorporated to prevent IC or other components from malfunctioning due to VGH voltage rising. Voltage inputted to VGH pin is being monitored and if VGH voltage reaches VGH>38V(Typ), it is judged as unusual condition so that OVP function is operated. If OVP is detected, limit DRVP current until OVP release voltage (35V, Typ) falls to VGH voltage. After OVP release, the current limiting of the DRVP pin is canceled. 6-2. Over Current Protection (OCP) If excessive load current (I_DRVP>5mA, min.) is present, it controls sink current (Base current of PNP Tr ) of DRVP. 6-3. Under Voltage Protection (UVP) Timer-latch type output UVP function is built in. When an unusual condition is detected (VGH<80%), UVP timer starts. If the unusual condition continues up to 10msec (Typ), all output is latched in shut-down condition. Power reset is needed to remove the latch state and to re-start. 7. GENERAL 7-1. Thermal shutdown All outputs will shut down when the IC temperature exceeds 175℃(typ.). After the temperature falls below 150℃(Typ), the operation re-starts. 7-2. VIN Under Voltage Lock Out VIN Under Voltage Lock Out prevents the circuit malfunction below the UVLO voltage. If VIN voltage is below the UVLO voltage (8.3V / 7.55V), it enters the standby state. www.rohm.com © 2014 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 25/46 TSZ02201-0313AAF00410-1-2 2015.08.10 Rev.002 BM81110MUW Protection function list BLOCK BUCK CONVERTER 1 BUCK CONVERTER 2 VGL REGULATOR BOOST CONVERTER LOAD SW BUCK CONVERTER 3 VGH REGULATOR VGH REGULATOR Protective Function Working Condition Action Protective removal OVP VIO>110% Stops switching. VIO<100% OCP I_SWB1>3.5A Controls switching pulse duty to not exceed over current limit. I_SWB1<3.5A Frequency becomes 1/4 VIO>80% UVP VIO<80% IC shuts down if UVP status maintains in 10msec. IC restart OVP VCORE>110% Stops switching. VCORE<100% OCP I_SWB2>3.0A Controls switching pulse duty to not exceed over current limit. I_SWB2<3.0A Frequency becomes 1/4 VCORE>80% UVP VCORE<80% IC shuts down if UVP status maintains in 10msec. IC restart OCP I_DRVN> 5 mA Limits DRVN current. I_DRVN< 5 mA UVP VGL<80% IC shuts down if UVP status maintains in 10msec. IC restart OVP SWI>21.5V Stops switching SWI<20V OCP I_SW>5A Controls switching pulse duty to not exceed over current limit. I_SW<5A UVP SWO<80% IC shuts down if UVP status maintains in 10msec. IC restart OCP I_SWO>7.0A Off the Load Switch. IC restart OVP HAVDD>110% Stops switching. HAVDD<100% OCP I_SWB3>1.5A Controls switching pulse duty to not exceed over current limit. I_SWB3<1.5A Frequency becomes ¼ HAVDD>80% UVP HAVDD<80% IC shuts down if UVP status maintains in 10msec. IC restart OVP VGH>38V DRVP current limit to 0mA VGH<35V OCP I_DRVP> 5 mA Limits DRVP current. I_DRVP< 5 mA UVP VGH<80% IC shuts down if UVP status maintains in 10msec. IC restart TSD Tj>175℃ IC shuts down Tj<150℃ UVLO VIN<7.55V IC shuts down VIN>8.3V GENERAL www.rohm.com © 2014 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 26/46 TSZ02201-0313AAF00410-1-2 2015.08.10 Rev.002 BM81110MUW Upper limit voltage setting of VGH thermal compensation 36 Low Temp setting is selected. 5V R12_1 NTC R12_2 RNTC (Therminstor) Θ VGH Voltage [V] VL 5V 32 NTC setting is selected. 28 NTC Setting Normal Temp setting is selected. Low Temp Setting (VGH_H) Normal Temp Setting (VGH_L) 24 Ta [℃] Figure 42. VGH thermal compensation This IC installs the thermal compensation function for VGH voltage. VGH thermal compensation upper limit voltage (VGH_H) is settable by changing the EEPROM setting. Thermal gradient setting is possible by the thermistor (R_NTC) connected to NTC pin and the resistor divider (R_NTC1, R_NTC2). FAULT function The FAULT output indicates the status of the protection circuit of this IC. Because FAULT is an open-drain output, place a pull-up resistor externally. When the FAULT output will not be used, leave the pin OPEN. 10～220[kΩ] FAULT Figure 43. FAULT Terminal The recommended external pull-up resistance for the FAULT output is 10kΩ to 220kΩ. An external resistance of under 10kΩ can generate an offset voltage during FAULT=L caused by the voltage drop across the internal ON resistance. On the other hand, an external resistance of more than 220kΩ can interfere with the output during FAULT=H because of leak current. The conditions that FAULT terminal becomes Low are as follows. ・If UVLO operates ・If UVP operates ・If TSD operates When FAULT function is not used, connect NTC pin to GND, or please make it open. www.rohm.com © 2014 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 27/46 TSZ02201-0313AAF00410-1-2 2015.08.10 Rev.002 BM81110MUW Serial transmission 2 Use I C BUS control for command interface with Host. Writing or reading by specifying 1 byte Register address besides Slave address. 2 I C BUS slave mode format is shown below. Slave Address Write operation Start Read operation Start 0 1 0 1 0 0 0 0 A0 0 0 Slave Address R/W A 0 Start Slave Address : : ACK : Register Address Data STOP : : : 0 0 Register Address A DATA A Select Register Address (8bit) 0 8bit DATA 0 Register Address A DATA A Select Register Address (8bit) 0 8bit DATA 0 R/W A 0 A0 1 0 Stop Stop Start condition Send 7 bit data in all with bit of Read Mode (H) or Write Mode (L). (MSB First) A0 is selectable (1/0) with the slave address select pin. Acknowledge Sending or receiving data includes acknowledge bit per byte. If the data is sent or received properly, ‘L’ is sent and received. If ‘H’ is sent and received, it means there is no Acknowledge. Use 1 byte select address. Data byte. Sending and Receiving data (MSB First) Stop condition For writing mode from I2C BUS to register, there is Single mode or Multi-mode. On single mode, write data to one designated register. On multi-mode, as a start address register specified in the second byte, writing data can be performed continuously, by entering multiple data. Single mode or multi-mode setting can be configured by having or not having ‘stop bit’. ①Single Mode Timing Chart start Slave Address Write Ackn Resister Address Ackn Data Ackn Stop SCL SDA_in Device_Out A6 A5 A4 A3 A2 A1 A0 R/W Ackn R7 R6 R5 R4 R3 R2 R1 R0 Ackn D7 D6 D5 D4 D3 D2 D1 D0 Ackn A6 A5 A4 A3 A2 A1 A0 R/W Ackn R7 R6 R5 R4 R3 R2 R1 R0 Ackn D7 D6 D5 D4 D3 D2 D1 D0 Ackn ②Multi Mode Timing Chart start Slave Address Write Ackn Resister Address (Ex.01h) Ackn Data (to Resister 01h) Ackn Data (to Resister 02h) Ackn SCL SDA_in Device_Out ・・・ A6 A5 A4 A3 A2 A1 A0 R/W Ackn R7 R6 R5 R4 R3 R2 R1 R0 Ackn D7 D6 D5 D4 D3 D2 D1 D0 Ackn D7 D6 D5 D4 D3 D2 D1 D0 Ackn ・・・ A6 A5 A4 A3 A2 A1 A0 R/W Ackn R7 R6 R5 R4 R3 R2 R1 R0 Ackn D7 D6 D5 D4 D3 D2 D1 D0 Ackn D7 D6 D5 D4 D3 D2 D1 D0 Ackn ・・・ DAC(3) MSbyte. Data (to D15-D10 Resisterhave 05h)no meaning Ackn Data DAC(3) (to Resister LSbyte.06h) Ackn Stop ・・・ www.rohm.com © 2014 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 ・・・ D7 D6 D5 D4 D3 D2 D1 D0 Ackn D7 D6 D5 D4 D3 D2 D1 D0 Ackn ・・・ D7 D6 D5 D4 D3 D2 D1 D0 Ackn D7 D6 D5 D4 D3 D2 D1 D0 Ackn 28/46 TSZ02201-0313AAF00410-1-2 2015.08.10 Rev.002 BM81110MUW I2C Timing Diagram tR tHIGH tF 70% SCL 30% tLOW tHD: STA tSU; DAT tPD tHD; DAT 70% SDA (IN) 30% tBUF tDH 70% SDA ( OUT) 30% 70% SCL tHD; STA tSU; STA tSU; STO 70% SDA 30% tl S S： START ビット P： STOP ビット P Figure 44. I2C Timing Diagram ・Timing standard values Parameter SCL frequency SCL high time SCL low time Rise Time Fall Time Start condition hold time Start condition setup time SDA hold time SDA setup time Acknowledge delay time Acknowledge hold time Stop condition setup time Bus release time Noise spike width Symbol ｆSCL tHIGH tLOW tR tF tHD；STA tSU；STA tHD；DAT tSU；DAT tPD tDH tSU；STO tBUF Tl www.rohm.com © 2014 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 MIN 4.0 4.7 4.0 4.7 200 200 4.7 4.7 - NORMAL MODE TYP 0.1 0.1 29/46 MAX 100 1.0 0.3 0.9 - MIN 0.6 1.2 0.6 0.6 100 100 0.6 1.2 - FAST MODE TYP 0.1 0.1 MAX 400 0.3 0.3 0.9 - Unit kHz us us us us us us ns ns us us us us us TSZ02201-0313AAF00410-1-2 2015.08.10 Rev.002 BM81110MUW Command interface EEPROM transmission format for data sending and receiving is shown below. I2C Write format Slave Address Start 0 1 0 0 0 R/W A 0 A0 0 Register Address A DATA A 00h to 0Ch 0 N-bytes DATA 0 0 Stop It can enter further Register from 3 byte by entering data continuously. DATA after 0Dh is invalid. Inputted Data reflect to the Register at the ACK output timing. I2C Read format 1. Read data from DAC Register Slave Address Start 0 Repeated Start 1 0 Register Address R/W A 1 0 0 0 0 A0 1 0 A 00h to 0Ch 0 DATA A N-bytes DATA 0 0 0 0 0 A0 0 0 Slave Address R/W A Stop EEPROM Write format Transmission format for Write operation of EEPROM (DAC Register) is shown below. EEPROM Write format Start Slave Address 0 1 0 0 0 Register Address R/W A 0 A0 0 0 1 1 1 1 1 1 DATA A 1 1 0 1 X X X X A X X X 0 Stop D6 to D0 : Don’t care Automatic EEPROM Read Function at Start-up Upon BM81110MUW start-up, a reset signal is generated and each register is initialized. After VL activation is finished, data which is stored in the EEPROM is copied to the registers. The automatic EEPROM read function at start-up is further explained by the flow chart below. VL ACTIVE EEPROM READ TRANSFER DATA REGISTER START OPERATION Figure 45. Automatic EEPROM Read Function at Start-up www.rohm.com © 2014 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 30/46 TSZ02201-0313AAF00410-1-2 2015.08.10 Rev.002 BM81110MUW Content of EEPROM setting Register Address 00h 01h 02h 03h 04h 05h 06h 07h 08h 09h 0Ah 0Bh 0Ch FFh *1 *2 Bits Function Default(*1) 6 6 4 3 1 4 5 6 4 4 2 4 4 8 Channel Disable Register AVDD output voltage setting[5:0] AVDD HVS voltage setting[3:0] AVDD OCP offset setting[2:0] AVDD soft start time setting[0] VIO output voltage setting[3:0] VCORE output voltage setting[4:0] HAVDD output voltage setting[5:0] VGH_L output voltage setting[3:0] VGH_H offset voltage setting[3:0] GPM clamp voltage setting[1:0] VGL output voltage setting[3:0] HAVDD HVS voltage setting[3:0] Resolution 00h 15.0V [0Fh] 1.0V [05h] 0.0A [00h] 10msec [00h] 2.5V [03h] 1.0V [02h] 7.5V [1Bh] 28V [08h] 4V [04h] 5V [01h] -7.9V [04h] 0.0V [00h] Control Register[7:0] 0.1V [13.5V to 19.8V] 0.2V [0V to 3.0V] 0.4A [0A to 2.8A] 10msec [10msec or 20msec] 0.1V [2.2V to 3.7V] 0.1V [0.8V to 3.3V] 0.1V [4.8V to 11.1V] 1V [20V to 35V] 1V [0V to 15V] 5V [5V to 15V] 0.6V [-14.5V to -5.5V] 0.1V [0.0V to 1.5V] Factory value. Value of default voltage setting. The Soft start time of each output changes depending on the setting voltage. Channel Disable Register Register Address = 00h [7] [6] [5] [4] [3] [2] [1] - - VCORE HAVDD VGH VGL GPM [0] NTC 0：Enable 1：Disable Control Register Register Address DATA [BIN] Function FFh 1xxx_xxxx Write to EEPROM from DAC Register data. x：Don’t care bit Register Map Resister Address 00h 01h 02h 03h 04h 05h 06h 07h 08h 09h 0Ah 0Bh 0Ch FFh D7 D6 D5 D4 ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― VCORE HAVDD www.rohm.com © 2014 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 ― ― ― ― ― ― ― ― ― ― D3 D2 D1 D0 VGH VGL GPM NTC AVDD[5:0] ― AVDD HVS [3:0] ― ― AVDD OCP offset[2:0] ― ― ― ― AVDD SS ― VIO [3:0] VCORE [4:0] HAVDD [5:0] ― VGH_L [3:0] ― VGH_H offset [3:0] ― ― ― GPM clamp [1:0] ― VGL [3:0] ― HAVDD HVS [3:0] （ Control Register ） 31/46 Default 00h 0Fh 05h 00h 00h 03h 02h 1Bh 08h 04h 01h 04h 00h ― TSZ02201-0313AAF00410-1-2 2015.08.10 Rev.002 BM81110MUW Command Table 01 [5:0] 02 [3:0] DATA (HEX) AVDD [V] AVDD HVS [V] 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F 20 21 22 23 24 25 26 27 28 29 2A 2B 2C 2D 2E 2F 30 31 32 33 34 35 36 37 38 39 3A 3B 3C 3D 3E 3F 13.5 13.6 13.7 13.8 13.9 14.0 14.1 14.2 14.3 14.4 14.5 14.6 14.7 14.8 14.9 15.0 15.1 15.2 15.3 15.4 15.5 15.6 15.7 15.8 15.9 16.0 16.1 16.2 16.3 16.4 16.5 16.6 16.7 16.8 16.9 17.0 17.1 17.2 17.3 17.4 17.5 17.6 17.7 17.8 17.9 18.0 18.1 18.2 18.3 18.4 18.5 18.6 18.7 18.8 18.9 19.0 19.1 19.2 19.3 19.4 19.5 19.6 19.7 19.8 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 2.8 3.0 03 [2:0] AVDD OCP offset [A] 0.0 0.4 0.8 1.2 1.6 2.0 2.4 2.8 04 [0] 05 [3:0] Register Address 06 07 [4:0] [5:0] AVDD soft start [msec] VIO [V] VCORE [V] 2.2 2.3 2.4 2.5 2.6 2.7 2.8 2.9 3.0 3.1 3.2 3.3 3.4 3.5 3.6 3.7 0.8 0.9 1.0 1.1 1.2 1.3 1.4 1.5 1.6 1.7 1.8 1.9 2.0 2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 2.9 3.0 3.1 3.2 3.3 10 20 08 [3:0] 09 [3:0] 0A [1:0] 0B [3:0] 0C [3:0] HAVDD [V] VGH_L [V] VGH_H offset [V] GPM clamp [V] VGL [V] HAVDD HVS [V] 4.8 4.9 5.0 5.1 5.2 5.3 5.4 5.5 5.6 5.7 5.8 5.9 6.0 6.1 6.2 6.3 6.4 6.5 6.6 6.7 6.8 6.9 7.0 7.1 7.2 7.3 7.4 7.5 7.6 7.7 7.8 7.9 8.0 8.1 8.2 8.3 8.4 8.5 8.6 8.7 8.8 8.9 9.0 9.1 9.2 9.3 9.4 9.5 9.6 9.7 9.8 9.9 10.0 10.1 10.2 10.3 10.4 10.5 10.6 10.7 10.8 10.9 11.0 11.1 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 5 10 15 -5.5 -6.1 -6.7 -7.3 -7.9 -8.5 -9.1 -9.7 -10.3 -10.9 -11.5 -12.1 -12.7 -13.3 -13.9 -14.5 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.3 1.4 1.5 : Default Value ① AVDD HVS Voltage Setting (Register Address：02h) When HVS=High, AVDD becomes AVDD setting voltage + AVDD HVS setting voltage [V]. ② VGH _H offset Voltage Setting (Register Address：09h) When NTC=High, VGH becomes VGH_L setting voltage + VGH_H offset setting voltage [V]. ③ HAVDD HVS Voltage Setting (Register Address：0Ch) When HVS=High, HAVDD becomes HAVDD setting voltage + HAVDD HVS setting voltage [V]. www.rohm.com © 2014 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 32/46 TSZ02201-0313AAF00410-1-2 2015.08.10 Rev.002 BM81110MUW Selecting Application Components 1. Buck Converter 1-1. Selecting the Output LC Constant IL IOMAX+ ⊿IL should not reach the rated value level. 2 ILR IOMAXMean current t Figure 46. Inductor Current Waveform (Buck Converter) The output inductance (L) is decided by the rated current (ILR) and maximum input current (IOMAX) of the inductance. Adjust so that IOMAX + ΔIL / 2 do not reach the rated current value. ΔIL can be obtained by the following equation. VO 1 1 ΔIL = L × (VIN - VO) × VIN × f [A] where f is the switching frequency Set with sufficient margin because the inductance value may have a dispersion of ±30%. If the coil current exceeds the rated current (ILR), the IC may be damaged. 1-2. Selecting the Input/Output capacitor The output capacitor (CO) smoothens the ripple voltage at the output. Select a capacitor that will regulate the output ripple voltage within the specifications. Output ripple voltage can be obtained by the following equation. ΔIL VO 1 ΔVPP = ΔIL × RESR ＋ 2 Co × VIN × f However, since the aforementioned conditions are based on a lot of factors, verify the results using the actual product. Since the peak current flows between the input and output at the DC/DC converter, a capacitor is required to be installed at the Input side. For this reason, a low ESR capacitor is recommended as an input capacitor with a value more than 10μF and less than 100mΩ ESR. If an out of range capacitor is selected, the excessive ripple voltage is superimposed on the input voltage, thus it may cause the malfunction of IC. However these conditions may vary according to the load current, input voltage, output voltage, inductance and switching frequency. Be sure to perform margin check using the actual product. www.rohm.com © 2014 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 33/46 TSZ02201-0313AAF00410-1-2 2015.08.10 Rev.002 BM81110MUW 1-3. Selecting the Output rectifier diode A schottky barrier is recommended as rectifier diode to be used at the output stage of the DC/DC converter. Select carefully in consideration of the maximum inductor current, maximum output voltage and power supply voltage. ΔIL Maximum inductor current IOMAX ＋ 2 ＜ Diode Maximum Absolute Current VIN ＜ Diode Maximum Absolute Voltage Provide sufficient design margins for a tolerance of 30% to 40% for each parameter. Maximum input voltage 2. Boost Converter 2-1. Selecting the Output LC Constant IL IOMAX+ ⊿IL 2 should not reach the rated value level. ILR IOMAX mean current t Figure 47. Inductor Current Waveform ( Boost Converter ) The output inductance (L) is decided by the rated current (ILR) and maximum input current (IINMAX) of the inductance. Adjust so that IINMAX + ΔIL / 2 does not reach the rated current value. ΔIL can be obtained by the following equation. Δ IL 1 VO VIN 1 VIN [A] L VO f where f is the switching frequency Set with sufficient margin because the inductance value may have a dispersion of ±30%. If the coil current exceeds the rated current (ILR), this may damage the IC. 2-2. Selecting the Output capacitor The output capacitor (CO) smoothens the ripple voltage at the output. Select a capacitor that will regulate the output ripple voltage within the specifications. Output ripple voltage can be obtained by the following equation. 1 VIN ΔVPP = ＩLMAX × RESR ＋ f × CO × VO × ΔIL ILMAX － 2 However, since the aforementioned conditions are based on a lot of factors, verify the results using the actual product. Since the peak current flows between the input and output at the DC/DC converter, a capacitor is required at the Input side. For this reason, a low ESR capacitor is recommended as an input capacitor with a value more than 10μF and less than 100mΩ ESR. If an out of range capacitor is selected, the excessive ripple voltage is superimposed on the input voltage, thus it may cause the malfunction of IC. However these conditions may vary according to the load current, input voltage, output voltage, inductance and switching frequency. Be sure to perform the margin check using the actual product. www.rohm.com © 2014 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 34/46 TSZ02201-0313AAF00410-1-2 2015.08.10 Rev.002 BM81110MUW 2-3. Setting phase compensation Phase setting procedure. Stable negative feedback condition is achieved as follows: ・When the gain is set to 1 (0 dB), phase delay should not be more than 150°.Consequently, phase margin should not be less than 30°. Also, since DC/DC converter applications are sampled according to the switching frequency, the whole system GBW should be set to not more than 1/10 of the switching frequency. The target characteristics of the applications can be summarized as follows: ・When the gain is set to 1 (0 dB), the phase delay should not be more than 150°. And phase margin should not be less than 30°. ・The frequency when the gain is set to 0 dB should not be more than 1/10 of the switching frequency. The responsiveness is determined by the GBW limitation. Consequently, to increase the circuit response, higher switching frequencies are required. AVDD is in current mode control. The current mode control is a two-pole single-zero system. The poles are formed by the error amplifier and load while added zero is for phase compensation. By placing poles appropriately, the circuit can maintain good stability and transient load response. Board plot diagram of general DC/DC converter is described below. At point (a), gain starts falling via the output impedance of the error amplifier and forms a pole by capacitor Ccp. When point (b) is reached, a zero is formed by resistor Rpc and capacitor Ccp to cancel the pole by loading and balancing the variation of Gain and phase. The GBW (i.e., frequency when the gain is 0 dB) is determined by phase compensation capacitor connected to the error amplifier. If GBW is to be reduced, increase the capacitance of the capacitor. A Vo R3 Gain [dB] R1 C1 R2 A (a) -20dB/decade 0 COMP GBW(b) f 0 Rcp Phase [deg] Ccp -90 -90° Phase margin -180 -180° f Figure 48. Setting phase compensation Formed Zero (fz1) by Rcp resistor and Ccp Capacitor are shown by using the following equation. And also, Feed-forward capacitor C1 and R1 resistor both create Formed Zero (fz2) and it is used as boosting phase margin in the limited frequency area. Phase lead Phase lead 1 fZ1 = 2πCcpRcp [Hz] 1 fZ2 = [Hz] 2πC1R1 The formed zero fz2 phase compensation is built-in to the IC. www.rohm.com © 2014 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 35/46 TSZ02201-0313AAF00410-1-2 2015.08.10 Rev.002 BM81110MUW 3. Positive Charge Pump : VGH 3-1. Selecting the Output rectifier diode Select carefully in consideration of the maximum load current, maximum output voltage and power supply voltage. Maximum output current IOMAX ＜ Diode Maximum Absolute Current Maximum output voltage AVDD ＜ Diode Maximum Absolute Voltage Provide sufficient design margins for a tolerance of 30% to 40% for each parameter. 3-2. Selecting the Output PNP transistor Select carefully in consideration of the maximum load current, maximum output voltage and power supply voltage. AVDD－VIN Boost Converter Duty D= AVDD IOMAX Maximum Output current ＜Transistor Maximum Absolute Current D Power supply voltage AVDD x 2 ＜Transistor Maximum Absolute Voltage DC gain IOMAX / IBASE ＜Transistor hfe ＜Transistor Power dissipation Power dissipation (Doubler Mode) ( 2 x AVDD – VGH – 2 x Vf ) x IOUT Power dissipation (Tripler Mode) ( 3 x AVDD – VGH – 4 x Vf ) x IOUT ＜Transistor Power dissipation Maximum DRVP current IBASE（5mA） Provide sufficient design margins for a tolerance of 30% to 40% for each parameter. 3-3. Selecting the base emitter resistor 100kΩ base-emitter resistor used to ensure proper operation. 3-4. Selecting the flying capacitor and the switch node resistor 0.1uF to 0.47uF flying capacitor and 1Ω to 20Ω resistor are appropriate for most applications. 3-5. Selecting the output capacitor A 10uF ceramic capacitor is appropriate for most applications. More capacitor can be added to improve the load transient response. www.rohm.com © 2014 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 36/46 TSZ02201-0313AAF00410-1-2 2015.08.10 Rev.002 BM81110MUW 4. Negative Charge Pump : VGL 4-1. Selecting the Output rectifier diode Select carefully in consideration of the maximum load current, maximum output voltage and power supply voltage. Maximum output current IOMAX ＜ Diode Maximum Absolute Current Maximum switching voltage VIN ＜ Diode Maximum Absolute Voltage Provide sufficient design margins for a tolerance of 30% to 40% for each parameter. 4-2. Selecting the Output NPN transistor Select carefully in consideration of the maximum load current, maximum output voltage and power supply voltage. VIN－VIO VIN Converter Duty D= or AVDD VIN IOMAX Maximum output current ＜Transistor Maximum Absolute Current D Power supply voltage DC gain Power dissipation (Doubler Mode) Or Maximum DRVN current VIN IOMAX / IBASE (VIN - ∣ VGL ∣ – 2 x Vf ) x IOUT (AVDD - ∣ VGL ∣ – 2 x Vf ) x IOUT IBASE（5mA） ＜Transistor Maximum Absolute Voltage ＜Transistor hfe ＜Transistor Power dissipation Provide sufficient design margins for a tolerance of 30% to 40% for each parameter. 4-3. Selecting the base emitter resistor 100kΩ base-emitter resistor used to ensure proper operation. 4-4. Selecting the flying capacitor and the switch node resistor 0.1uF to 0.47uF flying capacitor and 1Ω to 20Ω resistor are appropriate for most applications. 4-5. Selecting the output capacitor A 10uF ceramic capacitor is appropriate for most applications. More capacitor can be added to improve the load transient response. www.rohm.com © 2014 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 37/46 TSZ02201-0313AAF00410-1-2 2015.08.10 Rev.002 BM81110MUW Layout Guideline DC/DC converter switching line must be as short and thick as possible to reduce line impedance. If the wiring is long, ringing caused by switching would increase and this may exceed the absolute maximum voltage ratings. If the parts are located far apart, consider inserting a snubber circuit. The thermal Pad on the back side of IC has the great thermal conduction to the chip. So using the GND plain as broad and wide as possible can help thermal dissipation. And a lot of thermal via for helping the spread of heat to the different layer is also effective. When there is unused area on PCB, please arrange the copper foil plain of DC nodes, such as GND, VIN and VOUT for helping heat dissipation of IC or circumference parts. Power Dissipation 3.5 (3) 3.2W POWER DISSIPATION : Pd [W] 3 (2) 2.5W 2.5 2 1.5 (1) 1.1W 1 0.5 0 0 25 50 75 100 125 150 AMBIENT TEMPERATURE : Ta [℃] VQFN40W6060A Package On 4-layer 114.3mm×74.2mm×1.6mm glass epoxy PCB (1) 1-layer board (Backside copper foil area 0 mm ×0 mm) (2) 2-layer board (Backside copper foil area 74.2 mm ×74.2 mm) (3) 4-layer board (The 2nd, 3rd layers and backside copper foil area 74.2 mm ×74.2 mm) www.rohm.com © 2014 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 38/46 TSZ02201-0313AAF00410-1-2 2015.08.10 Rev.002 BM81110MUW I/O Equivalence Circuit 1, 2.VINB1 3. FAULT 4.SDA VINB1 Internal reg. FAULT SDA 5.SCL 6.A0 7.HVS Internal reg. SCL Internal reg. A0 8.AVIN AVIN Internal reg. HVS 10.COMP 11.VL Internal reg. AVIN AVIN COMP 12.NTC NTC www.rohm.com © 2014 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 VL 15, 16.SW 17.SWI SWO SWO SWI SWI SW SW 39/46 TSZ02201-0313AAF00410-1-2 2015.08.10 Rev.002 BM81110MUW 18.SWO 20.VGL 21.DRVN SWO SWI VL VL Internal reg. VL SW DRVN VGL 22.DRVP 23.VGH 24.VGHM VGH VGH VGH VGH DRVP VGHM RE 25.RE 26.VINB3 VGH VGH 28.SWB3 VGH VINB3 VINB3 VGHM SWB3 RE 30.VDD3 31.EN VINB3 VDD3 www.rohm.com © 2014 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 33.SWB2 VINB2 Internal reg. EN SWB2 40/46 TSZ02201-0313AAF00410-1-2 2015.08.10 Rev.002 BM81110MUW 34.VDD2 35.CTRL 36.VINB2 Internal reg. VINB2 VDD2 CTRL 37.VDD1 38,39.SWB1 VINB1 VDD1 www.rohm.com © 2014 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 VINB1 SWB1 41/46 TSZ02201-0313AAF00410-1-2 2015.08.10 Rev.002 BM81110MUW Operational Notes 1. Reverse Connection of Power Supply Connecting the power supply in reverse polarity can damage the IC. Take precautions against reverse polarity when connecting the power supply, such as mounting an external diode between the power supply and the IC’s power supply pins. 2. Power Supply Lines Design the PCB layout pattern to provide low impedance supply lines. Separate the ground and supply lines of the digital and analog blocks to prevent noise in the ground and supply lines of the digital block from affecting the analog block. Furthermore, connect a capacitor to ground at all power supply pins. Consider the effect of temperature and aging on the capacitance value when using electrolytic capacitors. 3. Ground Voltage Ensure that no pins are at a voltage below that of the ground pin at any time, even during transient condition. 4. Ground Wiring Pattern When using both small-signal and large-current ground traces, the two ground traces should be routed separately but connected to a single ground at the reference point of the application board to avoid fluctuations in the small-signal ground caused by large currents. Also ensure that the ground traces of external components do not cause variations on the ground voltage. The ground lines must be as short and thick as possible to reduce line impedance. 5. Thermal Consideration Should by any chance the power dissipation rating be exceeded the rise in temperature of the chip may result in deterioration of the properties of the chip. In case of exceeding this absolute maximum rating, increase the board size and copper area to prevent exceeding the Pd rating. 6. Recommended Operating Conditions These conditions represent a range within which the expected characteristics of the IC can be approximately obtained. The electrical characteristics are guaranteed under the conditions of each parameter. 7. Inrush Current When power is first supplied to the IC, it is possible that the internal logic may be unstable and inrush current may flow instantaneously due to the internal powering sequence and delays, especially if the IC has more than one power supply. Therefore, give special consideration to power coupling capacitance, power wiring, width of ground wiring, and routing of connections. 8. Operation Under Strong Electromagnetic Field Operating the IC in the presence of a strong electromagnetic field may cause the IC to malfunction. 9. Testing on Application Boards When testing the IC on an application board, connecting a capacitor directly to a low-impedance output pin may subject the IC to stress. Always discharge capacitors completely after each process or step. The IC’s power supply should always be turned off completely before connecting or removing it from the test setup during the inspection process. To prevent damage from static discharge, ground the IC during assembly and use similar precautions during transport and storage. 10. Inter-pin Short and Mounting Errors Ensure that the direction and position are correct when mounting the IC on the PCB. Incorrect mounting may result in damaging the IC. Avoid nearby pins being shorted to each other especially to ground, power supply and output pin. Inter-pin shorts could be due to many reasons such as metal particles, water droplets (in very humid environment) and unintentional solder bridge deposited in between pins during assembly to name a few. 11. Unused Input Pins Input pins of an IC are often connected to the gate of a MOS transistor. The gate has extremely high impedance and extremely low capacitance. If left unconnected, the electric field from the outside can easily charge it. The small charge acquired in this way is enough to produce a significant effect on the conduction through the transistor and cause unexpected operation of the IC. So unless otherwise specified, unused input pins should be connected to the power supply or ground line. www.rohm.com © 2014 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 42/46 TSZ02201-0313AAF00410-1-2 2015.08.10 Rev.002 BM81110MUW Operational Notes – continued 12. Regarding the Input Pin of the IC This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them isolated. P-N junctions are formed at the intersection of the P layers with the N layers of other elements, creating a parasitic diode or transistor. For example (refer to figure below): When GND > Pin A and GND > Pin B, the P-N junction operates as a parasitic diode. When GND > Pin B, the P-N junction operates as a parasitic transistor. Parasitic diodes inevitably occur in the structure of the IC. The operation of parasitic diodes can result in mutual interference among circuits, operational faults, or physical damage. Therefore, conditions that cause these diodes to operate, such as applying a voltage lower than the GND voltage to an input pin (and thus to the P substrate) should be avoided. Resistor Transistor (NPN) Pin A Pin B C E Pin A N P+ P N N P+ N Pin B B Parasitic Elements N P+ N P N P+ B N C E Parasitic Elements P Substrate P Substrate GND GND Parasitic Elements GND Parasitic Elements GND N Region close-by Figure 49. Example of monolithic IC structure 13. Ceramic Capacitor When using a ceramic capacitor, determine the dielectric constant considering the change of capacitance with temperature and the decrease in nominal capacitance due to DC bias and others. 14. Area of Safe Operation (ASO) Operate the IC such that the output voltage, output current, and power dissipation are all within the Area of Safe Operation (ASO). 15. Thermal Shutdown Circuit(TSD) This IC has a built-in thermal shutdown circuit that prevents heat damage to the IC. Normal operation should always be within the IC’s power dissipation rating. If however the rating is exceeded for a continued period, the junction temperature (Tj) will rise which will activate the TSD circuit that will turn OFF all output pins. When the Tj falls below the TSD threshold, the circuits are automatically restored to normal operation. Note that the TSD circuit operates in a situation that exceeds the absolute maximum ratings and therefore, under no circumstances, should the TSD circuit be used in a set design or for any purpose other than protecting the IC from heat damage. 16. Over Current Protection Circuit (OCP) This IC incorporates an integrated overcurrent protection circuit that is activated when the load is shorted. This protection circuit is effective in preventing damage due to sudden and unexpected incidents. However, the IC should not be used in applications characterized by continuous operation or transitioning of the protection circuit. www.rohm.com © 2014 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 43/46 TSZ02201-0313AAF00410-1-2 2015.08.10 Rev.002 BM81110MUW Ordering Information B M 8 1 1 1 Part Number 0 M U W Package MUW: VQFN40W6060A ZE2 Packaging and forming specification ZE2: Embossed tape and reel Marking Diagram VQFN40W6060A (TOP VIEW) Part Number Marking 8 1 1 1 0 LOT Number 1PIN MARK www.rohm.com © 2014 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 44/46 TSZ02201-0313AAF00410-1-2 2015.08.10 Rev.002 BM81110MUW Physical Dimension Tape and Reel Information Package Name VQFN40W6060A ZE2 www.rohm.com © 2014 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 45/46 TSZ02201-0313AAF00410-1-2 2015.08.10 Rev.002 BM81110MUW Revision History Date Revision Contents 2013.09.11 001 New release 2015.08.10 002 P.1, 22, 23 www.rohm.com © 2014 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 Application circuit and Application circuit components list update 46/46 TSZ02201-0313AAF00410-1-2 2015.08.10 Rev.002 Datasheet Notice Precaution on using ROHM Products 1. Our Products are designed and manufactured for application in ordinary electronic equipments (such as AV equipment, OA equipment, telecommunication equipment, home electronic appliances, amusement equipment, etc.). If you (Note 1) , transport intend to use our Products in devices requiring extremely high reliability (such as medical equipment equipment, traffic equipment, aircraft/spacecraft, nuclear power controllers, fuel controllers, car equipment including car accessories, safety devices, etc.) and whose malfunction or failure may cause loss of human life, bodily injury or serious damage to property (“Specific Applications”), please consult with the ROHM sales representative in advance. Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of any ROHM’s Products for Specific Applications. (Note1) Medical Equipment Classification of the Specific Applications JAPAN USA EU CHINA CLASSⅢ CLASSⅡb CLASSⅢ CLASSⅢ CLASSⅣ CLASSⅢ 2. ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which a failure or malfunction of our Products may cause. The following are examples of safety measures: [a] Installation of protection circuits or other protective devices to improve system safety [b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure 3. Our Products are designed and manufactured for use under standard conditions and not under any special or extraordinary environments or conditions, as exemplified below. Accordingly, ROHM shall not be in any way responsible or liable for any damages, expenses or losses arising from the use of any ROHM’s Products under any special or extraordinary environments or conditions. If you intend to use our Products under any special or extraordinary environments or conditions (as exemplified below), your independent verification and confirmation of product performance, reliability, etc, prior to use, must be necessary: [a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents [b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust [c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2 [d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves [e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items [f] Sealing or coating our Products with resin or other coating materials [g] Use of our Products without cleaning residue of flux (even if you use no-clean type fluxes, cleaning residue of flux is recommended); or Washing our Products by using water or water-soluble cleaning agents for cleaning residue after soldering [h] Use of the Products in places subject to dew condensation 4. The Products are not subject to radiation-proof design. 5. Please verify and confirm characteristics of the final or mounted products in using the Products. 6. In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse. is applied, confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect product performance and reliability. 7. De-rate Power Dissipation (Pd) depending on Ambient temperature (Ta). When used in sealed area, confirm the actual ambient temperature. 8. Confirm that operation temperature is within the specified range described in the product specification. 9. ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in this document. Precaution for Mounting / Circuit board design 1. When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product performance and reliability. 2. In principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method must be used on a through hole mount products. If the flow soldering method is preferred on a surface-mount products, please consult with the ROHM representative in advance. For details, please refer to ROHM Mounting specification Notice-PGA-E © 2015 ROHM Co., Ltd. All rights reserved. Rev.001 Datasheet Precautions Regarding Application Examples and External Circuits 1. If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the characteristics of the Products and external components, including transient characteristics, as well as static characteristics. 2. You agree that application notes, reference designs, and associated data and information contained in this document are presented only as guidance for Products use. Therefore, in case you use such information, you are solely responsible for it and you must exercise your own independent verification and judgment in the use of such information contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of such information. Precaution for Electrostatic This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron, isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control). Precaution for Storage / Transportation 1. Product performance and soldered connections may deteriorate if the Products are stored in the places where: [a] the Products are exposed to sea winds or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2 [b] the temperature or humidity exceeds those recommended by ROHM [c] the Products are exposed to direct sunshine or condensation [d] the Products are exposed to high Electrostatic 2. Even under ROHM recommended storage condition, solderability of products out of recommended storage time period may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is exceeding the recommended storage time period. 3. Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads may occur due to excessive stress applied when dropping of a carton. 4. Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of which storage time is exceeding the recommended storage time period. Precaution for Product Label QR code printed on ROHM Products label is for ROHM’s internal use only. Precaution for Disposition When disposing Products please dispose them properly using an authorized industry waste company. Precaution for Foreign Exchange and Foreign Trade act Since concerned goods might be fallen under listed items of export control prescribed by Foreign exchange and Foreign trade act, please consult with ROHM in case of export. Precaution Regarding Intellectual Property Rights 1. All information and data including but not limited to application example contained in this document is for reference only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any other rights of any third party regarding such information or data. 2. ROHM shall not have any obligations where the claims, actions or demands arising from the combination of the Products with other articles such as components, circuits, systems or external equipment (including software). 3. No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any third parties with respect to the Products or the information contained in this document. Provided, however, that ROHM will not assert its intellectual property rights or other rights against you or your customers to the extent necessary to manufacture or sell products containing the Products, subject to the terms and conditions herein. Other Precaution 1. This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM. 2. The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written consent of ROHM. 3. In no event shall you use in any way whatsoever the Products and the related technical information contained in the Products or this document for any military purposes, including but not limited to, the development of mass-destruction weapons. 4. The proper names of companies or products described in this document are trademarks or registered trademarks of ROHM, its affiliated companies or third parties. Notice-PGA-E © 2015 ROHM Co., Ltd. All rights reserved. Rev.001 Datasheet General Precaution 1. Before you use our Pro ducts, you are requested to care fully read this document and fully understand its contents. ROHM shall n ot be in an y way responsible or liabl e for fa ilure, malfunction or acci dent arising from the use of a ny ROHM’s Products against warning, caution or note contained in this document. 2. All information contained in this docume nt is current as of the issuing date and subj ect to change without any prior notice. Before purchasing or using ROHM’s Products, please confirm the la test information with a ROHM sale s representative. 3. The information contained in this doc ument is provi ded on an “as is” basis and ROHM does not warrant that all information contained in this document is accurate an d/or error-free. ROHM shall not be in an y way responsible or liable for an y damages, expenses or losses incurred b y you or third parties resulting from inaccur acy or errors of or concerning such information. Notice – WE © 2015 ROHM Co., Ltd. All rights reserved. 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