Fairchild FAN5632 Regulated step-down charge pump dc/dc converter Datasheet

FAN5631 / FAN5632
Regulated Step-Down Charge Pump DC/DC Converter
Features
Description
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The FAN5631/FAN5632 is an advanced, thirdgeneration switched capacitor step-down DC/DC
converter utilizing Fairchild's proprietary ScalarPump
technology. This innovative architecture utilizes scalar
switch re-configuration and fractional switching
techniques to produce low output ripple, lower ESR
spikes, and improve efficiency over a wide load range.
90% Peak Efficiency
Low EMI
Low Ripple
Selectable Output Voltage:1.2V/1.5V for FAN5631
Efficiency Optimizer Feature for FAN5632
The FAN5631/FAN5632 produces a fixed regulated
output voltage from an input voltage of 2.2V to 5V.
Input Voltage Range: 2.2V to 5.5V
Output Current: Up to 250mA
To maximize efficiency, the FAN5631/5632 achieves
regulation by skipping pulses. Depending on load
current, the size of the switches are scaled dynamically;
consequently, current spikes and EMI are minimized.
An internal soft-start circuitry prevents excessive current
from the supply. The device is internally protected
against short-circuit and over-temperature conditions.
±5% Output Voltage Accuracy
30µA Operating Current
ICC<1mA in Shutdown Mode
1.5MHz Operating Frequency
Shutdown Isolates Output from Input
The FAN5631 has a dual-output voltage feature. When
VSEL is high, VOUT is 1.5V; and when VSEL is low, VOUT is
1.2V.
Soft-Start Limits Inrush Current
Short-Circuit and Over-Temperature Protection
The FAN5632 has an efficiency optimizer feature that,
when enabled, changes the switch mode configuration
from 2:1 to 1:1 at the lower threshold of VIN. The
efficiency is maintained at its peak level over a wider
range of input voltages. In addition, VOUT varies from
1.2V to 1.5V as a result of this efficiency optimization. If
the efficiency optimizer is not enabled, VOUT is regulated
to 1.5V.
Minimum External Component Count
10-Lead 3x3mm MLP Package
Applications
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Cell Phones
Handheld Computers
Both the FAN5631 and FAN5632 are available in a 10lead 3x3mm MLP package.
Portable Electronic Equipment
Core Supply to Next-Generation Processors
Low-Voltage DC Bus
Digital Cameras
DSP Supplies
Ordering Information
Part Number
Package
Packing Method
FAN5631MPX
10-Lead 3x3mm Molded Leadless Package (MLP)
Tape and Reel
FAN5632MPX
10-Lead 3x3mm Molded Leadless Package (MLP)
Tape and Reel
All packages are lead free per JEDEC: J-STD-020B standard.
© 2006 Fairchild Semiconductor Corporation
FAN5631/FAN5632 Rev. 1.0.2
www.fairchildsemi.com
FAN5631 / FAN5632 — Regulated Step Down Charge Pump DC/DC Converter
October 2007
V SEL
1
10
EN
2
9
ON
OFF
C B+
GND
C B-
NC
3
8
NC
NC
4
7
NC
5
6
C IN
10µF
C OUT
10µF
V IN = 2.7V to 5.5V
V OUT = 1.2V to 1.5V
IOUT_max= 250mA
Figure 1. Typical Application
FAN5631
FAN5632 with
optimization
FAN5631 / FAN5632 — Regulated Step Down Charge Pump DC/DC Converter
Typical Application
Average Efficiency (over VIN=2.7V to 5V) = 66%, with optimization = 77%
Average Efficiency (over VIN=2.7V to 4.2V) = 67%, with optimization = 84%
Figure 2. Typical Efficiency Graph
© 2006 Fairchild Semiconductor Corporation
FAN5631/FAN5632 Rev. 1.0.2
www.fairchildsemi.com
2
Top View
VSEL
1
10
NC
EN
2
9
VIN
CB+
3
8
NC
GND
4
7
NC
CB-
5
6
VOUT
Figure 3. Pin Assignments
Pin Definitions
Pin #
Name
Description
Output Voltage Select Logic Input Pin. The VSEL pin cannot be left floating and must be
connected to either a logic high or logic low level.
1
VSEL
FAN5631: If a logic low is applied to the VSEL pin, VOUT is 1.2V; if a logic high is
applied, VOUT is 1.5V.
FAN5632: If a logic low is applied to the VSEL pin, the efficiency optimization mode is enabled
and the output voltage accuracy is relaxed to meet optimum efficiency. If a logic high is
applied, the device operates like a typical charge pump converter.
2
EN
Enable Input Pin. If a logic high is applied to the EN pin, the device is enabled. If a logic low is
applied, the device is disabled and the supply current is reduced to less than 1µA. The EN pin
cannot be left floating and must be connected to a logic high or logic low level.
3
CB+
Bucket Capacitor Positive Pin.
4
GND
Ground Pin. This pin is connected to the internal MOSFET switches. This pin must be
externally connected to GND.
5
CB-
Bucket Capacitor Negative Pin.
6
VOUT
Output Voltage Pin.
7
NC
Not Connected. This pin is not internally connected.
8
NC
Not Connected. This pin is not internally connected.
9
VIN
Supply Voltage Input.
10
NC
Not Connected. This pin is not internally connected.
© 2006 Fairchild Semiconductor Corporation
FAN5631/FAN5632 Rev. 1.0.2
FAN5631 / FAN5632 — Regulated Step Down Charge Pump DC/DC Converter
Pin Configuration
www.fairchildsemi.com
3
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device
reliability. The absolute maximum ratings are stress ratings only.
Symbol
VCC
ILOAD
Parameter
Min.
Max.
VIN to GND
-0.3
6.0
All other pins to GND
-0.3
VIN + 0.3
Load Current
(1)
Unit
V
0.5
A
8
°C/W
+260
°C
ΘJC
Thermal Resistance Junction-to-Tab
TL
Lead Temperature, Soldering 10 Seconds
TJ
Junction Temperature
-40
+150
°C
TSTG
Storage Temperature
-65
+150
°C
Human Body Model, JESD22-A114
2.5
Charged Device Model, JESD22-C101
0.2
(2)
ESD
kV
Notes:
1. Junction-to-ambient thermal resistance, θJA, is a strong function of PCB material, board thickness, thickness and
number of copper planes, number of via used, diameter of via used, available copper surface, and attached heat
sink characteristics. The estimated value for zero air flow at 0.5W is 60°C/W.
2. Using Mil Std. 883E, method 3015.7 (Human Body Model) and EIA/JESD22C101-A (Charged Device Model).
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to Absolute Maximum Ratings.
Symbol
Parameter
VCC
Supply Voltage Range
IOUT
Output Current (VIN > 2.V)
TA
Min.
2.2
Operating Ambient Temperature Range
© 2006 Fairchild Semiconductor Corporation
FAN5631/FAN5632 Rev. 1.0.2
Typ.
-40
+25
Max.
Unit
5.5
V
250
mA
+85
°C
FAN5631 / FAN5632 — Regulated Step Down Charge Pump DC/DC Converter
Absolute Maximum Ratings
www.fairchildsemi.com
4
VIN = 2.2V to 5.5V, IOUT = 1mA, CIN = 10µF, COUT = 10µF, CB = 1µF, TA = -40°C to +85°C, unless otherwise noted.
Typical values are at TA = 25°C.
Symbol
VUVLO
Parameter
Conditions
Input Under-voltage Lockout
No-load Supply Current
VOUT
Min.
Typ.
2
No Switching
Output Voltage
1.5
FAN5631, SEL to Low
1.2
FAN5632, SEL to High
1.5
FAN5632, SEL to Low
Variable
between
1.5 and 1.2
-5
Units
V
60
FAN5631, SEL to High
1mA ≤ IOUT ≤ 150mA, VIN=2.7V to
5.5V
Output Voltage Accuracy
Max.
µA
V
+5
%
RLOAD
Load Regulation
0mA ≤ IOUT ≤ 150mA, VIN=3.6V
0.25
RLINE
Line Regulation
IOUT=0.1mA
0.2
4.0
mV/V
VEN=0V
0.1
1.0
µA
VOUT ≤ 150mA
25
mA
90
%
VIN Decreasing
2.22xVOUT
V
Oscillator Frequency
1.5
MHz
TSD
Thermal Shutdown Threshold
150
°C
TSDHYS
Thermal Shutdown Threshold
Hysteresis
15
°C
ISD
ISC
Shutdown Supply Current
Output Short-circuit Current
(3)
Peak Efficiency
VIN at Configuration Change
FOSC
VIH
Enable Logic Input High
Voltage
VIL
Enable Logic Input Low
Voltage
IEN
Enable Logic Input Current
-1
VIH
VSEL Logic Input High Voltage
1.3
VIL
VSEL Logic Input Low Voltage
IIN
VSEL Logic Input Current
tON
VOUT Turn-On Time
mV/mA
1.3
V
0.4
V
1
µA
V
-1
1.6
0.4
V
1
µA
FAN5631 / FAN5632 — Regulated Step Down Charge Pump DC/DC Converter
Electrical Characteristic
ms
Note:
3. The short-circuit protection is designed to protect against pre-existing short-circuit conditions, such as assembly
shorts, that exist prior to device power-up. The short-circuit current limit is 25mAAverage. Short-circuit currents in
normal operation are inherently limited by the on resistance of the internal FET. Since this resistance is in the
range of 1Ω, in some cases, thermal shutdown may occur. Immediately following the first thermal shutdown
event, the short-circuit condition is treated as pre-existing and the load current reduces to 25mAAverage.
© 2006 Fairchild Semiconductor Corporation
FAN5631/FAN5632 Rev. 1.0.2
www.fairchildsemi.com
5
TA = 25°C, VOUT = 1.5V, VIN = 3.6V, CIN = 10µF, COUT = 10µF, CB = 1µF, unless otherwise noted.
90
V SE L = HIGH
85
V OU T = 1.5V
I LOAD = 150m A
Power Efficiency (%)
Efficiency (%)
90
85
80
75
70
65
60
55
50
45
40
35
30
VIN = 3.3V
80
VSEL = HIGH
75
70
VIN = 4.2V
65
60
55
VIN = 2.7V
50
45
2
2.5
3
3.5
4
4.5
5
40
5.5
1
10
Load Current (mA)
Input Voltage (V)
Figure 4. Efficiency vs. Input Voltage
100
Figure 5. Efficiency vs. Load Current
1.60
ILOAD = 100mA, VSEL = LOW
ILoad = 50mA
Outpu t Voltage (V)
90
80
70
60
1.5
50
1.4
1.3
1.2
2.5
3
3.5
4
4.5
5
Outpu t Voltage (V)
Efficiency (%)
100
1.55
TA = 25 °C
1.50
TA = 85 °C
TA = -40 °C
1.45
1.40
5.5
2.5
3.0
3.5
4.0
4.5
5.0
5.5
Input Voltage (V)
Input Voltage(V)
Figure 6. FAN5632 Efficiency Optimizer
Efficiency and Output Voltage vs. Input Voltage
Figure 7. Line Regulation
0
1.54
VIN = 3.6V
ILOAD = 1mA
5.5V
3.2V
2.7V
Ou tpu t Voltag e (V)
Load Regulation (mV/mA)
0.5
3.6V
-0.5
2.2V
-1
-1.5
-2
FAN5631 / FAN5632 — Regulated Step Down Charge Pump DC/DC Converter
Typical Performance Characteristics
0
20
40
60
80
100
120
140
160
1.52
1.51
1.50
-50
180
Load Current (mA)
-25
0
25
50
75
100
125
150
Ambient Temperature (°C)
Figure 8. Load Regulation
© 2006 Fairchild Semiconductor Corporation
FAN5631/FAN5632 Rev. 1.0.2
1.53
Figure 9. Thermal Regulation
www.fairchildsemi.com
6
TA = 25°C, VOUT = 1.5V, VIN = 3.6V, CIN = 10µF, COUT = 10µF, CB = 1µF, unless otherwise noted.
ILOAD = 150mA
High
VEN
VSEL
Low
Low
VOUT
1.5V
VOUT
75mA
1.2V
1.2V
IIN
0mA
(20µs/div)
Figure 10.
Start-Up
Figure 11.
Dynamic VOUT Change (FAN5631)
Voltage Ripple
Figure 13.
Output Voltage Ripple Spectrum
VIN = 3.6V
ILOAD = 150mA
VOUT
VIN
Figure 12.
© 2006 Fairchild Semiconductor Corporation
FAN5631/FAN5632 Rev. 1.0.2
FAN5631 / FAN5632 — Regulated Step Down Charge Pump DC/DC Converter
Typical Performance Characteristics (Continued)
www.fairchildsemi.com
7
V IN
0.25SW1
0.25SW1 0.5SW1
OSCILLATOR
(2MHz)
IN
VOLTAGE
REF.
SOFT START
Vref RAMP
OUT
Vref RAMP
FB
FB
OUTPUT
150mV
0.5* INPUT
1V
C+
- CONFIGURATION
0.25SW2 0.25SW2 0.5SW2
+
-
CONTROL
LOGIC
+
-
D
R
I
V
E
R
S
PULSE_SKIP
SHORT_CKT.
0.25SW3
0.25SW3 0.5SW3
0.25SW4
0.25SW4 0.5SW4
C-
+
-
VOUT
UVLO
SHUTDOWN
+
THERMAL
SHUTDOWN
FB
GND.
ENABLE
Figure 14.
Block Diagram
Detailed Description
The FAN5631 / FAN5632 switched capacitor DC/DC
converter automatically configures switches to achieve
high efficiency and provides a regulated output voltage
by means of pulse skipping, pulse frequency
modulation (PFM). An internal soft-start circuit prevents
excessive inrush current from the supply. Each switch is
split into three segments. Based on the values of VIN,
VOUT, and IOUT; an internal circuit determines the
number of segments used to reduce current spikes.
Pulse-skipping PFM and Fractional Switch
Operation
When the regulated output voltage reaches its upper
limit, the switches are turned off and the output voltage
reaches its lower limit. In a step-down 2:1 mode of
operation, with 1.6V output as an example; when the
output reaches about 1.62V (upper limit), the control
logic turns off all switches: switching stops completely.
This is pulse-skipping mode. Since the supply is
isolated from the output, the output voltage drops. Once
the output is dropped to about 1.58V (lower limit), the
device returns to regular switching mode with one
quarter of each switch turning on first. Another quarter
of each switch is turned on if VOUT cannot reach
regulation by the third charge cycle. Full switch
operation occurs only during star-up or under heavyload condition, when half switch operation cannot
achieve regulation within seven charge cycles.
Step-Down Charge Pump Operation
When VIN ≥ 2 × VOUT/9, the 2:1 configuration shown in
Figure 15 is enabled. The factor 0.9 is used instead of 1
to account for the effect of resistive losses across the
switches and to accommodate hysteresis in the voltage
detector comparator. Two-phase, non-overlapping clock
signals are generated to drive four switches. When
switches 1 and 3 are on, switches 2 and 4 are off and
CB is charged. When switches 2 and 4 are on, 1 and 3
are off and charge is transferred from CB to COUT.
Soft-Start
When VIN ≥ 2 × VOUT/9, the 1:1 configuration shown in
Figure 16 is enabled. In the 1:1 configuration, switch 3
is always off and the switch 4 is always on. At 1.6V
output setting, the configuration changes from 2:1 to 1:1
at VIN=3.56V. At 1.3V output setting, the change occurs
at VIN=3.06V.
© 2006 Fairchild Semiconductor Corporation
FAN5631/FAN5632 Rev. 1.0.2
FAN5631 / FAN5632 — Regulated Step Down Charge Pump DC/DC Converter
Block Diagram
The soft-start feature limits inrush current when the
device is initially powered up and enabled. The
reference voltage is used to control the rate of the
output voltage ramp-up to its final value. Typical start-up
time is 1ms. Since the rate of the output voltage rampup is controlled by an internally generated slow ramp,
pulse-skipping occurs and inrush current is
automatically limited.
www.fairchildsemi.com
8
VIN
VIN
S1
S1
C+
C+
S2
S2
C
B
VOUT
VOUT
C
B
S3
S3
C-
CC
C
OUT
OUT
S4
S4
GND
GND
1:1 configuration
Switch 3 is always off
Switch 4 is always on
Switches 1 and 2 are in phase 1
Reverse position of switches 1&2 for phase 2
2:1 configuration
Switches in charging phase
Reverse all switches for pumping phase
Figure 15.
2:1 Configuration
Figure 16.
Shutdown, UVLO, Short-Circuit,
Current-Limit and Thermal Shutdown
1:1 Configuration
Efficiency Optimizer (FAN5632)
The device has an active-low shutdown pin to decrease
supply current to less than 1μA. In shutdown mode, the
supply is disconnected from the output. UVLO triggers
when supply voltage drops below 2V. When the output
voltage is lower than 150mV, a short-circuit protection is
triggered. In this mode, 15 out of 16 pulses during the
switching are skipped and the supply current is limited.
Thermal shutdown triggers at 150ºC.
© 2006 Fairchild Semiconductor Corporation
FAN5631/FAN5632 Rev. 1.0.2
FAN5631 / FAN5632 — Regulated Step Down Charge Pump DC/DC Converter
Switch Configuration
In the FAN5632, VSEL can be tied to ground to enable
the efficiency optimizer feature. To achieve an
optimized efficiency, the switch mode configuration
transition point is shifted from a 2:1 to a 1:1 mode until
the output voltage falls to 20% of its nominal value. For
example, when the nominal output voltage is 1.5V, the
output voltage is allowed to drop to 1.2V. This maintains
a peak efficiency of 85% for the input voltage range of
2.9V to 3.5V. For normal operation, tie VSEL high.
www.fairchildsemi.com
9
bucket capacitor and therefore input and output ripple
currents are also reduced. Nevertheless, due to the
ESR of the input and output bypass capacitors, these
current spikes generate voltage spikes at the input and
output pins. These ESR spikes can be filtered because
their frequencies lie at up to 12 times the clock
frequencies. In applications where conductive and
radiated EMI/RFI interference must be low as possible,
consider additional input and output filtering.
The FAN5631/FAN5632 requires one ceramic bucket
capacitor in the 0.1µF to 1µF range, one 10µF output
bypass capacitor, and one 10µF input bypass capacitor.
To obtain optimum output ripple and noise
performance, low-ESR (<0.05Ω) ceramic input and
output bypass capacitors are recommended. X5R- and
X7R-rated capacitors provide adequate performance
over the -40°C to 85°C temperature range.
The bucket capacitor’s value is dependent on load
current requirements. A 1µF bucket capacitor works
well in all applications at all load currents, while a 0.1µF
capacitor supports most applications under 100mA of
load current. The choice of bucket capacitor values
should be verified in the actual application at the lowest
input voltage and highest load current. A 30% margin of
safety is recommended to account for the tolerance of
the bucket capacitor and the variations in the onresistance of the internal switches.
Layout Considerations
While evaluating any switched capacitor DC-DC
converter, be careful to keep the power supply source
impedance low; use of long wires causing high lead
inductances and resistive losses should be avoided. A
carefully laid-out ground plane is essential because
current spikes are generated as the bucket capacitor is
charged and discharged. The input and output bypass
capacitors should be placed as close to the device pins
as possible.
One of the key benefits of the ScalarPump architecture
is that the dynamically scaled on resistance of the
switches effectively reduces the peak current in the
© 2006 Fairchild Semiconductor Corporation
FAN5631/FAN5632 Rev. 1.0.2
FAN5631 / FAN5632 — Regulated Step Down Charge Pump DC/DC Converter
Applications Information
www.fairchildsemi.com
10
3.0
0.15 C
2X
6
10
A
2.25
2.20
2.00
1.55
2.00
3.10
2.33
0.78
0.55
B
3.0
0.23
0.15 C
0.02
2X
D
TOP VIEW
1
0.25
5
RECOMMENDED LAND PATTERN
0.8 MAX
0.10 C
(0.20)
0.08 C
0.50
0.05
0.00
C
SIDE VIEW
SEATING
PLANE
(3.00±0.10)
2.25±0.05
PIN #1 IDENT
(0.38)
1
5
(3.00±0.10)
1.55±0.05
0.40±0.05
10
0.30
0.20
0.5
6
0.10
0.05
2.0
FAN5631 / FAN5632 — Regulated Step Down Charge Pump DC/DC Converter
Physical Dimensions
C A B
C
BOTTOM VIEW
A. CONFORMS TO JEDEC REGISTRATION MO-229,
VARIATION WEED-5
B. DIMENSIONSARE IN MILLIMETERS.
C. DIMENSIONSAND TOLERANCESPER
ASME Y14.5M, 1994
D. LAND PATTERN DIMENSIONSARE NOMINAL
REFERENCEVALUES ONLY
MLP10BrevA
Figure 17.
© 2006 Fairchild Semiconductor Corporation
FAN5631/FAN5632 Rev. 1.0.2
10-lead, Molded Leadless Package (MLP)
www.fairchildsemi.com
11
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when properly used in accordance with instructions for use
provided in the labeling, can be reasonably expected to
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2. A critical component in any component of a life support,
device, or system whose failure to perform can be
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FAN5631 / FAN5632 — Regulated Step Down Charge Pump DC/DC Converter
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PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or In Design
This datasheet contains the design specifications for product
development. Specifications may change in any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data; supplementary data will be
published at a later date. Fairchild Semiconductor reserves the right to
make changes at any time without notice to improve design.
No Identification Needed
Full Production
This datasheet contains final specifications. Fairchild Semiconductor
reserves the right to make changes at any time without notice to improve
design.
Obsolete
Not In Production
This datasheet contains specifications on a product that has been
discontinued by Fairchild Semiconductor. The datasheet is printed for
reference information only.
Rev. I31
© 2006 Fairchild Semiconductor Corporation
FAN5631/FAN5632 Rev. 1.0.2
www.fairchildsemi.com
12
FAN5631 / FAN5632 — Regulated Step Down Charge Pump DC/DC Converter
© 2006 Fairchild Semiconductor Corporation
FAN5631/FAN5632 Rev. 1.0.2
www.fairchildsemi.com
13
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