Crystek CCLD-034M-20-311.040 5x7mm smd lvds clock oscillator 3.3 volt Datasheet

CCLD-034 5x7mm SMD
LVDS Clock Oscillator
3.3 Volts
Model CCLD-034 is a 162.000Mhz to 312.500MHz LVDS
Clock Oscillator operating at 3.3Volts. The oscillator utlizes
a High Q Third Overtone crystal design providing very low
Jitter and Phase Noise. No Sub-Harmonics are present in
the Output Signal.
5x7mm SMD
Applications:
Digital Video
SONET/SDH/DWDM
Storage Area Networks
Broadband Access
Ethernet, Gigabit Ethernet
Rev.: E
Date: 10-10-07
CCLD-034 5x7mm SMD
LVDS Clock Oscillator
Frequency Range:
162.000Mhz to 312.500Mhz
Temperature Range: (standard)
(Option M)
(Option X)
0°C to +70°C
-20°C to +70°C
-40°C to +85°C
Storage:
Input Voltage:
Input Current:
-55°C to 120°C
3.3V ± 0.3V
45mA Typ., 66mA Max
Output:
Symmetry:
Rise/Fall Time:
Differential LVDS
45/55% Max @ 50%Vdd
1nsec Max @ 20% to 80% Vdd
Frequency Stability Options(ppm):
±20, ±25, ±50, ±100
Load: 100 Ohms
Connected between OUT and COUT
Logic:
Output Voltage Levels “0”=0.90 Min., 1.10 Typ.
“1”=1.43 Typ., 1.60 Max
Differential Output Voltage:
247mV Min., 454mV Max
Disable Time
200nSec Max
Enable Time
2mSec Max
Phase Jitter:
12KHz~80MHz
0.5psec Typ., 1psec RMS Max
Phase Noise:
(See Plot Below)
Sub-harmonics:
None
Aging:
<3ppm 1st/yr, <1ppm every year thereafter
Actual CCLD-034-50-250.000MHz Plot
Rev.: E
Date: 10-10-07
CCLD-034 5x7mm SMD
LVDS Clock Oscillator
PART NUMBER GUIDE
CCLD - 034 X - 50 - 311.040
#1
#2 #3
#4
#5
#1 Crystek LVDS Osc.
#2 Model 034
#3 Temp. Range (Blank=0/70°C)(M=-20/70°C)(X=-40/85°C)
#4 Stability: (see Table 1)
#5 Frequency in MHz: 3 or 6 decimal places
Stability Indicator
Blank(std)
±100ppm
50
±50ppm
25
±25ppm
20
±20ppm
Example:
CCLD-034X-50-311.040
3.3V, -40/85°C, ±50ppm, 311.0400 MHz
Shock:
Solderability:
Vibration:
Solvent Resistance:
Resistance to Soldering Heat:
Table 1
RECOMMENDED REFLOW SOLDERING PROFILE
MIL-STD-883, Method 2002, Condition B
MIL-STD-883, Method 2003
MIL-STD-883, Method 2007, Condition A
MIL-STD-202, Method 215
MIL-STD-202, Method 210, Condition I or J
260°C
Ramp-Up
3°C/Sec Max.
Critical
Temperature Zone
Ramp-Down
6°C/Sec.
217°C
200°C
150°C
Environmental:
Preheat
180 Secs. Max.
8 Minutes Max.
Thermal Shock: MIL-STD-883, Method 1011, Condition A
Moisture Resistance: MIL-STD-883, Method 1004
90 Secs. Max.
260°C for
10 Secs. Max.
NOTE: Reflow Profile with 240°C peak also acceptable.
0.274 ±0.007
(6.96 ±0.18)
Tri-State Function
Part Number
Frequency
DC Lot Code
0.193 ±0.007
(4.90 ±0.18)
0.045 ±0.008
(1.14 ±0.20)
SUGGESTED PAD LAYOUT
Denotes pad 1
#1
#2
#3
#6
#5
#4
6
5
4
0.154
(3.91)
0.071
(1.80)
1
2
3
0.100
(2.54)
0.200
(5.08)
Output
State
Open or N/C
Active
“0”level 0.3*Vcc Max
High Z
Pad
0.01µF
0.045 ±0.008
(1.14 ±0.20)
Pin #1
State
“1” level 0.7*Vcc Min
0.050
(1.27)
via to
ground
0.055 Typ
(1.40 Typ)
0.100
(2.54)
0.200
(5.08)
(±50ppm, 0/70°C)
200.000MHz
212.500MHz
250.000MHz
311.040MHz
312.500MHz
TEMPERATURE
Mechanical:
Standard Values
1
Active
Connection
Enable/Disable
2
N/C
3
GND
4
Out
5
Comp. Out
6
VCC
Rev.: E
Date: 10-10-07
Similar pages