Product Folder Sample & Buy Support & Community Tools & Software Technical Documents DRV10970 SLVSCU7A – FEBRUARY 2016 – REVISED MARCH 2016 DRV10970 Three-Phase Brushless DC Motor Driver 1 Features 3 Description • • The DRV10970 is an integrated three-phase BLDC motor driver for home appliance, cooling fans, and other general-purpose motor control applications. The embedded intelligence, small form factor, and simple pinout structure reduce the design complexity, board space, and system cost. The integrated protections improve the system robustness and reliability. 1 • • • • • • • • • • • • Wide Power Supply Voltage Range: 5 to 18 V Integrated FETs: 1-A RMS, 1.5-A Peak Output Phase/Winding Current Total Driver H + L RDSON: 400 mΩ Embedded 180° Sine-Wave and Trapezoidal Commutations Ultra-Low Power Consumption in Sleep Mode (35 µA) Adaptive Drive Angle Adjustment Three or Single Hall Sensor Option to Minimize System Cost Motor Spin Direction Control Configurable for 30° Hall Placement or 0° Hall Placement Adjustable Retry Timing after Motor Lock Programmable Current-Limit Function Tachometer – Motor Speed Information on OpenDrain FG Pin Motor Lock Report on Open-Drain RD Pin Protection Features – Supply (VM) Undervoltage Lockout – Cycle-by-Cycle Current Limit – Overcurrent Protection (OCP) – Thermal Shutdown – Motor Lock Detect and Report The output stage of DRV10970 consists of three halfbridges with RDSON of 400 mΩ (H + L). Each halfbridge is capable of driving up to 1-A RMS and 1.5-A peak output current. When the device enters sleep mode, it consumes typical 35 µA of current. The advanced 180° sine-wave commutation algorithm is embedded into the device and achieves high efficiency, low torque ripple, and superior acoustic performance. The adaptive driving angle adjustment function achieves the most optimized efficiency regardless of the motor parameters and load conditions. The DRV10970 is designed for either differential or single-ended Hall sensor based applications. The differential Hall signal inputs are detected by the integrated comparators. The device supports three Hall and single Hall based applications; the single Hall sensor mode reduces the system cost by eliminating two Hall sensors. Device Information(1) PART NUMBER PACKAGE DRV10970 2 Applications • • • Cooling Fans Small Appliances General-Purpose BLDC Motor Driver BODY SIZE (NOM) TSSOP (24) 7.80 mm × 6.40 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. Application Circuit VCC VCC RFG R RD C SW CPP CPN VCP FG RD U C VCP VM V C VM M VINT C VINT GND GND/VINT W R HALL BRKMOD GND/VINT/FLOATING DAA GND/VINT/FLOATING CMTMOD GND/VINT FR RETRY CRETRY VINT/VCC U_HP U_HN V_HP U_HALL V_HALL V_HN PWM CS W_HN W_HALL W_HP R CS 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. DRV10970 SLVSCU7A – FEBRUARY 2016 – REVISED MARCH 2016 www.ti.com Table of Contents 1 2 3 4 5 6 7 8 Features .................................................................. Applications ........................................................... Description ............................................................. Revision History..................................................... Description (continued)......................................... Pin Configuration and Functions ......................... Specifications......................................................... 1 1 1 2 3 3 5 7.1 7.2 7.3 7.4 7.5 7.6 5 5 5 6 6 9 Absolute Maximum Ratings ...................................... ESD Ratings.............................................................. Recommended Operating Conditions....................... Thermal Information .................................................. Electrical Characteristics........................................... Typical Characteristics .............................................. Detailed Description ............................................ 11 8.1 Overview ................................................................. 11 8.2 Functional Block Diagram ....................................... 12 8.3 Feature Description................................................. 13 8.4 Device Functional Modes........................................ 16 9 Application and Implementation ........................ 21 9.1 Application Information............................................ 21 9.2 Typical Application ................................................. 28 10 Power Supply Recommendations ..................... 30 11 Layout................................................................... 30 11.1 Layout Guidelines ................................................. 30 11.2 Layout Example .................................................... 30 12 Device and Documentation Support ................. 31 12.1 12.2 12.3 12.4 Community Resources.......................................... Trademarks ........................................................... Electrostatic Discharge Caution ............................ Glossary ................................................................ 31 31 31 31 13 Mechanical, Packaging, and Orderable Information ........................................................... 32 4 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Original (February 2016) to Revision A • 2 Page Changed device status to Production Data and released full datasheet................................................................................ 1 Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated Product Folder Links: DRV10970 DRV10970 www.ti.com SLVSCU7A – FEBRUARY 2016 – REVISED MARCH 2016 5 Description (continued) The device implements a standard control interface which includes PWM input (speed command), FG output (speed feedback), FR input (forward and reverse direction control), and RD output (motor lock indicator). The DRV10970 device supports both 30° and 0° Hall placements (with respect to the corresponding phase BEMF). The device implements trapezoidal drive mode to address higher power requirement. The DRV10970 device determines the rotor lock condition based on the absence of Hall input switching. The device will try again to spin the motor after an adjustable auto-retry time which can be configured by a capacitor connected to the RETRY pin. The device incorporates multiple protection features: overcurrent, undervoltage, overtemperature, and locked rotor conditions to improve the system robustness. The DRV10970 is packaged in a thermally-enhanced 24-pin TSSOP package (eco-friendly: RoHS and no Sb/Br). 6 Pin Configuration and Functions PWP Package 24-Pin TSSOP with PowerPAD™ Top View 1 DAA FG 24 2 U_HP FR 23 3 U_HN RETRY 22 4 V_HP BRKMOD 21 5 V_HN CMTMOD 20 6 W_HP PWM 19 RD 18 PowerPAD 7 W_HN 8 VCP CS 17 9 CPP VINT 16 10 CPN VM 15 11 W U 14 12 GND V 13 Pin Functions PIN NAME NO. TYPE DESCRIPTION POWER AND GROUND CPN 10 — CPP 9 — GND 12 PWR VCP 8 — VINT 16 VM 15 Charge pump switching node Connect a 0.1-µF X7R capacitor rated for VM between CPN and CPP Device ground Must be connected to board ground Charge pump output Connect a 16-V, 1-µF ceramic capacitor to VM PWR Integrated regulator output Integrated regulator (typical voltage 5 V) mainly for internal circuits; Provide external power for less than 20 mA. Bypass to GND with a 10-V, 2.2-µF ceramic capacitor PWR Power supply Connect to motor supply voltage; bypass to GND with a 10-µF ceramic capacitor rated for VM Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated Product Folder Links: DRV10970 3 DRV10970 SLVSCU7A – FEBRUARY 2016 – REVISED MARCH 2016 www.ti.com Pin Functions (continued) PIN NAME NO. TYPE DESCRIPTION CONTROL CS 17 — Current limit setting pin Connect a resistor to adjust the current limit. DAA 1 I Drive angle adjustment configuration pin Low: 10° drive angle adjustment High: 5° drive angle adjustment Floating: adaptive drive angle adjustment FG 24 O Frequency indication pin Open drain Electrical Frequency Output pin. One toggle per electrical cycle. Requires an external pull-up of 3.3-kΩ. FR 23 I Motor direction control Direction Control Input. When low, phase driving sequence is U → V → W ( U phase is leading V phase by 120°). When high, the phase driving sequence is U → W → V. BRKMOD 21 I Brake mode setting Low: Coasting mode (phases are tri-stated) High: Brake mode (phases are driven low) PWM 19 I Variable duty cycle PWM input for speed control Connect to PWM signal. RD 18 O Lock indication pin Pulled logic low with lock condition; open-drain output requires an external pull-up of 3.3-kΩ RETRY 22 I Auto retry timing configure Timing adjustable by capacitor CMTMOD 20 I Commutation mode setting Low: Sinusoidal operation mode with 0° Hall placement High: Sinusoidal operation mode with 30° Hall placement Floating: Trapezoidal operation mode with 30° Hall placement U-phase negative Hall input Differential Hall Sensor negative input for U-phase. Connect to hall sensor negative output. When logic level hall IC is used, tie this pin to VINT/2 level. In single Hall mode, the device uses U-phase hall inputs to drive the motor. U-phase positive Hall input Differential Hall Sensor positive input for U-phase. Connect to hall sensor positive output. When logic level hall IC is used, connect this to hall IC output. In single Hall mode, the device uses U-phase hall inputs to drive the motor. V-phase negative Hall input Differential Hall Sensor negative input for V-phase. Connect to hall sensor negative output. When logic level hall sensor is used, tie this pin to VINT/2 level. In single hall mode, ground this pin. U_HN 3 U_HP I 2 V_HN I 5 I V_HP 4 I V-phase positive Hall input Differential Hall Sensor positive input for V-phase. Connect to hall sensor positive output. When logic level hall IC is used, connect this to hall IC output. Leave this pin floating to enable single Hall operation. W_HN 7 I W-phase negative Hall input Differential Hall Sensor negative input for W-phase. Connect to hall sensor negative output. When logic level hall sensor is used, tie this pin to VINT/2 level. In single hall mode, ground this pin. W_HP 6 I W-phase positive Hall input Differential Hall Sensor positive input for W-phase. Connect to hall sensor positive output. When logic level hall IC is used, connect this to hall IC output. In single hall mode, ground this pin. U 14 O U phase output Connect to motor terminal U V 13 O V phase output Connect to motor terminal V W 11 O W phase output Connect to motor terminal W OUTPUT STAGE External Components COMPONENT PIN 1 PIN 2 RECOMMENDED CVM VM GND 10-µF ceramic capacitor rated for VM (if VM = 12 V, 25-V capacitor is suggested, if VM = 18 V, 35-V capacitor is suggested) CVCP VCP VM 16-V, 1-µF ceramic capacitor CSW CPP CPN 0.1-µF X7R capacitor rated for VM 4 Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated Product Folder Links: DRV10970 DRV10970 www.ti.com SLVSCU7A – FEBRUARY 2016 – REVISED MARCH 2016 External Components (continued) COMPONENT PIN 1 PIN 2 RECOMMENDED CVINT VINT GND 10-V, 2.2-µF ceramic capacitor Rotor Lock Detection and Retry CRETRY RETRY GND See Equation 2 for capacitor value RCS CS GND See Current Limit and OCP for resistor value RRD VCC (1) RD >1 kΩ, RD is open-drain output. This component must be pulled up externally. RFG (1) FG >1 kΩ, FG is open-drain output. This component must be pulled up externally. (1) VCC VCC is not a pin on the DRV10970. It can be VINT or any other system voltage (for example the 3.3-V or 5-V supply voltage powering the microcontroller). A VCC supply voltage pull-up is required for open-drain outputs RD and FG 7 Specifications 7.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted) (1) (2) Power supply voltage (VM) MIN MAX –0.3 20 V 2 V/µs Power supply voltage ramp rate (VM) UNIT Charge pump voltage (VCP, CPP) –0.3 25 V Charge pump negative switching pin (CPN) –0.3 20 V Internal logic regulator voltage (VINT) –0.3 5.5 V Control pin voltage (PWM, FR, RETRY, CMTMOD, BRKMOD, DAA) –0.3 VINT + 0.3 V Open drain output current (RD, FG) 0 10 mA Open drain output voltage (RD, FG) –0.3 20 V Output voltage (U,V,W) –1 20 V Output current (U,V,W) 0 2 A Hall input voltage (U_HP, U_HN, V_HP, V_HN, W_HP, W_HN) 0 6 V Current limit adjust pin voltage (CS) –0.3 3.6 V Operating junction temperature, TJMAX –40 150 °C Storage temperature, Tstg –65 150 °C (1) (2) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. Referenced with respect to GND. 7.2 ESD Ratings VALUE V(ESD) (1) (2) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1) ±2000 Charged-device model (CDM), per JEDEC specification JESD22-C101 (2) ±500 UNIT V JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. 7.3 Recommended Operating Conditions over operating free-air temperature range (unless otherwise noted) IOUT MIN MAX Power supply voltage VM 5 18 V Logic level input voltage PWM, FR, CMTMOD, BRKMOD, DAA, RETRY 0 VINT V Open drain output pullup voltage FG, RD 0 18 V Hall input U_HP, U_HN, V_HP, V_HN, W_HP, W_HN 0 5 V 0 1.5 A Output current UNIT Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated Product Folder Links: DRV10970 5 DRV10970 SLVSCU7A – FEBRUARY 2016 – REVISED MARCH 2016 www.ti.com Recommended Operating Conditions (continued) over operating free-air temperature range (unless otherwise noted) MIN ƒPWM Applied PWM signal IVINT VINT external load current TJOPR Operating junction temperature (1) MAX UNIT 15 100 kHz 20 (1) mA 125 °C –40 VINT is mainly for internal use. For external, it is only suggested to provide bias current for hall circuit. 7.4 Thermal Information DRV10970 THERMAL METRIC (1) PWP (TSSOP) UNIT 24 PINS RθJA Junction-to-ambient thermal resistance 36.1 °C/W RθJC(top) Junction-to-case (top) thermal resistance 17.4 °C/W RθJB Junction-to-board thermal resistance 14.8 °C/W ψJT Junction-to-top characterization parameter 0.4 °C/W ψJB Junction-to-board characterization parameter 14.5 °C/W RθJC(bot) Junction-to-case (bottom) thermal resistance 1.1 °C/W (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953. 7.5 Electrical Characteristics TA = 25°C, over recommended operating conditions unless otherwise noted. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT POWER SUPPLIES (VM, VINT) VM VM operating voltage IVM VM operating supply current VM = 12 V, no external load on VINT IVM_SLEEP VM supply current during sleep mode VM = 5 and 12 V VINT Integrated regulator voltage VGND-BGND Ground potential difference between GND pin to PCB ground 5 18 V 3 5 mA 35 50 µA VM = 12 V, 0-mA external load 4.5 5 5.5 V VM = 12 V, 20-mA external load 4.5 5 5.5 V VM = 5 V, 0-mA external load 4.5 4.8 5 V VM = 5 V, 20-mA external load 4.5 4.8 5 V 300 mV CHARGE PUMP (VCP, CPP, CPN) VCP VCP operating voltage VM = 5 V, less than 1-mA load 9 10 11 V VM = 12 V, less than 1-mA load 16 18 19.5 V VM = 18 V, less than 1-mA load 22 24 25.5 V 0 0.8 V 5.3 CONTROL INPUTS (PWM) VIL-PWM PWM Input logic low voltage VM = 5 V and VM = 12 V VIH-PWM PWM Input logic high voltage VM = 5 V and VM = 12 V 2.4 VHYS-PWM PWM Input logic hysteresis VM = 5 V and VM = 12 V 400 RPU-PWM Internal pullup resistance VM = 5 V and VM = 12 V 70 100 120 kΩ RPU-PWM-SL Internal pullup resistance in sleep mode VM = 5 V and VM = 12 V, sleep mode 1 2 2.5 MΩ VM = 5 V and 12 V 9 10 11 µA V mV CONTROL INPUTS (RETRY) IRETRY-SINK 6 Retry timing set sinking current Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated Product Folder Links: DRV10970 DRV10970 www.ti.com SLVSCU7A – FEBRUARY 2016 – REVISED MARCH 2016 Electrical Characteristics (continued) TA = 25°C, over recommended operating conditions unless otherwise noted. PARAMETER IRETRY- TEST CONDITIONS MIN TYP MAX UNIT Retry timing set sourcing current VM = 5 V and 12 V 9 10 11 µA VRETRY_H Retry comparator high threshold VM = 5 V and 12 V 1.1 1.2 1.3 V VRETRY_L Retry comparator low threshold VM = 5 V and 12 V 0.55 0.6 0.65 V SOURCE CONTROL INPUTS (FR, DAA, CMTMOD, BRKMOD) VIL Digital input logic low voltage VM = 5 V and 12 V 0 0.8 V VIH Digital input logic high voltage VM = 5 V and 12 V 2.2 5.3 V VIFLOATING Digital input floating voltage VM = 5 V and 12 V 24% × VINT 36% × VINT V RPD-FR FR pin Internal pulldown resistance VM = 5 V and 12 V 160 200 240 kΩ RPD-BRKMOD BRKMOD pin Internal pulldown resistance VM = 5 V and 12 V 160 200 240 kΩ 3.5 CONTROL OUTPUTS (RD, FG) IOSINK OD output pin sink current VO = 0.3 V IOSHORT OD output pin short current limit VO = 12 V mA 10 25 mA HALL INPUT COMPARATOR VHR Hall input rising Zero to positive peak including offset. TA = –40°C, 25°C, 125°C 0 5 10 mV VHF Hall input falling Zero to negative peak including offset TA = –40°C, 25°C, 125°C –10 –5 0 mV VHALL_HYS Hall input hysteresis VHP-VHN TA = –40°C, 25°C, 125°C 5 12 mV Vcom Common mode voltage VM = 5.5 V – 18 V 0.3 4.3 V VM = 5 V – 5.5 V 0.3 3.8 V Finput Input frequency range 0 1000 Hz UVLO VUVLO-VM-THR UVLO threshold voltage on VM, rising 3.8 4 4.5 V VUVLO-VM-THF UVLO threshold voltage on VM, falling 3.6 3.8 4.25 V VUVLO-VM-HYS VM UVLO comparator hysteresis 40 200 mV VUVLO-VINT- VINT UVLO rise threshold 4.1 4.2 4.5 V VINT UVLO fall threshold 3.8 4 4.2 V VINT UVLO comparator hysteresis 100 300 mV 0.4 0.6 Ω 1.3 1.5 1.7 A V THR VUVLO-VINTTHF VUVLO-VINTHYS INTEGRATED MOSFET RDSON Series resistance (H + L) VM = 12 V, VCP = 19 V, IOUT = 1.5 A CURRENT LIMIT AND OVER CURRENT PROTECTION (OCP) ILIM Current limit threshold VM = 12 V, Rcs = 20 kΩ VILIM_THR Current limit circuit comparator threshold VM = 12 V 1.15 1.2 1.25 ACL Current limit attenuation factor VM = 12 V 22000 25000 28000 Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated Product Folder Links: DRV10970 A/A 7 DRV10970 SLVSCU7A – FEBRUARY 2016 – REVISED MARCH 2016 www.ti.com Electrical Characteristics (continued) TA = 25°C, over recommended operating conditions unless otherwise noted. PARAMETER TEST CONDITIONS Over current protection threshold. Magnitude of phase current at which driver stage VM = 5 V and 12 V is disabled to protect the device. IOCP MIN TYP 3 MAX 5 UNIT A SLEEP MODE TIMING TSLEEP_EN Minimum PWM low time to recognize a sleep command. VM = 12 V 1.2 ms TSLEEP_EX Minimum PWM high to exit from sleep mode. VM = 12 V 2 µs THERMAL SHUTDOWN TSDN_TR Shut down temperature threshold Shut down triggering temperature 150 160 170 °C TSDN_RS Shut down resume temperature Shut down resume temperature 140 150 160 °C TSDN_HYS Shut down temperature hysteresis Shut down temperature hysteresis 5 10 15 °C 0.6 0.7 0.8 s 4 5 6 s LOCK DETECT tLOCK_EN Lock detect time tLOCK_EX Lock release time 8 Retry capacitor = 0.33 uF Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated Product Folder Links: DRV10970 DRV10970 www.ti.com SLVSCU7A – FEBRUARY 2016 – REVISED MARCH 2016 7.6 Typical Characteristics 430 600 420 500 RDSON (m:) RDSON (m:) 410 400 300 200 400 390 380 370 360 100 350 340 0 -40 RDSON 25 Temperature (qC) 4.5 85 5 12 Supply Voltage (VM) D001 VM = 12 V RDSON Figure 1. RDSON Across Temperature at 12 V 18 D002 Temperature = 25°C Figure 2. RDSON Across Voltage at 25°C 60 50 45 40 Sleep Current (µA) Sleep Current (µA) 50 40 30 20 35 30 25 20 15 10 10 5 0 0 -40 Sleep Current 25 85 Temperature (qC) 125 4.5 VM = 12 V Sleep Current Figure 3. Sleep Current Across Temperature at 12 V 5 12 Supply Voltage (VM) 18 20 D004 Temperature = 25°C Figure 4. Sleep Current Across Voltage at 25°C 4.9 4.76 4.74 4.89 4.72 4.88 4.7 4.68 4.87 Voltage (V) Voltage (V) 4.8 D003 4.86 4.85 4.66 4.64 4.62 4.6 4.84 4.58 4.56 4.83 4.54 4.82 4.52 -40 5-V Regulator 25 85 Temperature (qC) VM = 12 V 125 -40 D005 IL = 20 mA Figure 5. VINT LDO Output Voltage Across Temperature, VM = 12 V 5-V Regulator 25 85 Temperature (qC) VM = 5 V 125 D006 IL = 20 mA Figure 6. VINT LDO Output Voltage Across Temperature, VM = 5 V Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated Product Folder Links: DRV10970 9 DRV10970 SLVSCU7A – FEBRUARY 2016 – REVISED MARCH 2016 www.ti.com 10.2 10.1 10.1 10 Retry Source Current (µA) Retry Sink Current (µA) Typical Characteristics (continued) 10 9.9 9.8 9.7 9.6 9.9 9.8 9.7 9.6 9.5 9.4 9.5 9.3 -40 25 85 Temperature (qC) 125 -40 D007 RETRY Sink Current VM = 12 V Figure 7. Retry Sink Current at 12 V 10 Submit Documentation Feedback 25 85 Temperature (qC) RETRY Source Current 125 D008 VM = 12 V Figure 8. Retry Source Current at 12 V Copyright © 2016, Texas Instruments Incorporated Product Folder Links: DRV10970 DRV10970 www.ti.com SLVSCU7A – FEBRUARY 2016 – REVISED MARCH 2016 8 Detailed Description 8.1 Overview The DRV10970 device controls three-phase brushless DC motors using a speed command (PWM) and direction (FR) interface and Hall signals from the motor. The device is capable of driving up to 1-A RMS and 1.5-A peak current per phase. When the DRV10970 powers up, it starts to drive the motor in trapezoidal communication mode based on the Hall sensor information. If all three Hall sensors are connected, commutation logic relies on all three Hall sensors. If only the U phase Hall sensor is connected (V_HP is floating), DRV10970 starts to drive the motor in single Hall sensor mode. After 6 electrical cycles, the device switches to sinusoidal drive mode if the CMTMOD pin is not floating. If the motor has Hall sensor 0° placement (set on the CMTMOD pin accordingly), the DRV10970 device automatically adjusts the driving angle based on the feedback from the motor; it optimizes the efficiency regardless of the motor parameters and the load conditions. The adaptive driving angle adjustment function can be disabled by the DAA pin, in which case, fixed driving angle is available for user to optimize the motor drive efficiency. The steady-state motor speed is commanded by the PWM input duty cycle, which converts to an average output voltage of VM multiplied by the duty cycle. Floating PWM pin is considered as 100% speed command. Motor rotating direction can be controlled by FR input. Rotational direction can be changed while motor is spinning. The device takes tLOCK_EX time before reversing the direction. The FG output is aligned with U phase Hall sensor signal which indicates the motor speed. And if the motor is locked by external force for tLOCK_EN, RD output will be asserted to indicate the rotor lock condition, and DRV10970 retries after tLOCK_EX period which is determined by the capacitor on the RETRY pin. When the motor is stopped, either in lock condition or PWM equals zero, the state of the phases is selected by BRKMOD pin; coasting (phases are floating) or braking (phases are pulled down to GND). DRV10970 enters sleep mode when PWM is driven low for tSLEEP time and motor comes to a standstill (no FG), internal circuits including regulators are turned off and the power consumption is less than IVM_SLEEP. Overcurrent, current limit, thermal shutdown and undervoltage protection circuits prevent the system components from being damaged during extreme conditions. Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated Product Folder Links: DRV10970 11 DRV10970 SLVSCU7A – FEBRUARY 2016 – REVISED MARCH 2016 www.ti.com 8.2 Functional Block Diagram CPN CPP VCP VM VM VCP Charge Pump VM U Phase U pre-driver Linear Reg VINT VINT VM VCP PWM V Phase V pre-driver FR DAA VM BRKMOD VCP CMTMOD Core Logic W Phase W pre-driver RETRY + FG VINT VREF I Limit Current Sense ± RD + HALL_U Hall Com CS U_HP U Hall U_HN ± OSC + HALL_V Reset UVLO Hall Com ± + Thermal Shutdown HALL_W Hall Com V_HP V Hall V_HN W_HP W Hall W_HN ± GND 12 Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated Product Folder Links: DRV10970 DRV10970 www.ti.com SLVSCU7A – FEBRUARY 2016 – REVISED MARCH 2016 8.3 Feature Description 8.3.1 Current Limit and OCP DRV10970 provides two stages of current control, cycle-by-cycle current limit and OCP. The current limit function limits the motor phase current during the motor operation: during startup, acceleration, sudden load change, and rotor lock condition while spinning. The application specific threshold is achieved by choosing the value of the external resistor connected to the CS pin. Figure 9 shows the simplified circuitry of the current limit circuit using the CS pin. The voltage generated on the CS pin is proportional to the value of the external resistor, RCS. The external resistor value is chosen based on the current limit to be achieved (see Equation 1). VM 1 2 3 V U 4 W 5 6 Current Sense U Current Sense V Current Sense W GND ACL + / ILIMIT ILIMIT = (VILIM_THR × ACL) / RCS VILIM_THR ICS = ILIMIT / ACL VCS = ILIMIT × RCS / ACL Digital VCS CS CL Comparator RCS DRV10970 GND Figure 9. Current Limit Function Simplified Circuitry Current limit threshold is set by Equation 1. ILIMIT = (VILIM_THR × ACL) / RCS (1) In trapezoidal operation mode, motor phase current is restricted by means of cycle-by-cycle limit, as shown in Figure 10. If the current limit is triggered, one of the conducting MOSFETs is disabled and the complementary side MOSFET is activated until the beginning of the next PWM cycle. In the example shown in Figure 10, MOSFET 1 and MOSFET 5 are conducting MOSFETs, MOSFET 1 is disabled, and the complementary MOSFET 4 is activated when the current limit is triggered. Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated Product Folder Links: DRV10970 13 DRV10970 SLVSCU7A – FEBRUARY 2016 – REVISED MARCH 2016 www.ti.com Feature Description (continued) VM 1 2 U 3 M V 4 5 W 6 GND VM Voltage on phase U without current limit GND VM Voltage on phase V GND Current limit threshold Current on phase U and V without current limit Current limit threshold Current on phase U and V with current limit VM Voltage on phase U with current limit GND Figure 10. Cycle-by-Cycle Current Limit in Trapezoidal Mode If the current limit is triggered in sinusoidal operation mode, DRV10970 device switches to trapezoidal mode of operation to exercise cycle-by-cycle current limiting. If the current limit condition does not show up for 2 electrical cycles, the device will switch back to sinusoidal mode (shown in Figure 11). The current limit threshold in sinusoidal mode is 1.5 times the current limit value in the trapezoidal mode. The current limit function can be disabled by connecting CS pin to GND. 1.5 × threshold Current limit threshold 0 Current limit threshold Cycle-by-Cycle Limit 1.5 × threshold Cycle 1 without Cycle 2 without current limit current limit Figure 11. Current Limit in Sinusoidal Mode OCP has a fixed threshold IOCP, it can protect the device in catastrophic short-circuit conditions such as phase short to GND, phase short to VM and phase short to another phase. The IOCP limit is similar to the current limit, except that when phase current crosses IOCP threshold (positively or negatively), the device shuts down all the MOSFETs immediately. The device will wait for 2 ms before it starts driving the motor again. If the high current still exists, the device will shut down the MOSFETs and again wait for 2 ms. This process of checking overcurrent will continue until the OC event goes away. The device is capable of handling an OC event continuously for its lifetime. The OC protection feature cannot be disabled. 14 Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated Product Folder Links: DRV10970 DRV10970 www.ti.com SLVSCU7A – FEBRUARY 2016 – REVISED MARCH 2016 Feature Description (continued) 8.3.2 Thermal Shutdown If the junction temperature exceeds safe limits, the DRV10970 device places its outputs (U, V, W) in highimpedance mode. After the junction temperature has fallen to a safe level, operation automatically resumes. 8.3.3 Rotor Lock Detection and Retry A locked rotor condition is detected if the Hall signal stops toggling for tLOCK_EN. The device enters a motor parking state: coasting (if BRKMOD = 0) or braking state (if BRKMOD = 1). In the coasting state, the device places its outputs (U, V, W) in a high-impedance state. In the braking state, it keeps the low-side MOSFETs ON and high-side MOSFETs OFF. The RD pin is asserted to indicate the rotor lock condition. Operation resumes after tLOCK_EX time at the same time RD is deasserted. This process repeats until the locked rotor condition is cleared. RD will be deasserted in sleep mode. The tLOCK_EX time is determined by the capacitor value connected to the RETRY pin. The accuracy of the capacitor and ground potential difference between the device ground and CRETRY capacitor ground affects the accuracy of the time setting. After the DRV10970 device enters rotor locked state, IRETRY, sourcing current starts to charge the capacitor, CRETRY, until the voltage of the capacitor reaches VRETRY_H, then IRETRY sinking current starts to discharge the capacitor, CRETRY, until the voltage of the capacitor falls below VRETRY_L. This process repeats 128 times which determines the tLOCK_EX, then DRV10970 retry starting the motor. tLOCK_EX = 15.36 × 106 × CRETRY (in seconds) (2) DRV10970 VINT To digital Counter IRETRY RETRY & Motor Lock IRETRY GND Figure 12. Lock Release Timing Circuit VRETRY_H VRETRY_L 128 times GND RD Motor Spinning Motor Locked Motor Spinning Figure 13. Lock Release Timing Waveform 8.3.4 Supply Undervoltage Condition (UVLO) When the supply voltage (VM) level falls below the undervoltage lockout threshold voltage (VUVLO-Th-f), the DRV10970 will keep phases (U, V, W) in high-impedance mode. Operation resumes when VM rises above the VUVLO-Th-r threshold. Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated Product Folder Links: DRV10970 15 DRV10970 SLVSCU7A – FEBRUARY 2016 – REVISED MARCH 2016 www.ti.com Feature Description (continued) 8.3.5 Sleep Mode The DRV10970 provides a sleep mode function to save power when the motor is not spinning. The device can be commanded to enter sleep mode by driving logic low on PWM pin for at least tSLEEP_EN seconds. Before entering low-power state, the speed will be ramped down (by brake condition or by coasting) where rotor lock condition is detected. This sequence to bring the motor to a halt condition may take several seconds based on the motor. The device then enters sleep state where reset is asserted and supply is driven to low. Only a small portion of the logic is kept alive to detect the PWM pin high. The device will wake up after PWM goes high (PWM high signal needs to be longer than tSLEEP_EX) and starts to drive the motor again. PWM SS tSLEEP_EN tSLEEP_EX >1.2 ms low SLEEP_FLAG SS WAKE_UP SS MOTOR_STATE SS BRAKE/COAST WAIT FOR MOTOR TO STOP SPINNING R am ping SLEEP INITIAL SS Rotor Lock detected d own MOTOR SPEED 5V >2 µs wide SS VINT ON State OFF, Low Power State ON State SS Figure 14. Sleep Mode Sequence and Timing The current consumption during sleep mode is less than IVM_SLEEP. In sleep mode, internal regulator VINT is shut down; if the Hall sensors are powered by VINT, the Hall sensors are also put into power off condition to further save power. The U, V, and W phase outputs are tri-stated, FG and RD pins are de-asserted while in the sleep mode. The device will not be able to perform OCP while in sleep mode. 8.4 Device Functional Modes 8.4.1 Operation in Trapezoidal Mode and Sinusoidal Mode The DRV10970 device can operate in either trapezoidal mode or sinusoidal mode depending on the setting of CMTMOD pin. Sinusoidal operation mode provides better acoustic performance, which is more suitable for applications like refrigerator fans, HVAC fans, pumps, and other home appliances. Trapezoidal mode provides higher driving torque, which is more suitable for systems with heavy and unpredictable load conditions, such as power tools and actuators. 16 Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated Product Folder Links: DRV10970 DRV10970 www.ti.com SLVSCU7A – FEBRUARY 2016 – REVISED MARCH 2016 Device Functional Modes (continued) 8.4.1.1 Trapezoidal Control Mode Trapezoidal control is also called 120° control or 6-step control. In the trapezoidal control mode, the DRV10970 device drives standard six step commutation sequence based on the Hall input states and FR (direction) pin value. Trapezoidal (30° Hall placement) commutation is in accordance with Table 1. The startup scheme of sinusoidal control mode is also based on trapezoidal commutation. Trapezoidal mode does not support single Hall sensor operation; it may cause unpredictable motor operation. Table 1. Trapezoidal Commutation With 30° Hall Placement (1) (2) (3) PHASE OUTPUT (2) HALL SIGNAL (1) STATE FR = 1 FR = 0 U V W U V W U V W 1 1 1 0 High Hi-Z Low Low Hi-Z High 2 1 0 0 High Low Hi-Z Low High Hi-Z 3 1 0 1 Hi-Z Low High Hi-Z High Low 4 0 0 1 Low Hi-Z High High Hi-Z Low 5 0 1 1 Low High Hi-Z High Low Hi-Z 6 0 1 0 Hi-Z High Low Hi-Z Low High 1x (3) 0 0 0 Hi-Z Hi-Z Hi-Z Hi-Z Hi-Z Hi-Z 2x (3) 1 1 1 Hi-Z Hi-Z Hi-Z Hi-Z Hi-Z Hi-Z Hall signal XHALL = 1 if the positive input terminal voltage (x_HP) is higher than the negative input terminal voltage (x_HN) Phase output = Hi-Z which means both the high-side and low-side MOSFETs are turned off. State 1x and 2x are invalid states, DRV10970 will output high impedance for all three phases in this condition. Hall sensor placement or connection needs to be changed. Table 2. Trapezoidal Commutation With 0° Hall Placement 8.4.1.2 Sinusoidal Pulse Wide Modulation (SPWM) Control Mode If the sinusoidal operation mode is selected, the device will start the motor with trapezoidal operation (based on the commutation table shown in Table 1) and switch to sinusoidal after 6 electrical cycles. If current limit is triggered during trapezoidal startup, the transition will be delayed until current limit is cleared. If current limit is triggered in sinusoidal operation, the device will switch back to trapezoidal mode and will remain until the current limit event goes away (refer to Current Limit and OCP). In sinusoidal control mode, the commutation will only rely on phase U Hall sensor input and ignore the phase V and W Hall sensor input. The DRV10970 provides sinusoidal voltage shaping in the SPWM mode. The device generates 25-kHz PWM outputs on each phase, which have an average value of sinusoidal waveform on phase to phase. If the phase voltage is measured with respect to ground, the waveform is sinusoidal coupled with third-order harmonics. At any time among the three phases, one phase output equals to zero, as shown in Figure 16. PWM output Average value Figure 15. PWM Output and the Average Value Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated Product Folder Links: DRV10970 17 DRV10970 SLVSCU7A – FEBRUARY 2016 – REVISED MARCH 2016 www.ti.com U-V U V-W V W-U W LEFT: Sinusoidal voltage from phase to phase. RIGHT: Sinusoidal voltage with third-order harmonics from phase to GND Figure 16. Sinusoidal Voltage With Third-Order Harmonics Output The output amplitude is determined by the VM and the maximum PWM duty cycle among one electrical cycle. If VM is used to control the motor speed, the output maximum PWM duty cycle is 100%. The output amplitude is proportional to the VM amplitude. VM = 12 V VM = 6 V Figure 17. Adjust VM to Control the Motor Speed The PWM is used for controlling the motor speed. System calculates the duty cycle of the PWM input as DutyIN, which is converted into sinusoidal PWM output. The maximum amplitude is when PWM input is 100% and maximum PWM output duty cycle is 100%, the output amplitude will be VM. A lower value such as VM / 2 could be achieved by driving the PWM duty to 50%. When the input duty cycle is less than 10% and greater than 0% DRV10970 keeps the input command at a 10% duty cycle (see Figure 18). Output Duty 10% 0 10% Input Duty Minimum Duty Cycle = 10% Figure 18. Duty Cycle Profile 18 Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated Product Folder Links: DRV10970 DRV10970 www.ti.com SLVSCU7A – FEBRUARY 2016 – REVISED MARCH 2016 100% PWM input 100% peak output VM 50% PWM input 50% peak output VM / 2 Figure 19. Adjust PWM Input Duty Cycle to Control the Motor Speed Note that the speed control PWM input frequency does not reflect to PWM output frequency on the phase outputs. The device supports input PWM frequency in the range of 15 to 100 kHz, the PWM output frequency on the phase is always 25 kHz. 8.4.2 Single Hall Sensor Operation The DRV10970 device supports single Hall sensor operation to reduce system cost. If only U phase Hall sensor is connected to the device and V and W phase Hall sensors are not installed in the system, the device automatically drives the motor in single Hall sensor mode. Single Hall sensor operation does not support trapezoidal operation, which may cause unpredictable motor behavior. In single hall sensor mode, rotor is aligned to a known position for about 700 ms first and then motor is driven with 2-step DC current into the coil, which means instead of 6-step control, the device only outputs 2 steps based on the U phase Hall sensor signal. The direction of driving current is based on the FR input and the commutation mode setting. Table 3 shows the startup logic. For example, if 0° Hall placement is selected (CMTMOD pin equals to High), FR equals to high, and U phase Hall sensor signal is high, DRV10970 will drive U phase PWM and both V and W phase low. Table 3. Single Hall Startup Commutation Table PHASE OUTPUT HALL PLACEMENT HALL SIGNAL 0° 1 FR = 1 FR = 0 U V W U V W PWM LOW LOW LOW PWM PWM 0° 0 LOW PWM PWM PWM LOW LOW 30° 1 PWM LOW Hi-Z LOW PWM Hi-Z 30° 0 LOW PWM Hi-Z PWM LOW Hi-Z Hi-Z LOW PWM Hi-Z LOW PWM Single Hall Align Cycle-by-cycle current limit is effective during single Hall sensor startup. After 6 electrical cycles of startup, the device will switch to sinusoidal mode of operation. If current limit is triggered, sinusoidal control will transit back to 2-step drive mode, same as startup sequence. Refer to Current Limit and OCP. Note that single Hall sensor operation mode may exhibit slight reverse spin of the rotor during startup. The reverse movement will be less than 180 electrical degrees. The rotor locked condition is detected when no U-phase hall switching for about 700ms. For certain low inertia motors or no load condition, the rotor may continue to vibrate when the rotor is locked which may result in a hall signal switching. This condition is not detected by the device as the hall period may look like a normal motor spinning condition. In this scenario, the device may continue to drive the motor. Lowering the OC limit may help resolve this condition. Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated Product Folder Links: DRV10970 19 DRV10970 SLVSCU7A – FEBRUARY 2016 – REVISED MARCH 2016 www.ti.com 8.4.3 Adaptive Drive Angle Adjustment (ADAA) Mode In sinusoidal mode, the phase voltage vector is driven such that phase current and BEMF voltages are aligned (in-phase) in order to achieve the maximum motor efficiency possible. When Hall sensor is placed at 0°, the BEMF voltage will be in-phase with respective Hall signals. The ADAA logic takes advantage of this fact and aligns the U-phase current to the U-Hall sensor input. If DAA pin is floating, the DRV10970 device will operate in the ADAA mode, in which case, the device continuously monitors the phase difference between the U-phase current and U-phase Hall signal while adjusting the phase voltage driving angle Δθ (with respect to the U-Hall sensor signal, same as U-BEMF zero crossing) to align the current and Hall signal (shown in Figure 20). ADAA mode is the recommended mode of operation where the motor efficiency is maximized irrespective of motor parameters, load conditions, and motor speeds. ADAA mode is only available in sinusoidal mode and 0° Hall sensor placement. The motors with 30° Hall placement may use the fixed drive angle feature to achieve maximum system efficiency for a given application. U phase voltage U phase current U phase Hall signal U phase BEMF û§ Figure 20. Adaptive Drive Angle Adjustment For sinusoidal mode and 0° Hall sensor placement, if DAA pin is connected to GND, voltage driving angle will be fixed at 10°. If DAA pin is connected to VINT, voltage driving angle will be fixed at 5°. For sinusoidal mode and 30° Hall sensor placement, if DAA is floating, voltage drive angle will be fixed at 0°. DAA pin is connected to GND, voltage driving angle will be fixed at 10°. If the DAA pin is connected to VINT, voltage driving angle will be fixed at 5°. In trapezoidal operation mode, DAA input is ignored and always control the output based on Table 2. Table 4 shows the DRV10970 operation modes with DAA and CMT_MOD configurations. Table 4. DAA and CMT_MOD Configurations MODE CMT_MOD = floating MOTOR TYPE HALL PLACEMENT Trapezoidal 30° Trapezoidal mode, DAA signal is ignored. 0° ADAA 10° drive angle 5° drive angle BEMF zero crossing and Hall crossing will be in-sync. 30° 0° drive angle 10° drive angle 5° drive angle The drive angle is specified with respect to BEMF zero crossing. When measured with respect to Hall-U signal, add 30°. CMT_MOD = GND CMT_MOD = VINT 20 DAA = FLOATING DAA = GND DAA = VINT COMMENTS The Trapezoidal motor with 0° Hall placement may use 30 degree Hall delay (OTP setting) to achieve optimum driving. Sinusoidal Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated Product Folder Links: DRV10970 DRV10970 www.ti.com SLVSCU7A – FEBRUARY 2016 – REVISED MARCH 2016 9 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality. 9.1 Application Information 9.1.1 Hall Sensor Configuration and Connections Hall sensors must be connected to the DRV10970 to provide the feedback of the motor position. The DRV10970 Hall sensor input circuit is capable of interfacing with a variety of Hall sensors, and with two different ways of Hall sensor placement, which are 0° placement and 30° placement. Typically, a Hall element is used, which outputs a differential signal on the order of 100 mV or higher. The VINT regulator can be used for powering the Hall sensors, which eliminates the need for an external regulator. The Hall elements can be connected in serial or parallel as shown in Figure 21 and Figure 22. VINT VINT U Hall U_HP CH U_HN DRV10970 V Hall V_HP CH V_HN W Hall W_HP CH W_HN Figure 21. Serial Hall Element Connection Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated Product Folder Links: DRV10970 21 DRV10970 SLVSCU7A – FEBRUARY 2016 – REVISED MARCH 2016 www.ti.com Application Information (continued) VINT VINT U Hall U_HP VINT CH U_HN VINT DRV10970 V Hall V_HP CH V_HN W Hall W_HP CH W_HN Figure 22. Parallel Hall Element Connection Noise on the Hall signal degrades the commutation performance of the device. Therefore, take utmost care to minimize the noise while routing the Hall signals to the device inputs. The device internally has fixed time hall filtering of about 320 µs. To further minimize the high-frequency noise, a noise filtering capacitor may be connected across x_HP and x_HN pins as shown in Figure 21 andFigure 22. The value of the capacitor can be selected such that the RC time constant is in the range of 0.1 to 2 µs. For example, Hall sensor with internal impedance (between Hall output to ground) of 1 kΩ, CH value is 1 µF for 1-µs time constant. Some motors integrate Hall sensors that provide logic outputs with open-drain type. These sensors can also be used with the DRV10970, with circuits shown in Figure 23. The negative (x_HN) inputs are biased to 2.5 V by a pair of resistors between VINT and ground. For open-drain type Hall sensors, an additional pullup resistor to supply is needed on the positive (x_HP) input, where VINT is used again. The VINT output may be used to supply power to the Hall sensors as well. 22 Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated Product Folder Links: DRV10970 DRV10970 www.ti.com SLVSCU7A – FEBRUARY 2016 – REVISED MARCH 2016 Application Information (continued) VINT VINT VINT U Hall IC U_HP VINT / 2 VINT U_HN DRV10970 VINT / 2 V Hall IC V_HP VINT V_HN VINT / 2 W Hall W_HP W_HN VINT / 2 Figure 23. Hall IC Connection The correspondence between the phase U, V, W and the Hall signal U, V, W needs to follow the DRV10970 definition, which is: 1. Phase U is leading phase W by 120°, phase W is leading phase V by 120°. The Hall signal positive output is aligned with respective phase BEMF. Choose FR = 1 and 0° placement option (see Figure 24). 2. Phase U is leading phase V by 120°, phase V is leading phase W by 120°. The Hall signal positive output is aligned with respective phase BEMF in the opposite direction. Choose FR = 0 and 0° placement option (see Figure 25). 3. Phase U is leading phase W by 120°, phase W is leading phase V by 120°. The Hall signal positive output is 30° lagging of respective phase BEMF. Choose FR = 1 and 30° placement option (see Figure 26). 4. Phase U is leading phase V by 120°, phase V is leading phase W by 120°. The Hall signal positive output is 30° leading of respective phase BEMF. Choose FR = 0 and 30° placement option (see Table 2 and Figure 29). The correspondence and sequency is also applied to applications using open-drain output Hall ICs. Figure 28 is an example of FR = 0, and 30° placement condition. Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated Product Folder Links: DRV10970 23 DRV10970 SLVSCU7A – FEBRUARY 2016 – REVISED MARCH 2016 www.ti.com Application Information (continued) U W V Phase BEMF U_HP Hall element output (U) U_HN V_HP Hall element output (V) Hall element output (W) V_HN W_HN W_HP FR = 1 Hall placement = 0 degree Differential output Hall element Figure 24. Correspondence Between Motor BEMF and Hall Signal (FR = 1, 0° Placement) U V W Phase BEMF U_HN Hall element output (U) Hall element output (V) U_HP V_HP V_HN W_HN Hall element output (W) W_HP FR = 0 Hall placement = 0 degree Differential output Hall element Figure 25. Correspondence Between Motor BEMF and Hall Signal (FR = 0, 0° Placement) 24 Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated Product Folder Links: DRV10970 DRV10970 www.ti.com SLVSCU7A – FEBRUARY 2016 – REVISED MARCH 2016 Application Information (continued) U W V Phase BEMF 30ö U_HP Hall element output (U) Hall element output (V) Hall element output (W) 30ö 30ö U_HN V_HP V_HN W_HN W_HP FR = 1 Hall placement = 30 degree Differential output Hall element Figure 26. Correspondence Between Motor BEMF and Hall Signal (FR = 1, 30° Placement) U V W Phase BEMF 30| U_HN Hall element output (U) U_HP 30| 30| Hall element output V_HP (V) V_HN W_HN Hall element output (W) W_HP FR = 0 Hall placement = 30° Differential output Hall element Figure 27. Correspondence Between Motor BEMF and Hall Signal (FR = 0, 30° Placement) Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated Product Folder Links: DRV10970 25 DRV10970 SLVSCU7A – FEBRUARY 2016 – REVISED MARCH 2016 www.ti.com Application Information (continued) U W V Phase BEMF 30| 30| 30| Hall IC output (U) Hall IC output (V) Hall IC output (W) FR = 1 Hall placement = 30 degree OC output Hall IC Figure 28. Correspondence Between Motor BEMF and Hall Signal (FR = 1, 30° Placement, Hall IC) U V W Phase BEMF 30| 30| 30| Hall IC output (U) Hall IC output (V) Hall IC output (W) FR = 0 Hall placement = 30° OC output Hall IC Figure 29. Correspondence Between Motor BEMF and Hall Signal (FR = 0, 30° Placement, Hall IC) If the motor terminal definition is different from the previous description, rename the motor phase U, V, W, or the Hall U, V, W, or swap the positive and negative of the Hall sensor output to make it match. Use these tips to find the correct U, V, and W phases and the respective Hall sensors: 1. Assume motor phases and Hall outputs do not have labels. If named, remove them. 2. Label A, B, C to the motor terminals (phases). Label Da and Db, Ea and Eb, Fa and Fb to the Hall output pairs. If Hall ICs are used, just label the digital outputs as D, E, F. 3. Use three 10-kΩ resistors, connect them to motor terminals - A, B, C with star connection. The center is called COM. 4. Provide power to the Hall sensors. 26 Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated Product Folder Links: DRV10970 DRV10970 www.ti.com SLVSCU7A – FEBRUARY 2016 – REVISED MARCH 2016 Application Information (continued) 5. Use 4 channel Scope to observe signals. Connect probe -1, 2, 3 to A, B, C terminals of the motor (phases), probe-4 connects to Hall Da (or D). Name the probe 1 (terminal-A) as U-phase. (see Figure 30) 6. Turn the rotor manually in clock-wise direction. If the waveform on probe-1 (U-phase) is leading probe-2 (terminal-B) by 120°, name the terminal-B as phase W and terminal-C as phase V. Else if waveform on the probe-2 is leading probe 1 (U) by 120°, terminal-B as V, terminal-C as W. At this stage all three phases of the motor are identified. 7. Motor manufacturers have two popular Hall placement options. The first is 0° Hall placement (BEMF and Hall signals are in-phase) and the second is 30° Hall placement (BEMF leads Hall signal by 30°). If the probe-4 is in-phase (or lagging 30°) with phase-U, name Da as Hall U positive (U_HP), Db as Hall U negative (U_HN). If probe-4 is in-phase with phase U (or lagging 30°), but inverted polarity, name Da as U_HN, Db as U_HP. If the probe-4 is not in-phase (or lagging 30°) with respect to U but aligns with phase-V or W, name accordingly as V_HP/V_HN or W_HP/W_HN. Repeat this step to map Ea/Eb and Fa/Fb in the same way. By end of this step, all three sets of Hall signals are mapped to respective phase signals - phase U & Hall U_HP/HN, phase V & Hall V_HP/V_HN and phase W and W_HP/W_HN. Care should be taken while judging 30° Hall placement, sometimes 30° and 60° look alike. If U phase is leading Hall Da by 60°, there will be another phase (V or W) with in-phase or lagging by 30° relationship. Hence it's important to check all three phases before concluding. 8. When Hall ICs are used, if the Hall D is in-phase or lagging 30° with respect to phase U but inverted polarity, name the Hall D output as U_HN, and 2.5-V reference voltage to U_HP. If Hall D is leading 30°, then turn the rotor in counter clock-wise direction and map remaining E & F Hall outputs. 9. After phase UVW and Hall UVW positive negative are identified, manually rotate the motor again, check if the result matches Figure 24 and Figure 25 (0° placement) or Figure 26 and Figure 25 (30° placement). 10. Connect U,V,W and Hall U,V,W to the DRV10970, with the FR = 1, it should rotate with direction you manually spun it. Connect FR = 0, the motor will spin in the other direction. Scope Ea Hall Eb B A Da Hall Fa Db Hall Fb C Figure 30. Motor Measurement Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated Product Folder Links: DRV10970 27 DRV10970 SLVSCU7A – FEBRUARY 2016 – REVISED MARCH 2016 www.ti.com 9.2 Typical Application VCC VCC RFG R RD C SW CPP CPN FG RD U VCP C VCP VM M V C VM VINT C VINT GND GND/VINT VINT/VCC W R HALL BRKMOD GND/VINT/FLOATING DAA GND/VINT/FLOATING CMTMOD GND/VINT U_HP U_HALL U_HN FR V_HP RETRY CRETRY V_HALL V_HN PWM W_HN CS W_HALL W_HP R CS Figure 31. Typical Application Schematic 9.2.1 Design Requirements Table 5 gives design input parameters for system design. Table 5. Design Parameters DESIGN PARAMETER EXAMPLE VALUE Supply voltage 5 to 18 V Continuous operation current 0 to 1 A Peak current 1.5 A Hall sensor differential output peak >40 mV PWM input frequency 15 to 100 kHz PWM duty cycle 0% to 100% 9.2.2 Detailed Design Procedure • • • • • 28 Refer to Design Requirements and make sure the system meets the recommended application range. Refer to Hall Sensor Configuration and Connections and make sure correct phases and corresponding hall signals are identified. Refer to Hall Sensor Configuration and Connections and make sure hall signals are connected accurately. Build your hardware based on Layout Guidelines. Connect the device into system and validate your system. Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated Product Folder Links: DRV10970 DRV10970 www.ti.com SLVSCU7A – FEBRUARY 2016 – REVISED MARCH 2016 9.2.3 Application Curves U-Phase U-Phase FG FG V-Phase Current 6 cycles Trapezoidal Commutation Align State U-Phase Current 2-steps Commutation Sinusoidal Commutation U-Phase Current Figure 32. Three Hall Start-up Sequence Figure 33. Single Hall Start-up Sequence Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated Product Folder Links: DRV10970 29 DRV10970 SLVSCU7A – FEBRUARY 2016 – REVISED MARCH 2016 www.ti.com 10 Power Supply Recommendations The DRV10970 is designed to operate from an input voltage supply (VM) range between 5 and 18 V. Place a 10µF ceramic capacitor rated for VM as close as possible to the DRV10970. 11 Layout 11.1 Layout Guidelines The VM terminal should be bypassed to GND using a low-ESR ceramic bypass capacitor with a recommended value of 10-µF rated for VM. Place this capacitor as close as possible to the VM pin with a thick trace or ground plane connection to the device GND pin. The CRETRY capacitor should be placed as close to the RETRY pin as possible with a thick trace or ground plane connection to the device GND pin. A low-ESR ceramic capacitor must be placed in between the CPN and CPP pins. TI recommends a value of 0.1µF rated for VM. Place this component as close as possible to the pins. A low-ESR ceramic capacitor must be placed in between the VM and VCP pins. TI recommends a value of 1-µF rated for 16 V. Place this component as close as possible to the pins. Bypass VINT to ground with 2.2-µF ceramic capacitors rated for 10 V. Place these bypassing capacitors as close to the pins as possible. Because the GND pin carries motor current, take utmost care while planning grounding scheme, keep the ground potential difference between any two points less than 100 mV. 11.2 Layout Example Logic High 3. 3 kŸ DAA FG U_HP FR U_HN RETRY V_HP BRKMOD V_HN CMTMOD W_HP PWM W_HN RD VCP CS CPP VINT CPN VM W U Motor Phase U GND V Motor Phase V 1 GND 3. 3 kŸ GND 2. 2 µF 1 µF 0. 1 µF Motor Phase W + VM HS LS Figure 34. Layout Schematic 30 Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated Product Folder Links: DRV10970 DRV10970 www.ti.com SLVSCU7A – FEBRUARY 2016 – REVISED MARCH 2016 12 Device and Documentation Support 12.1 Community Resources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers. Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and contact information for technical support. 12.2 Trademarks PowerPAD, E2E are trademarks of Texas Instruments. All other trademarks are the property of their respective owners. 12.3 Electrostatic Discharge Caution These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 12.4 Glossary SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions. Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated Product Folder Links: DRV10970 31 DRV10970 SLVSCU7A – FEBRUARY 2016 – REVISED MARCH 2016 www.ti.com 13 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. 32 Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated Product Folder Links: DRV10970 PACKAGE OPTION ADDENDUM www.ti.com 14-Mar-2016 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) DRV10970PWP PREVIEW HTSSOP PWP 24 60 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 DRV10970 DRV10970PWPR PREVIEW HTSSOP PWP 24 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 DRV10970 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. 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