■ Dimensions, mm SOP-8 5 8 4 1 0.4±0.1 1.27±0.2 DIP-8 5 6.4 8 1 4 9.3 0.46±0.1 3.0min 4.5max 3.3 1.5 2.54±0.25 58 0~8° ■ Features • Uses a newly developed CMOS process with high dielectric strength (30V) for implementing low power consumption • Standby current of 2µA or less (at Vcc=14V), and operating current of 1.9mA (typ.) • Automatically reduces the oscillation frequency to suppress loss of the power supply in light load mode • Overvoltage protection function detecting Vcc voltage • A drive circuit for connecting a power MOSFET directly • Output peak current: Source current –500mA Sink current +1A • Pulse-by-pulse overcurrent limiting function • Overload cutoff function (latch or non-latch mode selectable) • Output ON/OFF control function by external signal • Latch mode overvoltage shutdown function • Undervoltage lockout function (16.5V ON / 9V OFF) • Reference voltage output (5V) • 8-pin package (DIP/SOP) 1.7max +0.1 –0.05 4.9 0.20 The FA3641P(N) and FA3647P(N) are the PWM type switching power supply control ICs that can directly drive power MOSFET. These ICs use a CMOS device with high dielectric strength (30V) to implement low power consumption. They feature a number of functions that are equivalent to those of the FA531X series consisting of bipolar devices. In addition, they have a function that reduces the oscillation frequency to suppress loss of the power supply in light load mode and support an overvoltage protection detecting Vcc voltage. These ICs are most suitable for high-performance, energy-saving power supplies that require low input power in standby or no-load mode. 3.9 ■ Description PWM control IC with light load power saving function For Switching Power Supply Control 6.0±0.2 FA3641P(N), FA3647P(N) FA3641P(N), FA3647P(N) +0.1 5 0.0 0.25 – 7.62 0~15 ˚ 5˚ 0~1 FA3641P(N), FA3647P(N) ■ Block diagram FA3647 FA3641 Pin No. Symbol Function Description 1 RT Setting oscillation frequency 2 FB Feedback Input to PWM comparator 3 IS (+)/ IS (–) Overcurrent detection Input to overcurrent limiting function 4 GND Ground Ground 5 OUT Output Output for direct driving a power MOSFET 6 VCC Power supply Power supply for IC 7 REF Reference voltage Reference voltage output 8 CS Soft-start and Soft-start, ON/OFF and latch- ON/OFF control mode shutdown operations Oscillator timing resistor (5V) ■ Absolute maximum ratings (Ta=25˚C) FB pin input voltage REF pin output current IS pin input voltage CS pin input current Total power dissipation Symbol VCC1 VCC2 IOL IOH VFB IREF VIS ICS Pd Operating temperature Junction temperature Storage temperature Topr Tj Tstg Supply voltage Output peak current Note: *1 Derating factor Ta > 25˚C: 8.0mW/˚C *2 Derating factor Ta > 25˚C: 4.0mW/˚C Test condition Low impedance source (Icc >15mA) Internal ZD clamp (Icc < 15mA) Sink current Source current at Ta =25˚C DIP SOP Rating 30 Self limiting +1.0 –0.5 –0.3 to 5.0 –10 –0.3 to 5.0 2.0 800 *1 400 *2 –30 to +85 125 –40 to +150 Unit V V A A V mA V mA mW ˚C ˚C ˚C Maximum power dissipation curve 400mW (SOP) 800mW (DIP) Max power disspation Item 0 –30 25 85 125 Ambient temperature Ta [˚C] 59 FA3641P(N), FA3647P(N) ■ Recommended operating condition Item Symbol Min. Typ. Max. Unit Supply voltage VCC 10 REF pin bypass capacitor Cref 0.1 28 V Soft-start capacitor CS 0.01 1 Oscillation frequency (FB >1.2V) fOSC 30 500 Min.oscillation frequency at light load mode (FB <1.2V) fOSCL 10 µF 0.47 µF kHz kHz ■ Electrical characteristics (Vcc=18V, RT=47kΩ, Ta=25˚C) Reference voltage section Item Symbol Test condition Min. Typ. Max. Unit Reference voltage VREF Tj=25˚C 4.75 5.00 5.25 V Voltage variation 1 (Line regulation) VdV VCC=10 to 28V ±6 ±20 mV Voltage variation 2 (Load regulation)) VdV IL=0 to 10mA, Vcc=18V ±6 ±20 mV Voltage variation 3 (Temperature stability) VdT Ta= –30 to +85°C ±0.5 Item Symbol Test condition Min. Typ. Max. Oscillation frequency fOSC RT=47kΩ, Tj=25˚C 92.6 100 107.4 Frequency variation 1 (Voltage stability) fdV VCC=10 to 28V ±1.6 % Frequency variation 2 (Temperature stability) fdT Ta= –30 to +85°C ±0.02 % / °C mV/°C Oscillator section Unit kHz Pulse width modulation circuit section Item Symbol Test condition Min. Typ. Max. Unit FB pin source current IFB VFB=0V –985 –750 –615 µA 0.95 1.03 Input threshold voltage (FB pin) Maximum duty cycle VTH FBO Duty cycle =0% VTH FBM Duty cycle =DMAX DMAX VFB=2.5V V 2.40 V 66 70 74 % Min. Typ. Max. Unit Reducing oscillation frequency section Item Symbol FB pin threshold voltage VTH FBS Frequency reduction kfS1 Minimum oscillation frequency foscS2 Test condition VFB=1.10 to 1.15V 1.18 V 16.7 kHZ 46 kHZ Overcurrent limiting circuit section Item Symbol Input threshold voltage (IS pin) VTH IS Input terminal source current (IS pin) I IS Delay time TPD IS Test condition FA3641P/N FA3647P/N Min. Typ. Max. Min. 215 235 255 VIS =0V Typ. Unit Max. –188 –168 –148 mV –5 150 –20 µA 150 ns Soft-start circuit section Item Symbol Test condition Min. Typ. Max. Charge current (CS pin) ICHG VCS =1V, Tj=25˚C –4.0 –6.5 –9.0 Input threshold voltage (CS pin) VTH CSO Duty cycle =0% 0.95 1.03 V VTH CSM Duty cycle =DMAX 2.40 V 60 Unit µA FA3641P(N), FA3647P(N) Output ON/OFF circuit section Item Symbol Test condition Min. Typ. Max. Unit CS pinl source current Isocs VCS=0V, Tj=25˚C –4.0 –6.5 –9.0 µA OFF-to-ON threshold voltage (CS pin) VTH ON OFF→ON, Tj=25˚C 0.82 0.95 V ON-to-OFF threshold voltage (CS pin) VTH OFF ON→OFF, Tj=25˚C 0.50 0.68 Item Symbol Test condition Min. Typ. Max. Unit CS pin sink current ISICS VCS=6.5V, VFB=1V, Tj=25˚C 20 35 50 µA Cutoff threshold voltage (CS pin) VTH CSF ON→OFF, Tj=25˚C 8.0 8.5 9.0 V VTH CSN OFF→ON, Tj=25˚C 7.4 7.9 8.4 V V Latch-mode cutoff circuit section Hysteresis VTH HIS 0.6 V Overload cutoff circuit section Item Symbol Cutoff threshold voltage (FB pin) VTH FB Test condition Min. Typ. Max. Unit 2.8 3.0 3.3 V Overvoltage cutoff circuit section Item Symbol Test condition Min. Typ. Max. Unit Cutoff threshold voltage (Vcc pin) VTH VCC Tj=25˚C 30 32 34 V Cutoff operating supply current (Vcc pin) I VCC Tj=25˚C Charge current (CS pin) ISO CS2 VCS=6.5V –0.5 –0.9 Item Symbol Test condition Min. OFF-to-ON threshold voltage VCC ON Tj=25˚C 15.5 ON-to-OFF threshold voltage VCC OFF Tj=25˚C 8.5 Hysteresis VHYS Tj=25˚C 6.8 Item Symbol Test condition Min. L-level output Voltage VOL IO=100mA H-level output Voltage VOH IO= –100mA, VCC=18V 13 mA –1.4 mA Typ. Max. Unit 16.5 17.5 V 9.0 10.0 V 7.5 8.2 V Undervoltage lockout circuit section Output section 15 Typ. Max. Unit 0.7 1.5 V 16.5 V Rise time tr OUT=1000pF 50 ns Fall time tf OUT=1000pF 40 ns Item Symbol Test condition Standby current ICC STB VCC=14V Startup current ICC ST VCC=VCCON Operating-state supply current ICC OP OFF-state supply current ICCOF Cutoff-state supply current ICCL Overall device Min. Typ. Max. Unit 2 µA 12 30 µA No load 1.9 2.5 VCC=17V, Cs=0V 100 VCC=10V 45 mA µA 100 µA 61 FA3641P(N), FA3647P(N) ■ Characteristic curves (Ta=25˚C) Oscillation frequency (fosc) vs. timing resistor resistance (RT) Oscillation frequency (fosc) vs. supply voltage (Vcc) 105 1000 104 103 fosc [kHz] fosc [kHz] 102 100 101 100 99 98 97 VCC = 18V FB = 1.5V 96 10 1 95 10 1000 100 10 OUT = No load Rt = 47 kΩ FB = Open, CS = 3V 15 Rt [kΩ] 20 25 30 Vcc [V] Oscillation frequency (fosc) vs. L-level output vltage (VOL) vs. supply voltage (Vcc) junction temperature (Tj) 105 104 1 Rt = 47kΩ FB = 2.5V 0.8 103 0.6 VOL [V] fosc [kHz] 102 101 0.4 100 99 0.2 Io = 100 mA 98 97 –50 0 50 100 0 10 150 15 2 2 1.95 1.95 1.9 1.9 1.85 1.8 30 1.85 1.8 Rt = 47kΩ Vcc = 18V FB = 0V Rt = 47kΩ FB = 0V 15 20 Vcc [V] 62 25 Supply current (Icc) vs. junction temperature (Tj) Operating mode Icc [mA] Icc [mA] Supply current (Icc) vs. supply voltage (Vcc) Operating mode 1.75 10 20 Vcc [V] Tj [°C] 25 30 1.75 –50 0 50 Tj [°C] 100 150 FA3641P(N), FA3647P(N) Supply current (Icc) vs. supply voltage (Vcc) Latch mode Supply current (Icc) vs. supply voltage (Vcc) Latch mode 200 3000 2500 160 Icc [µA] Icc [µA] 2000 120 1500 80 1000 40 0 10 500 12 16 14 18 0 10 20 15 20 25 30 Vcc [V] Vcc [V] Supply current (Icc) vs. supply voltage (Vcc) OFF mode Supply current (Icc) vs. supply voltage (Vcc) OFF mode 200 3000 2500 160 Icc [µA] Icc [µA] 2000 120 80 1500 1000 40 500 0 10 12 16 14 18 0 10 20 15 Vcc [V] 20 25 30 Vcc [V] UVLO OFF-to-ON thrreshold voltage (Vcc on) vs. junction temperature (Tj) UVLO ON-to-OFF thrreshold voltage (Vcc off) vs. junction temperature (Tj) 1.7 9.2 16.8 16.6 Vcc off [V] Vcc on [V] 9.1 16.4 9 8.9 16.2 16 –50 0 50 Tj [°C] 100 150 8.8 –50 0 50 100 150 Tj [°C] 63 FA3641P(N), FA3647P(N) CS terminal current (Ics) vs. CS terminal voltage (Vcs) CS terminal current (Ics) vs. CS terminal voltage (Vcs) 20 50 FB = OV 15 40 10 30 Ics [µA] Ics [µA] FB = Open 5 20 0 10 –5 0 –10 0 2 6 4 10 8 –10 12 0 2 6 4 Vcs [V] 10 8 12 Vcs [V] CS terminal charge current (Ichg) vs. junction temperature (Tj) FB terminal source current (IFB) vs. FB terminal voltag (VFB) 0 –5 –100 –6 –300 –7 IFB [µA] Ichg [µA] –200 –8 –400 –500 –600 –9 Vcc =18V CS = 0V –10 –50 –700 0 100 50 –800 150 0 1 3 2 Tj [°C] 5 4 VFB [V] IS (+) terminal current (IIS (+)) vs. IS (+) terminal voltage (VIS (+)) FA3641 IS (–) terminal current (IIS (–)) vs. IS (–) terminal voltage (VIS (–)) FA3647 5 0 0 –0.1 IIS (–) [µA] IIS (+) [µA] –5 –0.2 –10 –15 –0.3 –20 –0.4 0 0.5 1 1.5 VIS (+) [V] 64 2 2.5 3 –25 –0.5 0 0.5 1 1.5 VIS (–) [V] 2 2.5 3 FA3641P(N), FA3647P(N) ■ Description of each circuit 1. Oscillator The oscillator generates a triangular waveform by charging and discharging the built-in capacitor. A desired oscillation frequency can be set by the value of the resistor connected to the RT pin (See Figure 1). The built-in capacitor voltage oscillates between about 3V and 1V, with almost the same charging and discharging gradients (Figure 2). You can set the desired oscillation frequency by changing the gradients using the resistor connected to the RT pin. (Large Rt = low frequency, small Rt = high frequency) The oscillation frequency is automatically lowered when output duty cycle is small (FB about 1.18V) in light load mode. For more information, see item 2, “Reducing oscillation frequency circuit in light-load mode.” The relationship between Rt and the fixed oscillation frequency is approximately given by: f0 [kHz] 4880 ..................................................... (1) Rt + 1.4 Rt [kΩ] 4880 f0 – 1.4 Fig. 1 Oscillator Fig. 2 Oscillator output .......................................... (2) fO: Fixed frequency [kHz] Rt: Timing resistance [kΩ] The oscillator waveform cannot be observed from the outside because a pin for this purpose is not provided. The oscillator output is connected to a PWM comparator. The RT pin is 2.5V DC in normal fixed frequency operation mode. When the frequency is lowered, the voltage also decreases linearly to about 1V. 2. Reducing oscillation frequency circuit in light-load mode To reduce the loss of the power supply in standby mode, this IC has a feature that automatically lowers the oscillation frequency when the load is light. When the load is light, with the result that the IC output pulse width narrows below about 10% and the FB pin voltage decreases below about 1.18V, the oscillation frequency begins to decreases linearly until the output pulse width becomes 0. When the output pulse width is 0, the oscillation frequency is about 46% of normal fixed frequency (Figure 3). Even while the oscillation frequency is decreasing, the built-in capacitor voltage oscillates between about 3V and 1V. The frequency reduction rate (46%) can be adjusted from the outside. (See “Design advice” for more information.) 3. PWM comparator The PWM comparator has four inputs as shown in Figure 4. Oscillator output 햲 is compared with CS pin voltage 햳, FB pin voltage 햴, and DT voltage 햵. The lowest of three inputs 햳, 햴, and 햵 has priority and is compared with output 햲. While the voltage is lower than the oscillator output, the comparator output is high. While the voltage is higher than the oscillator output, the PWM comparator output is low (see Figure 5). The IC OUT pin voltage is high while the PWM comparator output is low. When the IC is powered up, CS pin voltage 햳 controls soft start operation. The output pulse then begins to widen gradually. During normal operation, the output pulse width is determined within the maximum duty cycle (70%) set by DT voltage 햵 under the condition set by FB pin voltage 햴, to stabilize the output voltage. Fig. 3 Oscillation frequency Fig. 4 PWM comparator Fig. 5 PWM comparator timing chart 65 FA3641P(N), FA3647P(N) 4. CS pin circuit As shown in Figure 6, capacitor Cs is connected to the CS pin. The CS pin voltage varies depending on the charging voltage of this capacitor Cs. When the power is turned on, the constant current source (6.5µA) begins to charge capacitor. Accordingly, the CS pin voltage rises as shown in Figure 7. The CS pin voltage is connected to the PWM comparator, which is characterized to make output based on the lowest of input voltages. The device enters soft-start mode while the CS pin voltage is between 1.0V and 2.4V. During normal operation, the CS pin is clamped at 4.0V by internal zener diode. If the output voltage drops due to an overload and the FB voltage rises to 3V or more, the clamp voltage 4.0V is canceled and the CS pin voltage rises to 9.5V. The CS pin is also connected to latch comparator C2. If the CS pin voltage rises to 8.5V or more, comparator C2 toggles to turn off the 5V REF circuit, thereby shutting the output down. Since the CS pin is also connected to comparator C1, the 5V REF circuit can be turned off to shut the output down by dropping the CS pin voltage below 0.68V. In this way, comparator C1 can be used for output on-off control. As explained above, the CS pin can be used for soft-start, overload output shutdown, and output on-off control by varying the voltage. Further details on the above three major functions of the CS pin are given below. 4.1 Soft start function Figure 8 shows the soft start circuit. Figure 9 is a soft-start operation timing chart. The CS pin is connected to capacitor Cs. When the power is turned on, the constant current source (6.5µA) begins to charge the capacitor. As shown in the timing chart, the CS pin voltage rises slowly in accordance with the capacitor Cs charging current. The CS pin is also connected to the IC internal PWM comparator, which has such characteristics that the voltage is determined to output on the basis of the lowest of input voltages. The comparator output pulse slowly widens to cause a soft start as shown in the timing chart. The soft start period can be approximately estimated by the period tS, from the time the IC is activated to the time the output pulse width widens to 30%. The period is given by the following equation: Fig. 6 CS pin circuit Fig. 7 CS pin waveform ts [ms] 250 Cs ...................................................... (3) Cs : Soft start capacitor [µF] Fig. 8 Soft-sart circuit Fig. 9 Soft-sart timing chart 66 FA3641P(N), FA3647P(N) 4.2 Overload shutdown function Figure 10 shows the overload shutdown circuit, and Figure 11 is a timing chart that illustrates overload shutdown operation. If the output voltage drops due to an overload or short circuit, the FB pin output voltage rises. If the FB pin voltage exceeds the reference voltage (3.0V) of comparator C3, the output of comparator C3 goes low to turn off the switch. With the switch off, the CS pin voltage clamped at 4.0V by zener diode in normal operation is unclamped, and the constant current source (6.5µA) begins to charge capacitor Cs again and the CS pin voltage rises. When the CS pin voltage exceeds the reference voltage (8.5V) of comparator C2, the output of comparator C2 toggles to turn off the 5V REF circuit. The IC then enters the latched mode and shuts down the output. IC current consumption for shutdown is 45µA (typ) (Vcc = 10V). This current must be supplied through the startup resistor. The IC enters output off (low voltage) state. The overload shutdown operation can be reset by lowering the supply voltage Vcc to below the OFF threshold voltage (9.0V) or forcing the CS pin voltage below 7.9V. Fig. 10 Overload shutdown circuit The period tOL from the time the output is short-circuited to the time the output circuit goes off is given by the following equation: tOL [ms] 690 Cs .................................................. (4) Cs: Soft start capacitor [µF] When you want to disable the overload shutdown function, see item 11 in “Design advice” 4.3 Output ON/OFF control function The IC can be turned on or off via an external signal applied to the CS pin. Figure 12 shows the output on/off control circuit, and Figure 13 is a timing chart. The IC is turned off when the CS pin voltage is externally made to drop below 0.68V (typ). The output of comparator C1 goes high to turn the 5V REF circuit. This shuts the output down. The IC enters output off (low voltage) state. Required IC current consumption during shutdown is 100µA (typ) (Vcc = 17V). This current must be supplied through the startup resistor. The IC goes on when the CS pin is opened and the CS pin voltage exceeds 0.82V (typ). This turns on the 5V REF circuit and results in automatic soft start. The power supply then restarts operation. Fig. 11 Overload shutdown timing chart Fig. 13 Output ON/OFF control circuit timing chart Fig. 12 External output ON/OFF control circuit 67 FA3641P(N), FA3647P(N) 5. Overcurrent limiting circuit The overcurrent limiting circuit detects the peak value of every drain current pulse (pulse by pulse method) of the main switching MOSFET to limit the overcurrent. The detection threshold voltage is +0.235V for FA3641 or –0.168V for FA3647 with respect to the ground as shown in Figure 14. The drain current of the MOSFET is converted to voltage by resistor Rs and fed to the IS pin of the IC. If the voltage exceeds the reference voltage +0.235V (FA3641) or –0.168V (FA3647) of comparator C4, comparator C4 works to set flipflop output Q to high. The output is immediately turned off to shut off the current. Flip-flop output Q is reset on the next cycle to turn on the output again. This operation is repeated to limit the overcurrent. If the overcurrent limiting circuit malfunctions due to noise, place an RC filter between the IS pin and MOSFET as shown in Figure 14. (See item 14 in “Design advice.”) Figure 15 is a timing chart that illustrates overcurrent-limiting operations. 6. Vcc overvoltage protection circuit The IC contains a Vcc overvoltage protection circuit to protect the IC from damage by overvoltage. Figure 16 shows the overvoltage protection circuit. Figure 17 is a timing chart that illustrates overvoltage protection operations. Overvoltage is detected if the supply voltage Vcc rises to 32V (Icc = 13mA) or more and current flows in the built-in zener diode. The output of comparator C5 then goes high and the constant current source (0.9mA) raises the CS pin voltage. When the CS pin voltage exceeds 8.5V, the output of comparator C2 goes high to turn off the 5V REF circuit. The IC then enters the latched mode and the IC output is put in the off (low voltage) state. When latched mode, the IC current consumption is 45µA (typ) (Vcc = 10V). This current must be supplied through the startup resistor. The overvoltage shutdown operation can be reset by lowering the supply voltage to below 9.0V or forcing the CS pin voltage below 7.9V. (When you want to enable Vcc overvoltage shutdown at a desired voltage, see item 7 in “Design advice.” Fig. 14 Overcurrent limiting circuit Fig. 15 Overcurrent timing chart Fig. 16 Overvoltage shutdown circuit 68 Fig. 17 Overvoltage shutdown timing chart FA3641P(N), FA3647P(N) 7. Undervoltage lockout circuit (U.V.L.O.) The IC incorporates a circuit that prevents the IC from malfunctioning when the supply voltage drops. When the supply voltage is raised from 0V, the IC starts operation with Vcc = 16.5V (typ). If the supply voltage drops, the output is shut down when Vcc = 9.0V (typ). When the undervoltage lockout circuit operates, the outputs of the OUT and CS pins go low to reset the IC. 8. Output circuit The IC contains a push-pull output stage and can directly drive the MOSFET. The maximum peak current of the output stage is a sink current of 1A and a source current of 0.5A. If the circuit operation stops when the undervoltage lockout circuit operates, the OUT pin voltage goes low to shut down the MOSFET. Fig. 18 Oscillator circuit ■ Design advice 1. Externally setting the oscillation frequency in the lightload mode As explained in item 2 in “Description of each circuit,” the IC has a function that automatically lowers the oscillation frequency when the load is light, to reduce the loss of the power supply in standby mode. The oscillation frequency goes down to about 46% without adjustment by external circuit. To further lower the frequency to below 46%, connect adjustment resistor Rr between the RT and REF pins as shown in Figure 18. Then the fixed frequency determined by Rt also falls. The relationship between the external resistance and oscillation frequency is outlined below: Rt [kΩ] 2.35 2.35 ............................ (5) Rr [kΩ] 3.35A – B A–B f0 [kHz] 4880 2500 fr [kHz] ....... (6) RtRr RtRr + 1.4 +6 Rr – Rt Rr – 3.35Rt fO: Fixed frequency [kHz] fr: Minimum frequency in variable mode [kHz] Rt: Timing resistance [kΩ] Rr: Adjustment resistance [kΩ] f0 fr B= 4880 – 1.4f0 2500 – 6fr Select Rt and Rr so that the relationship between the two satisfies the following: A= • Rt < 0.3 Rr .................................................................... (7) • Set the minimum frequency in light-load mode to 10 kHz or more. Failure to keep the above relationship may disturb the operation. Note that the above expressions determine approximate values. Note also that the minimum frequency in light-load mode depends on such conditions as the power supply efficiency. Therefore, check the operation using a practical circuit to make a final decision. Calculation example To set the fixed frequency fO = 100kHz and minimum frequency in light-load mode to fr = 20kHz, the following can be obtained from expressions (5). Rt 37.7 [kΩ] Rr 185.1 [kΩ] Decrease Rr to permit the frequency to vary in a wider range. 69 FA3641P(N), FA3647P(N) 2. Deciding the startup circuit These ICs, which use CMOS process, consume less current, and therefore can use larger startup resistance than the conventional bipolar type of IC. To decide the startup resistance, the following conditions must be satisfied: (a) The IC is started when the power is turned on. (b) The IC consumption current is supplied during latch mode operation to maintain the latch state. (c) The IC consumption current is supplied during the off state under the on/off function to maintain the off state. However, these are the minimum conditions for using the IC. The startup time required for the power supply must also be decided on. 2.1 Connecting a startup resistor before rectification (AC line) When the startup resistor is connected before rectification (AC line) as shown in Figure 19, the voltage applied to the startup resistor forms a half-wave rectified waveform of the AC input voltage. Startup resistor R1 must satisfy the three equations shown below. Select a smaller-side value for R1 in consideration of the temperature characteristics. Fig. 19 Startup circuit (1) (a) To supply startup current 30µA at ON threshold voltage 17.5V (max.) of UVLO: R1 [kΩ] < 2 Vac – 17.5 ........................................ (8) π 0.03 (b) To supply IC consumption current 100µA (max.) (Vcc =10V) in latch mode: R1 [kΩ] < 2 Vac – 10 π 0.1 ....................................... (9) (c) To supply IC consumption current 200µA (max.) (Vcc =17V) in the off state under the on/off function: R1 [kΩ] < 2 Vac – 17 π 0.2 Fig. 20 Startup circuit (2) ...................................... (10) R1: Startup resistance [kΩ] Vac: Effective value of AC input voltage [V] If neither the latch mode operation nor the on/off functions are used, only the expression in (8) needs to be satisfied. In this method, the supply current to the IC via the start-up resistor is stopped when AC input is shut down. Therefore, after latch mode operation, shutting the AC input down resets the latch mode in a very short period of time. 2.2 Connecting the startup resistor after rectification (DC line) When the startup resistor is connected after rectification (DC line) as shown in Figure 20, the voltage applied to the startup resistor becomes the peak value of the AC input voltage. Startup resistor R1 must satisfy the three equations shown below. Select a smaller-side value for R1 in consideration of temperature characteristics. (a) To supply startup current 30µA at ON threshold voltage 17.5V (max.) of UVLO: R1 [kΩ] < 70 2 Vac – 17.5 0.03 .................................. (11) FA3641P(N), FA3647P(N) (b) To supply IC consumption current 100µA (max.) (Vcc =10V) in latch mode: R1 [kΩ] < 2 Vac – 10 0.1 When the capacitor value is adequate ................................... (12) (c) To supply IC consumption current 200µA (max.) (Vcc = 17V) in the off state under the on/off function: R1 [kΩ] < 2 Vac – 17 0.2 ................................... (13) R1: Startup resistance [kΩ] Vac: Effective value of AC input voltage [V] If neither the latch nor the on/off functions are used, only the expression in (11) needs to be satisfied. In this method, after latch mode operation, smoothing capacitor C1 in the main circuit supplies current to the IC via the startup resistor even if the AC input is shut down. Therefore, some time must elapse before the latch mode is reset. Fig. 21 Vcc voltage at startup with an adequate capacitor When the capacitor value is inadequate 3. Determining the Vcc capacitor value To properly start the power supply, a certain value is required for the capacitor connected to the VCC pin. Figure 21 shows the Vcc voltage at start-up when a proper value is given to the capacitor. When the input power is turned on, the capacitor connected to the VCC pin is charged via the startup resistor and the voltage increases. The IC is then in standby state and almost no current is consumed. (Icc < 2µA) Thereafter, Vcc reaches the ON threshold voltage of UVLO and the IC begins operation. When the IC begins operation to make output, the IC operates based on the voltage from the auxiliary winding. When the IC is just starting up, however, it takes time for the voltage from the auxiliary winding to rise enough, and Vcc drops during this period. Determine the Vcc capacitor value so that Vcc will not drop down to the OFF threshold voltage of UVLO during this period. If the Vcc capacitor value is too small, Vcc will drop to the OFF threshold voltage of UVLO before the auxiliary winding voltage rises enugh. If so, Vcc repeatedly goes up and down between the UVLO threshold voltages, and the power supply cannot start up. (Figure 22) Fig. 22 Vcc voltage at startup with an inadequate capacitor Fig. 23 Startup circuit (3) 4. Shortening the startup period Increasing the resistance of the startup resistor to reduce loss prolongs the startup period. Figure 23 shows a circuit for shortening the startup period. The C2 capacitance is decreased to shorten the startup period and, after the IC starts up, power is supplied from C3. 5. Setting soft start period and OFF latch delay independently Figure 24 shows a circuit for setting the soft start period and OFF latch delay independently. In this circuit, capacitance CS determines the soft start period, and capacitance CL determines the OFF latch delay. If the overload shutdown or overvoltage shutdown functions raise the CS pin voltage to around 5V, zener diode Zn becomes conductive to charge capacitor CL. The OFF latch delay can be thus prolonged by capacitance CL. Fig. 24 Independent setting of soft start period and OFF latch delay 71 FA3641P(N), FA3647P(N) 6. Overvoltage protection using the VCC pin These ICs contain an overvoltage protection function detecting the Vcc voltage using internal ZD (See item 6 in “Description of each circuit”). If Vcc voltage exceed about 32V, the current of 13mA flows through the internal ZD and the overvoltage protection function operates. After this protection function operates, the IC continues to consume the large current if high voltage continues to be applied to the Vcc pin. Mind that total IC loss does not exceed the rating. If the voltage source applied to Vcc pin has relatively high impedance and cannot supply the current of 13mA, overvoltage protection function does not operate. But the internal ZD maintains the Vcc voltage 32V or less and protects the IC. 7. Overvoltage protection using CS pin These ICs contain the overvoltage protection function detecting Vcc voltage. However, the threshold voltage is fixed. Adding a circuit to CS pin enables the overvoltage protection detecting desired voltage. 7.1 Detecting on secondary side Figure 25 shows the overvoltage shutdown circuit based on the signal from the secondary side. The optocoupler output transistor is connected between the CS and Vcc pins. When the output voltage is put in the overvoltage state, the optocoupler output transistor goes on to raise the CS pin voltage via resistor R2. When the CS pin voltage exceeds the reference voltage (8.5V) of comparator C2, the output of the comparator C2 goes high to turn off the 5V REF circuit. Accordingly, the IC enters the OFF latch mode and shuts the output down. The IC consumes current 45µA (typ) (Vcc = 10V) in latch mode. This current must be supplied via startup resistor R1. Fig. 25 Overvoltage shutdown circuit (1) Fig. 26 Overvoltage shutdown circuit (2) The overvoltage protection circuit can be reset by lowering the supply voltage Vcc to below 9.0V or forcing the CS pin voltage below 7.9V. In normal operation, the CS pin voltage is clamped by the 4V zener diode with maximum sink current 50µA . Therefore, to raise the CS pin voltage to 8.5V or more, 50µA or a higher current needs to be supplied from the optocoupler. Set the current input to the CS pin to 1mA or less. 7.2 Detecting on primary side (detecting Vcc voltage) To attain overvoltage protection, the CS pin voltage is forcibly raised from outside the IC until it exceeds the reference voltage (8.5V) of the internal comparator C2. When the reference voltage is exceeded, the IC enters latch mode and shuts the output down. Connect a zener diode (ZD) and resistor between the Vcc and CS pins as shown in Figure 26. When the Vcc voltage exceeds about ZD voltage + 8.5V, the ICs enter the OFF latch mode and shut the output down. If Vcc remains high even after shutdown and current is input to the CS pin, set the current to 1mA or lower. Set the zener voltage of the ZD connected to the CS pin higher than the UVLO ON threshold voltage. Startup is disabled below this voltage. Figure 27 shows another circuit for enabling latch mode shutdown by detecting a desired Vcc voltage using the CS pin. In this circuit, overvoltage shutdown works when the Vcc voltage is about the same as the ZD voltage. For this circuit also, use a ZD voltage higher than the UVLO ON threshold voltage. Set the current flowing into the CS pin to 1mA or lower. 72 Fig. 27 Overvoltage shutdown circuit (3) FA3641P(N), FA3647P(N) 8. Feedback pin circuit Figure 28 gives an example of connection in which a feedback signal is input to the FB pin. If this circuit causes power supply instability, connect R3 and C4 as shown in Figure 28 to decrease the frequency gain. Set R3 between several tens of ohms to several kilohms and C4 between several thousand picofarads to one microfarad. Be especially careful in light load mode, in which the frequency drops, thereby increasing the probability of power supply instability being triggered. 9. REF characteristics If noise is applied to the VCC pin from the outside, it may appear at the REF pin without attenuation depending on the noise frequency. The noise causes no problems in normal IC operation, but must be taken into consideration when the REF voltage is used for an external circuit. If the noise appearing at the REF pin causes any problems, use the REF pin as shown in Figure 29. 10. Simple voltage control on the primary side In a flyback type power supply, the output voltages of the power supply and auxiliary winding are almost proportional to the number of winding turns of the transformer. This characteristic can be used in the circuit shown in Figure 30, where the output voltage can easily be made constant by detecting the voltage of the auxiliary winding voltage. However, this is an easy output voltage control method, and the output voltage precision and regulation are therefore not as good. To reduce output pulse width completely to 0%, the FB pin voltage must fall below 0.95V and R5 must be set below about 960Ω from the characteristics of the FB pin voltage and source current. When using this method, also keep in mind the characteristics of REF in item 9. 11. Disabling the overload shutdown function As shown in Figure 31, connect a 8.2kΩ resistor R6 between the FB pin and the ground. The FB pin voltage then does not rise sufficiently high to reach the shutdown threshold voltage when an overload occurs so that IC does not enter OFF latch mode. Even with this connection, the overvoltage shutdown function is available. Since resistor R6 limits the upper voltage of the FB pin, the maximum duty cycle may be limited to about 65%, if a 5% precision resistor is used. To not limit the maximum duty cycle, use a 2% or better-precision resistor for R6. Fig. 28 FB pin circuit Fig. 29 REF pin circuit Fig. 30 Simple voltage control circuit 12. Polarities for overcurrent detecting and their characteristics The FA3641 uses positive polarity detection for overcurrent limiting (number 3 pin of IS pin) and the FA3647 uses negative polarity detection. The characteristics of positive and negative polarity detection are summarized below. Select one in accordance with the circuit used. (See item 5 in “Description of each circuit.”) Positive detection (FA3641) • Wiring is easy because the ground can be shared by the main circuit and IC peripherals. • It is easy to correct the overload detecting current, which is used to detect overload, against the input voltage. Fig. 31 Disabling overload shutdown function Negative detection (FA3647) • The MOSFET drive current does not flow to the current detection resistor and therefore it hardly affects overcurrent detection. 73 FA3641P(N), FA3647P(N) 13. Correcting overload detection current (FA3641 only) If the power supply output is overloaded, the IC overcurrent limiting function restricts the output power and the overload shutdown function stops the IC. The output current when an overload occurs varies depending on the input voltage; the higher the input voltage, the more the overload detection current may increase. If any problems occur as a result of the appearance of this symptom, connect resistor R8 between current detection resistor Rs and the IS (+) pin and add resistor R7 for correction as shown in Figure 32. The standard resistance of R8 is several hundred ohms, and that of R7 is from several hundred kilohms to several megohms. Note that the above correction slightly lowers the output current when overload even where the input voltage is low. This correction is available only for the FA3641 that uses positive polarity for overcurrent detection. Fig. 32 Correcting overload detecting current circuit 14. Preventing malfunction caused by noise The IS pin for overcurrent limiting function detects the MOSFET current converted to the voltage. The parasitic capacitor and inductor of the MOSFET, transformer, wiring, etc. cause a noise in switching operation. If this switching noise causes a malfunction of overcurrent limitimg function, insert the RC filter into IS pin as shown in Figure 14. Also, connect a noise prevention capacitor (0.1µF or more) to the REF pin that outputs the reference voltage for each component. 15. Preventing malfunction caused by negative voltage applied to a pin When large negative voltage is applied to each IC pin, a parasitic element in the IC may operate and cause malfunction. Be careful not to allow the voltage applied to each pin to drop below –0.3V. Especially for the OUT pin, voltage oscillation caused after the MOSFET turns off may be applied to the OUT pin via the parasitic capacitance of the MOSFET, causing the negative voltage to be applied to the OUT pin. If the voltage falls below –0.3V, add a Schottky diode between the OUT pin and the ground. The forward voltage of the Schottky diode can suppress the voltage applied to the OUT pin. Use the low forward voltage of the Schottky diode. Similarly, be careful not to cause the voltages at other pins to fall below –0.3V. 16. Gate circuit configuration To adjust switching speeds or prevent oscillation at gate terminals, resistors are normally inserted between the power MOSFET gate terminal to be driven and the OUT pin of the IC. You may prefer to decide on the drive current independently, to turn the MOSFET on and off. If so, connect the MOSFET gate terminal to the OUT pin of the IC as shown in Figure 34. In the circuit shown in Figure 34, Rg1 and Rg2 restrict the current when the MOSFET is turned on, and only Rg1 restricts the current when it is turned off. 74 Fig. 33 Protection of OUT pin against the negative voltage Fig. 34 Gate circuit FA3641P(N), FA3647P(N) 17. Loss calculation IC loss must be confirmed to use the IC within the ratings. Since it is hard to directly measure IC loss, some examples of calculating approximate IC loss are given below. 17.1 Calculation example 1 Suppose the supply voltage is Vcc, IC current consumption is lccop, the total gate charge of the power MOSFET is Qg, and the switching frequency is fSW. Total IC loss Pd can be calculated by: Pd = Vcc (Iccop + Qg fsw) ................................ (14) This expression calculates an approximate value of Pd, which is normally a little larger than the actual loss. Since various conditions such as temperature characteristics apply, thoroughly verify the appropriateness of the calculation under all applicable conditions. Fig. 35 Output stage Example: When Vcc = 18V, lccop = 2.5mA (max.) is obtained from the specifications. Suppose Qg = 80nC and fsw = 100kHz. Pd 18V (2.5mA + 80nC 100kHz) = 189mW 17.2 Calculation example 2 The IC loss consists of the loss caused by operation of the control circuit and the loss caused at the output circuit to drive the power MOSFET. (1) Loss at the control circuit The loss caused by operation of the IC control circuit is calculated by the supply voltage and IC current consumption. When the supply voltage is Vcc and IC current consumption is lccop, loss Pop at the control circuit is: Pop = Vcc Iccop ....................................................... (15) Example: When Vcc = 18, lccop = 1.9mA (typ) is obtained from the specifications. The typical IC loss is given by: Pop = 18V 1.9mA = 34.2mW (2) Loss at the output circuit The output circuit of the IC is a MOSFET push-pull circuit. When the ON resistances of MOSFETs making up the output circuit are Ron and Roff, the resistances can be determined as shown below based on Vcc = 18V and Tj = 25˚C obtained from the output characteristics included in the specifications: Ron = 15Ω (typ) Roff = 7Ω (typ) When the total gate charge of the power MOSFET is Qg, the switching frequency is fSW, the supply voltage is Vcc, and gate resistance is Rg, the loss caused at the IC output circuit is given by: Pdr = ( 1 Ron Roff Vcc Qg fsw 2 Rg Ron Rg Roff ) ....... (16) 75 FA3641P(N), FA3647P(N) When gate resistance differs between ON and OFF as shown in Figure 36, the loss is given by: Pdr = 1 Ron Roff VccQgfsw 2 Rg1Rg2Ron Rg1Roff ( ) ... (17) Example: When Vcc = 18V, Qg = 80nC, fsw = 100kHz, and Rg = 10Ω, the typical IC loss is given by: Pdr = 1 15Ω 7Ω 18V 80nC 100kHz 2 10Ω 15Ω 10Ω 7Ω ( ) =72.8mW Fig. 36 Gate circuit (3) Total loss The total loss (Pd) of the IC is the sum of the control circuit loss (Pop) and the output circuit loss (Pdr) calculated previously: Pd = Pop + Pdr .............................................................. (18) Example: The standard IC loss under the conditions used in (1) and (2) above are: Pd = Pop + Pdr = 34.2mW + 72.8mW = 107mW 76 FA3641P(N), FA3647P(N) ■ Application circuit FA3641 FA3647 Parts tolerances characteristics are not defined in the circuit design sample shown above. When designing an actual circuit for a product, you must determine parts tolerances and characteristics for safe and economical operation. 77 FA3641P(N), FA3647P(N) ■ Electrical characteristics of application circuit Input power vs. input voltage Input power vs. output power Condition:No-load 10 0.6 0.4 Input power [W] Input power [W] 0.5 0.3 0.2 1 230V AC 100V AC 0.1 0 0 50 100 150 200 250 300 Input voltage [Vac] 90 Oscillation frequency [kHz] 80 100V AC 60 50 230V AC 40 30 20 10 0 0 10 20 30 40 Output power [W] 78 0.1 1 Output power [W] Oscillation frequency vs. output power 70 0.1 0.01 50 60 10