UMS CHR3362-QEG21 10-16ghz integrated down converter Datasheet

CHR3362-QEG
RoHS COMPLIANT
10-16GHz Integrated Down Converter
GaAs Monolithic Microwave IC in SMD leadless package
Description
The CHR3362-QEG is a multifunction
monolithic circuit, which integrates a
balanced cold FET mixer, a LO buffer and a
RF LNA including gain control.
It is designed for a wide range of
applications, typically ISM and commercial
communication systems.
The circuit is manufactured with a pHEMT
process, 0.25µm gate length, via holes
through the substrate, air bridges and
electron beam gate lithography.
It is supplied in RoHS compliant SMD
package.
UMS
R3362
YYWW
Main Features
Gain versus attenuation
18
■ Broadband RF performance 10-16GHz
■ 13dB conversion gain
■ 2dBm Input IP3
■ 9dB Gain Control
■ 15dBc Image Rejection
■ 24LQFN4x5 – MSL1
■ ESD protected
16
Conversion Gain (dB)
14
12
10
8
6
4
2
GC=-1,5V
GC=-0,7V
GC=-0,6V
GC=-0,5V
GC=-0.3V
GC=0V
0
8
9
10
11
12
13
14
15
16
17
18
RF Frequency (GHz)
Main Characteristics
Tamb.= +25°C
Symbol
Parameter
FRF
RF Frequency range
FLO
LO Frequency range
FIF
IF Frequency range
Gc
Conversion gain
Ref. : DSCHR3362-QEG1192 - 11 Jul 11
Min
10
6.5
DC
Typ
13
1/16
Max
16
19.5
3.5
Unit
GHz
GHz
GHz
dBm
Specifications subject to change without notice
United Monolithic Semiconductors S.A.S.
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Tel.: +33 (0) 1 69 33 03 08 - Fax: +33 (0) 1 69 33 03 09
CHR3362-QEG
10-16GHz Integrated Down Converter
Main Characteristics
Tamb.= +25°C
Symbol
Parameter
FRF
RF frequency range
FLO
LO frequency range
FIF
IF frequency range
CG
Conversion gain@ min. attenuation (1)
∆G
Gain control range
NF
Noise Figure@ min. attenuation, for IF>0.1GHz
Im_rej
Image rejection (1)
PLO
LO Input power
IIP3
Input IP3@ at Gc max.
LO RL
LO Return Loss
RF RL
RF Return Loss
VD, VDL DC drain voltage
IDL
LNA current
ID
LO Buffer current
VG2, 3
LNA DC gate voltage
B
LO Buffer DC gate voltage
IB
LO Buffer DC gate current
GC
Gain control DC voltage
Min
10
6.5
DC
Typ
Max
16
19.5
3.5
13
9
3.2
15
0
2
-12
-12
4.0
180
130
-0.3
-3
-7
-1.5
0
Unit
GHz
GHz
GHz
dB
dB
dB
dBc
dBm
dBm
dB
dB
V
mA
mA
V
V
mA
V
(1)
An external combiner 90° is required on I / Q
These values are representative of on-board measurements.
Note: Id is not affected by GC.
Electrostatic discharge sensitive device, observe handling precautions!
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Specifications subject to change without notice
CHR3362-QEG
10-16GHz Integrated Down Converter
Absolute Maximum Ratings (1)
Tamb.= +25°C
Symbol
Parameter
VD, VDL
Maximum drain bias voltage
Id_total
Maximum drain bias current
VGL
LNA DC gate voltage
B
Buffer, Mixer DC gate voltage
GC
Gain control voltage
P_RF
Maximum peak input power overdrive
P_LO
Maximum LO input power
Tch
Maximum channel temperature
Ta
Operating temperature range
Tstg
Storage temperature range
Values
4.5
420
-2.0 to +0.4
-4
-2.5 to + 0.8
10
5
175
-40 to +85
-55 to +125
Unit
V
mA
V
V
V
dBm
dBm
°C
°C
°C
(1)
Operation of this device above anyone of these parameters may cause permanent
damage.
Typical Bias Conditions
Tamb.= +25°C
Symbol
Pad No
VDL, VD
10, 11
IDL
10
VG2, 3
8, 9
B
12
GC
7
Parameter
DC drain voltages
LNA current controlled with VG2, 3
LNA DC gate voltage
Buffer DC gate voltage
Gain control DC voltage
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Values
4
190
-0.3
-3
-1.5 to 0
Unit
V
mA
V
V
V
Specifications subject to change without notice
CHR3362-QEG
10-16GHz Integrated Down Converter
Device thermal performances
All the figures given in this section are obtained assuming that the QFN device is cooled
down only by conduction through the package thermal pad (no convection mode considered).
The temperature is monitored at the package back-side interface (Tcase) as shown below.
The system maximum temperature must be adjusted in order to guarantee that Tcase
remains below than the maximum value specified in the next table. So, the system PCB must
be designed to comply with this requirement.
A derating must be applied on the dissipated power if the Tcase temperature can not be
maintained below than the maximum temperature specified (see the curve Pdiss. Max) in
order to guarantee the nominal device life time (MTTF).
DEVICE THERMAL SPECIFICATION : CHR3362-QEG
Recommended max. junction temperature (Tj max)
:
170
Junction temperature absolute maximum rating
:
175
Max. continuous dissipated power (Pdiss. Max.)
:
1.2
=> Pdiss. Max. derating above Tcase(1)= 85
°C :
15
Junction-Case thermal resistance (Rth J-C)(2)
:
<68
Minimum Tcase operating temperature(3)
:
-40
Maximum Tcase operating temperature(3)
:
85
Minimum storage temperature
:
-55
Maximum storage temperature
:
150
°C
°C
W
mW/°C
°C/W
°C
°C
°C
°C
(1) Derating at junctio n temperature co nstant = Tj max.
(2) Rth J-C is calculated fo r a wo rst case co nsidering the ho t t e s t junc t io n o f the M M IC and all the devices biased.
(3) Tcase=P ackage back side temperature measured under the die-attach-pad (see the drawing belo w).
1.4
1
0.8
0.6
0.4
0.2
Pdiss. Max. @Tj <Tj max (W)
0
-50
-25
0
25
50
75
100
125
150
175
Pdiss. Max. @Tj <Tj max (W)
1.2
Tcase
Example: QFN 16L 3x3
Location of temeprature
reference point (Tcase)
on package's bottom side
Tcase (°C)
6.1
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CHR3362-QEG
10-16GHz Integrated Down Converter
Typical Measured Performances (1)
Tamb = +25°C, VD=VDL= 4V, VG2=VG3= -0.3V, VGM = -0.7V, P_LO = 0dBm
Board losses de-embedded (result given on package access planes)
Conversion Gain versus RF & IF Frequencies
RF = LO+ IF, GC = -1.5V & 0V
18
16
Conversion Gain (dB)
14
12
10
8
att. min. @2GHz
att. max. @2GHz
att.min. @3.5GHz
att. max. @3.5GHz
6
4
2
0
8
9
10
11
12
13
14
15
16
17
18
RF Frequency (GHz)
(1)
If no specific mention, the following values are representative of onboard measurements
(on connector access planes) as defined on the drawing at paragraph Evaluation mother
board. The board losses are estimated from 0.8 to 1.2dB in the frequency range.
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CHR3362-QEG
10-16GHz Integrated Down Converter
Typical Measured Performances
Tamb = +25°C, VD=VDL= 4V, VG2=VG3= -0.3V, VGM = -0.7V, P_LO = 0dBm
Board losses de-embedded (result given on package access planes)
Conversion Gain in Supradyne Mode versus RF Frequency & GC
RF = LO+ IF, IF = 2GHz
18
16
Conversion Gain (dB)
14
12
10
8
6
4
2
GC=-1,5V
GC=-0,7V
GC=-0,6V
GC=-0,5V
GC=-0.3V
GC=0V
0
8
9
10
11
12
13
14
15
16
17
18
RF Frequency (GHz)
Conversion Gain in infradyne Mode versus RF Frequency & GC
RF = LO- IF, IF = 2GHz
18
16
Conversion Gain (dB)
14
12
10
8
6
4
2
GC=-1,5V
GC=-0,7V
GC=-0,6V
GC=-0,5V
GC=-0.3V
GC=0V
0
8
9
10
11
12
13
14
15
16
17
18
RF Frequency (GHz)
Ref. : DSCHR3362-QEG1192 - 11 Jul 11
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Specifications subject to change without notice
CHR3362-QEG
10-16GHz Integrated Down Converter
Typical Measured Performances
Tamb = +25°C, VD=VDL= 4V, VG2=VG3= -0.3V, VGM = -0.7V, P_LO = 0dBm
Board losses de-embedded (result given on package access planes)
Noise Figure versus Frequency
RF = LO+/- IF, IF = 2GHz, GC = -1.5 & 0V
10
9
8
Noise Figure (dB)
7
6
5
4
3
2
[email protected].
[email protected].
1
[email protected].
[email protected].
0
8
9
10
11
12
13
14
15
16
17
18
RF Frequency (GHz)
Return loss versus Frequency
GC = -1.5V
0
Return loss (dB)
-5
-10
-15
-20
-25
RF return loss
LO return loss
-30
0
5
10
15
20
Frequency (GHz)
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CHR3362-QEG
10-16GHz Integrated Down Converter
Typical Measured Performances
Tamb = +25°C, VD=VDL= 4V, VG2=VG3= -0.3V, VGM = -0.7V, P_LO = 0dBm
Board losses de-embedded (result given on package access planes)
Image Rejection versus frequency
RF = LO+/- IF, IF = 2GHz, GC = -1.5V
35
30
Image Rejection (dB)
25
20
15
10
5
Channel I @FI=2GHz
Channel Q @FI=2GHz
0
8
9
10
11
12
13
14
RF Frequency (GHz)
15
16
17
18
17
18
Image Rejection versus Frequency
RF = LO+/- IF, IF = 3.5GHz, GC = -1.5V
35
30
Image Rejection (dB)
25
20
15
10
5
Channel I @FI=3.5GHz
Channel Q @FI=3.5GHz
0
8
9
10
Ref. : DSCHR3362-QEG1192 - 11 Jul 11
11
12
13
14
RF Frequency (GHz)
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15
16
Specifications subject to change without notice
CHR3362-QEG
10-16GHz Integrated Down Converter
Typical Measured Performances
Tamb = +25°C, VD=VDL= 4V, VG2=VG3= -0.3V, VGM = -0.7V, P_LO = 0dBm
Board losses de-embedded (result given on package access planes)
Input IP3 versus Freq. at GC = -1.5V
IMD3 versus Freq. at GC = -1.5V
16
80
14
75
70
12
65
10
IMD3 (dBc)
Input IP3 (dBm)
60
8
6
4
55
50
45
2
40
0
35
30
-2
10GHz
-4
10GHz
13GHz
13GHz
20
-6
-30
-28
-26
-24
-22
-20
-18
-30
-16
-28
-26
-24
-22
-20
-18
-16
Input Power DCL (dBm)
Input Power DCL (dBm)
Input IP3 versus GC at 16GHz
Input IP3 vs temperature at 10GHz
16
6
14
5
12
4
3
10
2
8
Input IP3 (dBm)
Input IP3 (dBm)
16GHz
25
16GHz
6
4
2
1
0
-1
-2
0
-3
-2
85°C;-1.5V
85°C;-0.6V
-4
-4
-1.5V
-0.7V
-0.6V
-0.5V
-0.3V
25°C;-1.5V
25°C;-0.6V
-40°C;-1.5V
-40°C;-0.6V
-5
0V
-6
-6
-30
-28
-26
-24
-22
-20
-18
-16
-30
Input Power DCL (dBm)
Ref. : DSCHR3362-QEG1192 - 11 Jul 11
-28
-26
-24
-22
-20
-18
-16
Input Power DCL (dBm)
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CHR3362-QEG
10-16GHz Integrated Down Converter
Typical Measured Performances
Tamb = +25°C, Tcold = -40°C, Thot = +85°C
VD=VDL= 4V, VG2=VG3= -0.3V, VGM = -0.7V, P_LO = 0dBm
Board losses de-embedded (result given on package access planes)
Conversion Gain vs Temperature
IF = 2GHz, GC = -1.5V & 0V
Conversion Gain vs Temperature
IF = 3.5GHz, GC = -1.5V & 0V
18
18
Gain max
Gain max
16
16
14
Conversion Gain (dB)
Conversion Gain (dB)
14
12
10
8
Gain min
6
4
12
10
85°C
-40°C
6
4
2
85°C
-40°C
2
25°C
0
Gain min
0
8
9
10
11
12
13
14
15
16
17
18
8
9
10
11
12
RF Frequency (GHz)
9
8
8
7
7
Noise Figure (dB)
10
9
6
5
4
16
17
18
5
4
3
2
2
1
25°C
15
6
3
85°C
14
Noise figure vs Temperature
Infradyne, IF = 2GHz, GC = -1.5V
10
1
13
RF Frequency (GHz)
Noise figure vs Temperature
Supradyne, IF = 2GHz, GC = -1.5V
Noise Figure (dB)
25°C
8
85°C
-40°C
25°C
-40°C
0
0
8
9
10
11
12
13
14
15
16
17
18
8
9
10
11
12
13
14
15
16
17
18
RF Frequency (GHz)
RF Frequency (GHz)
Spurious on IF outputs
P_RF = -20dBm / P_LO = 0dBm @12GHz
mRF
0
nLO
2
1
3
0
Xx
12
9
22
1
26
24
>40
32
2
39
>40
37
>40
3
33
>40
>40
>40
4
>40
>40
>40
>40
All values in dBc below IF power level (IF = 1GHz).
Data measured without external hybrid coupler.
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4
>40
>40
>40
>40
>40
Specifications subject to change without notice
10-16GHz Integrated Down Converter
CHR3362-QEG
Package outline (1)
Matt tin, Lead Free
Units :
From the standard :
(Green)
mm
JEDEC MO-220
(VGGD)
25- GND
12345678-
Nc
Nc
Nc
Gnd(2)
RF in
Nc
GC
VG2
910111213141516-
VG3
VDL
VD
B
Nc
Nc
LO in
Gnd(2)
1718192021222324-
Nc
Nc
Nc
IF_I
Gnd(2)
IF_Q
Nc
Nc
(1)
The package outline drawing included to this data-sheet is given for indication. Refer to the
application note AN0017 (http://www.ums-gaas.com) for exact package dimensions.
(2)
It is strongly recommended to ground all pins marked “Gnd” through the PCB board.
Ensure that the PCB board is designed to provide the best possible ground to the package.
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Specifications subject to change without notice
CHR3362-QEG
10-16GHz Integrated Down Converter
Notes
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CHR3362-QEG
10-16GHz Integrated Down Converter
Notes
16 15
NC
NC
LO IN
17
GND
NC
19 18
NC
NC
Due to ESD protection circuits on RF input and output, an external capacitance might be
requested to isolate the product from external voltage that could be present on the RF
accesses.
14 13
IF_I
20
12
B
GND
21
11
VD
IF_Q
22
10
VDL
NC
23
9
VG3
NC
24
8
VG2
NC
5
6
7
GC
NC
4
NC
3
RF IN
2
GND
1
NC
NC
ESD protections are also implemented on gate and control accesses.
The DC connections do not include any decoupling capacitor in package, therefore it is
mandatory to provide a good external DC decoupling (10nF) on the PC board, as close as
possible to the package.
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CHR3362-QEG
10-16GHz Integrated Down Converter
DC Schematic
LO Amplifier and Mixer: 4V, 130mA; -3V, 7mA
VD
6
25 
1.8 k
x5
1.5 k
IF
I
50 mA
30 mA
LO
365 
855 
7 mA
1425 
300 
5
300 
390 
IF
Q
1425 
1.5 k
B
50 mA
LO amplifier
Mixer
LNA: 4V, 180mA
VDL
1615 
RF
40 
8
2
22 mA
66 mA
92 mA
47 
280 
300 
280 
200 
x2
2 k
x4
x2
800 
800 
800 
GC
VG3
VG2
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Specifications subject to change without notice
10-16GHz Integrated Down Converter
CHR3362-QEG
Evaluation mother board
■ Compatible with the proposed footprint.
■ Based on typically Ro4003 / 8mils or equivalent.
■ Using a micro-strip to coplanar transition to access the package.
■ Recommended for the implementation of this product on a module board.
■ Decoupling capacitors of 10nF ±10% are recommended for all DC accesses.
■ See application note AN0017 for details.
■ Hybrid coupler 90° ; 2- 4GHz
Q
I
RF
LO
GC VG2 VG3 VDL VD B
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CHR3362-QEG
10-16GHz Integrated Down Converter
Recommended package footprint
Refer to the application note AN0017 available at http://www.ums-gaas.com for package foot
print recommendations.
SMD mounting procedure
For the mounting process standard techniques involving solder paste and a suitable reflow
process can be used. For further details, see application note AN0017.
Recommended environmental management
Refer to the application note AN0019 available at http://www.ums-gaas.com for
environmental data on UMS package products.
Recommended ESD management
Refer to the application note AN0020 available at http://www.ums-gaas.com for ESD
sensitivity and handling recommendations for the UMS package products.
Ordering Information
QFN 4x5 RoHS compliant package:
CHR3362-QEG/XY
Stick: XY = 20
Tape & reel: XY = 21
Information furnished is believed to be accurate and reliable. However United Monolithic Semiconductors
S.A.S. assumes no responsibility for the consequences of use of such information nor for any infringement of
patents or other rights of third parties which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of United Monolithic Semiconductors S.A.S.. Specifications
mentioned in this publication are subject to change without notice. This publication supersedes and replaces all
information previously supplied. United Monolithic Semiconductors S.A.S. products are not authorised for use
as critical components in life support devices or systems without express written approval from United
Monolithic Semiconductors S.A.S.
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Specifications subject to change without notice
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