ATMEL ATA6616-EK Atmel ata6616-ek/ata6617-ek development board v1.1 Datasheet

APPLICATION NOTE
Atmel ATA6616-EK/ATA6617-EK Development Board V1.1
ATA6616-EK/ATA6617-EK
Introduction
The development board for the Atmel® ATA6616/ATA6617 ICs enables users to rapidly
prototyping and testing of new LIN designs on the Atmel ATA6616 and Atmel ATA6617
ICs.
Figure 1.
Atmel ATA6616-EK/ATA6617-EK Development Board
The Atmel ATA6616 and Atmel ATA6617 are dual-chip System-in-Package (SIP) products
especially well suited for complete LIN-bus slave and master node applications supporting
highly integrated in-vehicle LIN networking solutions. The first chip of the dual-chip SIP is
the Atmel LIN System Basis Chip (LIN SBC) Atmel ATA6624 with an integrated 5V voltage
regulator, a window watchdog, and a fully integrated LIN transceiver complying with the
LIN 2.1 specification. The second chip is an automotive microcontroller within the Atmel
AVR® 8-bit microcontroller series with advanced RISC architecture (Atmel ATtiny87 with 8K
flash in Atmel ATA6616 and the Atmel ATtiny167 with 16K flash in Atmel ATA6617). All
pins of both integrated chips are bonded out to provide customers with the same flexibility
for their applications which they have when using discrete parts. There is no internal connection between the two chips.
9342D-AUTO-09/13
The supplied LIN SBC Atmel® ATA6624 has the following features:
● Master and slave operation possible
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Supply voltage up to 40V
Operating voltage VS = 5V to 27V
Typically 10µA supply current during Sleep Mode (VCC is switched off)
Typically 40µA supply current in Silent Mode
Linear low-drop voltage regulator 5V, 85mA current capability
VCC undervoltage detection (4ms reset time) and watchdog reset logically combined at NRES
Open drain output voltage regulator, boosting possible with external NPN transistor
LIN physical layer complies with LIN 2.1 specification and SAE J2602-2
Wake-up capability via LIN bus, WAKE pin, or Kl_15 pin
INH output for external voltage regulator control or for switching off master pull-up resistor
TXD time-out timer
Bus pin is overtemperature and short circuit protected versus GND and battery
Adjustable watchdog time via external resistor
The supplied AVR® (Atmel ATtiny87 or Atmel ATtiny167) has the following features:
● 8/16Kbytes of in-system programmable flash with read-while-write capabilities
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512bytes EEPROM
512bytes SRAM
16 general purpose I/O lines
32 general purpose working registers
Internal 8MHz RC oscillator calibrated for 5V at 25°C
Two flexible timer/counters with compare modes
Internal and external interrupts
LIN 2.1 and LIN 1.3 controller or 8-bit UART
Byte-oriented two-wire serial interface
Master/slave SPI serial interface
4-channel 10-bit ADC
Five software-selectable power-saving modes:
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Idle Mode stops the CPU while allowing the SRAM, timer/counters, ADC, analog comparator and interrupt
system to continue functioning.
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Power-down Mode saves the register contents but freezes the oscillator, disabling all other chip functions until
the next interrupt or hardware reset.
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Power-save Mode: the asynchronous timer continues to run, allowing the user to maintain a timer base while
the rest of the device is sleeping.
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ADC Noise Reduction Mode stops the CPU and all I/O modules except ADC, minimizing switching noise
during ADC conversions.
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Standby Mode: the crystal/resonator oscillator runs while the rest of the device is sleeping. This allows very fast
start-up while limiting power consumption.
ATA6616-EK/ATA6617-EK [APPLICATION NOTE]
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The combination of the features included in Atmel® ATA6616/ATA6617 makes it possible to develop simple, but powerful
and cheap slave nodes in LIN bus systems.
The ICs are designed to handle low-speed data communication in vehicles (such as in convenience electronics). Improved
slope control at the LIN driver ensures secure data communication up to 20kBaud. Sleep and Silent Mode included in the
LIN SBC guarantee very low current consumption.
The Atmel ATA6616 and Atmel ATA6617 are full pin- and functional-compatible. They only differ in the size of integrated
microcontroller flash memory. Some minor modifications in the source code when switching between Atmel ATA6616 and
Atmel ATA6617 during the development phase may be required.
Because a standard AVR® microcontroller with all pins is included with the Atmel ATA6616 and Atmel ATA6617, the
standard toolchain consisting of the Atmel AVR Studio®, front-end assembler and simulator, and in-circuit emulator can be
used in new application development and debugging. Furthermore, ActiveX components are also available that can be used
to create a simple PC program for emulation of the LIN master node. Using the software components and the development
board, it is very easy and inexpensive to create and test a LIN network.
Unlike standalone AVRs, the internal 8MHz RC oscillator has been calibrated at 5V and, therefore, perfectly fits the output
voltage of the integrated voltage regulator.
This document provides users with start-up information about the Atmel ATA6616 and Atmel ATA6617's development board.
Please refer to the corresponding datasheet For more detailed information about using the devices themselves.
ATA6616-EK/ATA6617-EK [APPLICATION NOTE]
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1.
Development Board Features
The development board for the Atmel ATA6616/ATA6617 IC supports the following features:
● All components necessary to put the ATA6616/ATA6617 into operation are included
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2.
Placeholders for some optional components for extended functions included
All pins easily accessible
Easily adaptable watchdog times by replacing a single resistor
Optional activation of external NPN transistor for boosting output current of voltage regulator (removing jumper JP3)
Choice of master or slave operation (mounting D2 and R1)
Optional external quartz mounted for handling time-critical applications (not necessary for LIN communication)
Push button included for creating local wake-up after entering Sleep or Silent Mode
Ground coulter clip for easy probe connection while measuring with oscilloscope
Quick Start
The development board for the Atmel® ATA6616/ATA6617 is shipped with the default jumper settings and all accessories
required for immediate use.
Figure 2-1. Atmel ATA6616/ATA6617 Development Board with Reference Points
4 - JP2: NTRIG pin (watchdog trigger)
13 - External power supply connector
2 - JP1: EN pin (enables ATA6624)
External power supply
Voltage at pin VS
7 - LIN bus line
8 - WAKE pin
9 - INH pin
12 - Port A of ATtiny87/167
10 - KL_15 pin
11 - Port B of ATtiny87/167
External NPN (Boost)
transistor
3 - JP3: en-/disable the
NPN (Boost) transistor
Placeholder for external
crystal (when used as
master for higher clock
accuracy)
Mode pin (switch on/off watchdog)
ISP - AVR programming
interface
6 - RXD pin (receive data output - ATA6624)
5 - TXD pin (transmit data output - ATA6624)
1- NRES pin (output undervoltage and watchdog reset)
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The IC mounted on the board is pre-programmed with a firmware to allow testing and interpretation of basic functions
directly on the board. After correctly connecting an external 12V DC power supply to the power connector or between the
terminals “+” and “-” (reference point 13), the LIN SBC is in Fail-safe Mode. After the power is supplied to the microcontroller
(regulated 5V DC voltage provided by the LIN SBC’s internal voltage regulator), the microcontroller switches the LIN SBC to
Normal Mode by setting the EN pin to high (ENABLE jumper) and starts to trigger the integrated window watchdog. The
system is now ready for data transmission via the LIN bus. Signals fed in at the TXD pin are visible on the LIN bus while
signals on the LIN bus are visible at the RXD pin. In Normal Mode the current consumption is approximately 3mA and the
following voltages and signals can be seen at the corresponding pins.
Table 2-1.
Overview of Pin Status at Start-up of the Development Board
Test Point
Expected Behavior
NRES Jumper
5V DC
1
EN Jumper
5V DC
2
Boost Jumper
5V DC
3
NTRIG Jumper
Frequency f ≈ 36.6Hz
Vpp = 5V
4
TXD
Frequency f ≈ 36.6Hz
Vpp = 5V
5
RXD
Frequency f ≈ 36.6Hz
Vpp = 5V
6
LIN
Frequency f ≈ 36.6Hz
Vpp  11V
7
WAKE
~11.2V DC
8
INH
~11.2V DC
9
KL15
0V DC
10
PB0 to PB6
Frequency f ≈ 36.6Hz
PB7
5V DC
PA0 to PA3,
PA5 to PA7
Frequency f ≈ 36.6Hz
PA4
5V DC
Additional Information
Symbol
Vpp = 5V
11
Vpp = 5V
12
12
The board’s pre-programmed firmware provides the window watchdog with a valid trigger signal so that the NRES pin is not
forced to ground and the microcontroller does not receive any resets.
For testing purposes and for system interpretation, it may be useful to view behavior while the watchdog is not correctly
triggered. This can be achieved in two different ways without changing the firmware of the IC:
● Remove NTRIG jumper
No trigger signal reaches the watchdog and the watchdog generates a reset directly after lead time of td
(51k) = 49ms expires.
●
Re-program the fuse bit
Changing the fuse bit CKDIV8 to unprogrammed changes the microcontroller's internal clock from 1MHz to 8MHz.
Doing this keeps the trigger signal generated from the microcontroller from meeting the open window from the window
watchdog and a reset is thus generated.
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3.
Hardware Description
3.1
Pin Description
In the following sections the external elements required for some of the pins are shown and described. Please see the
specific datasheet for more information about this topic, refer to the relevant datasheet.
3.1.1
Power Supply
In order to get the development board running, an external 5.7V to 18.7V DC power supply has to be connected to the power
connector (positive center connector) or to the terminals "+" and "-" directly on the right side of the power connector. The
input circuit is protected against inversepolarity by the protection diode D1, resulting in a difference of approximately 0.7V
between the supply voltage VBat and the VS pin voltage.
3.1.2
Voltage Regulator (PVCC and VCC)
The internal 5V voltage regulator is capable of driving loads with up to 85mA current consumption. The Atmel® ATA6616 and
Atmel ATA6617 are therefore able to supply the internal microcontroller, some external sensors, and/or other ICs required
for the LIN node in question. The voltage regulator is protected against overloads by means of current limitation and
overtemperature shutdown. To boost the maximum load current, an external NPN transistor may be used (please see
“Boosting Up the Voltage Regulator” on page 15 for more inforamtion). Its base is connected to the VCC pin and its emitter is
connected to PVCC. To enable this feature, the jumper JP3, which connects the two pins PVCC and VCC per default, has to
be removed. Please note that the PVCC voltage is no longer short-circuit protected when an external NPN-transistor is used
to boost up the output current.
As for the most applications the 85mA are sufficient, the Jumper PVCC is set per default.
3.1.3
The Window Watchdog (NTRIG, WD_OSC and NRES)
The watchdog anticipates a trigger signal from the microcontroller at the NTRIG input (negative edge) within a defined time
window. If no correct trigger signal is received during the open window, a reset signal (active low) is generated at the NRES
output. During Silent or Sleep Mode the watchdog is switched off to reduce current consumption.
The timing basis of the watchdog is provided by the internal oscillator, whose time period tOSC can be adjusted via the
external resistor R3 at the WD_OSC pin. All watchdog-specific timings (t1, t2, td, ...) are based on the value of this resistor.
As a default a resistor with a value of 51k is mounted on the development board, resulting in the following timing sequence
for the integrated watchdog.
Figure 3-1. Watchdog Timing Sequence with R3 = 51k
VCC
3.3V/5V
Undervoltage Reset
NRES
Watchdog Reset
tnres = 4ms
treset = 4ms
td = 155ms
t1
t1 = 20.6ms
t2 = 21ms
twd
NTRIG
ttrig > 200ns
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t2
The microcontroller pin PA3 is used per default to trigger the watchdog. In order to guide the signals generated from pin PA3
to the watchdog trigger input NTRIG, the jumper JP2 has to be set. If it is not possible to use the pin PA3 to trigger the
watchdog because it is being used for another function, remove the JP2 jumper and connect the NTRIG pin directly to
another microcontroller pin using a 1-wire cable.
If the watchdog is not used, the trigger input can be left open on the development board, because it is equipped with an
internal pull-up resistor. For normal use of the Atmel® ATA6616 and Atmel ATA6617 with deactivated watchdog, the trigger
input pin NTRIG should be connected directly to VCC for EMC reasons.
Replacing the resistor R3 changes the frequency of the internal oscillator, causing a corresponding change in the watchdog
timing. The following formula shows how the frequency of the internal oscillator depends on the value of the resistor R3. For
more information, please refer also to the Atmel ATA6616/ATA6617 datasheet:
tOSC [RWD_OSC] = –0.0004  (RWD_OSC)2 + 0.405  RWD_OSC
tOSC in µs
RWD_OSC in k
With the values given in the datasheet, all relevant watchdog times can be calculated (for example, the open window and the
closed window) using tOSC.
In general, both Atmel ATA6616 and Atmel ATA6617 are shipped with an oscillator start-up time of 65ms. Due to the extralong lead time of 155ms in almost all cases it should be possible to meet the first open window of the watchdog. If more time
is needed, the default start-up time of the microcontroller 65ms can be reduced via the fuse bits to 4.1ms or even 0ms. The
IC mounted on the board is delivered with a start-up time of 65ms.
3.1.4
LIN Interface (LIN, TXD and RXD)
The LIN Transceiver is only active when the LIN SBC is in Normal Mode. In all other modes the transceiver is switched off
and no signals from the microcontroller are transmitted on the bus and no signals from the bus are passed to the
microcontroller.
Because the two pins TXD and RXD on the LIN SBC are controlled by the microcontroller’s LIN/UART, they are connected
to the corresponding TXD and RXD pins on the microcontroller and can be monitored at these pins, with test points supplied
on the development board.
3.1.4.1 LIN Pin (LIN SBC)
A low-side driver with internal current limitation and thermal shutdown and an internal pull-up resistor in compliance with LIN
specîficatuion 2.1 are implemented. The LIN receiver thresholds are compatible with the LIN protocol specification.
When using the development board for a LIN master application, it is possible to mount the two required extra components
diode D2 (e.g., LL4148) in series with resistor R9 (1k) on the board at their designated placeholders.
3.1.4.2 TXD Input/Output Pin (LIN SBC)
The signals sent to the TXD input pin control the state of the LIN output. The TXD input pin must be pulled to ground in order
to drive the LIN bus low. If the TXD is high, the LIN output transistor is turned off and the bus is in recessive state, pulled up
by the internal/external resistor. If the TXD is low, the LIN output transistor is turned on and the bus is in dominant state. An
internal timer prevents the bus line from being driven permanently in the dominant state. If TXD is forced to low longer than
tDOM_min > 6ms, the LIN SBC internally switches the TXD state to high and the LIN bus driver is switched to the recessive
state.
This feature is used to prevent a single faulty slave node or a short to ground at the TXD pin from paralyzing communication
on the complete LIN bus to which the faulty slave node is connected. Due to this behavior, the internal state of the TXD pin
can differ from the signal level visible at the pin itself. However, if TXD is short-circuited to GND, it is possible to switch to
Sleep Mode via ENABLE after tDOM_max > 20ms.
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3.1.4.3 TXD Input/Output Pin (Microcontroller)
The TXD pin from the microcontroller (PA1) which is part of the LIN/UART hardware is hard-wired to the TXD input pin from
the LIN SBC.
Because the LIN SBC indicates the wake-up source (local wake-up or remote wake-up) with the help of the TXD pin, it is
recommended that the TXD pin from the microcontroller be reconfigured as an input when entering Silent or Sleep Mode. As
long as pin EN is still low after a wake-up, the LIN SBC indicates the wake-up source at the TXD pin.
3.1.4.4 RXD Output Pin (LIN SBC)
This pin reports the state of the LIN bus to the microcontroller. LIN high (recessive state) is reported by a high level at RXD;
LIN low (dominant state) is reported by a low level at RXD. The output has an internal pull-up structure with typically 5k to
VCC.
This output is short-circuit protected.
The RXD pin from the microcontroller (PA0) which is part of the LIN/UART hardware is hard-wired to the RXD input pin from
the LIN SBC and the current state of this pin can be monitored at a supplied test point.
3.1.5
INH Pin (LIN SBC)
A 85mA current supply is sufficient for most LIN node applications. However, if more current is needed, the INH output can
be used to switch on an additional, external voltage regulator during Normal or Fail-safe Mode. The INH pin is automatically
switched off in Sleep or Silent Mode. In addition to switching an external voltage regulator, the INH output can also be used
to switch application-specific circuit parts in order to minimize current consumption during Sleep or Silent Mode.
3.1.6
WAKE (LIN SBC)
The high-voltage input pin WAKE can be used to generate a local (low-active) wake-up from Sleep or Silent Mode. A push
button is provided at this pin on the development board. If a local wake-up is not required in the application, the WAKE pin
should be connected to VS. In this case the two resistors R7 and R8 need to be replaced by 0 resistors.
3.1.7
KL_15 (LIN SBC)
In addition to the WAKE pin, there is another way to generate a local wake-up: the KL_15 pin. Like the WAKE pin, the KL_15
pin is also a high-voltage input. However, it is edge sensitive and is activated on a low-to-high transition. It can be connected
to the ignition of the car in order to generate local application wake-up when the ignition is switched on. To protect this pin
against voltage transients a serial resistor of 47k and a ceramic capacitance of 100nF are recommended. If this wake-up
option is not used in an application, this pin should be connected directly to ground.
3.1.8
MODE Pin (LIN SBC) and Debug Mode
During the early development phase it can be helpful to deactivate the watchdog so that no resets disturb the normal
application program. It is highly recommended to use “Debug Mode” during the development phase only, because the
watchdog is an important safety feature for most automotive applications.
On the development board the MODE pin is pulled to ground via the 10k resistor R4. The watchdog is thus active during
the LIN SBC Normal Mode or Fail-safe Mode. Setting the MODE jumper ties the MODE pin to 5V and disables the
watchdog. If the watchdog is disabled, the other reset sources (undervoltage reset and after power-up) remain active. In
order to avoid all resets of the microcontroller during debugging, deactivate the watchdog by removing the NRES jumper and
mounting the MODE jumper.
Please note that if the NRES jumper has been removed and an undervoltage or watchdog failure occurs, the LIN SBC
switches to Fail-safe Mode regardless of whether the microcontroller has been reset or not. In this case, the LIN transceiver
is deactivated as long as the reset line is low.
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3.1.9
NRES Output Pin (LIN SBC) and PB7/NRES Input Pin (Microcontroller)
The NRES output pin is an open-drain output and therefore requires an external pull-up resistor to VCC. The PB7/NRES
input pin already has a pull-up resistor included with resistance between 30k and 60k. The NRES output pin of the LIN
SBC is connected to the NRES input pin (PB6) of the microcontroller via the “NRES - JP5” jumper. For normal operation, this
jumper has to be set so that a reset signal generated from the LIN SBC resets the microcontroller. Removing this jumper
would lead to an undefined value at the NRES output pin. An additional 10k resistor has been provided on the
development board.
Because the NRES output is an open-drain output, it is not necessary to remove the jumper NRES while programming or
debugging the device.
3.1.10 PB4 and PB5 (Microcontroller)
The microcontroller runs on an internal RC oscillator with a default frequency of 1MHz. Because the accuracy of the internal
clock is sufficient for LIN communication, in most cases there is no need for higher accuracy. However, for some applications
a more accurate clock is required and therefore an external crystal oscillator can be mounted on the development board at
the designated Q1 placeholder together with the required C10 and C11 capacitors (see also “Running the Microcontroller on
External Clock”). Please note that the fuse bit setting has to be changed when activating the external clock. For more
information about how to change the fuse bits and information on using an external clock, refer to the datasheet of the
Atmel® ATA6616/ATA6617 and to the Atmel AVR Studio® documentation.
If no external clock is used, the two pins PB4 and PB5 can be used as normal I/O pins without any restriction.
3.1.11 Other Pins
All others pins not described in this section have no special external circuitry and/or are used as described within the
datasheet.
3.1.12 Summary of the Pin-Connection
As already described in detail in the previous sections, there are some pins tied together on the development board. A
summary of the hard-wired pins on the Atmel ATA6616-EK/ATA6617-EK is shown in Table 3-1.
Table 3-1.
Summary of the Hard-wired Pins on the Atmel ATA6616-EK/ATA6617-EK
Microcontroller Pin
Connected to LIN SBC Pin
PB7/NRES
NRES
PA3
NTRIG
PA4
EN
PA1
TXD
PA0
RXD
The three connections marked in bold are generated via jumpers and the other two connections are hard-wired and
equipped with a test point for ease of access.
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3.2
Port Connectors
The Atmel ATA6616-EK/ATA6617-EK has two port connectors for the Port A and Port B microcontroller ports. All nonreserved I/O pins available from the microcontroller are routed to the corresponding connectors to ensure the user has easy
access to them. In addition to the port pins, both connectors provide a voltage supply pin (5V from the internal voltage
regulator) and a ground pin to facilitate connection of application-specific add-ons.
The pinouts of the two connectors are shown in Figure 3-2.
Figure 3-2. Pinout of the Port Connectors
3.3
VCC
PA4
PA5
PA3
PA1
GND
PA6
VCC
PB7
PB5
PB0
PB1
GND
PB6
PB4
PB2
PB3
PA7
PA2
PA0
Jumper Description
In order to allow greater flexibility and meet as many requirements as possible, some jumpers are provided on the
development board. With the help of these jumpers, users have the opportunity to interact with the system itself in order to
test some features and/or to adapt the system to their requirements. In the following sections all jumpers on the development
board are briefly described. For additional information, check the previous sections.
3.3.1
NRES Jumper – JP5
The default setting for the jumper connects the NRES output of the LIN SBC and the reset input of the microcontroller. This
means the microcontroller will be resetted if the watchdog fails or if there is undervoltage at the voltage regulator output. As
described earlier in this document, there may be some cases when it is helpful to remove this jumper (e.g., testing purposes,
debugging). However, for normal operation of the LIN node, this jumper should be set.
3.3.2
NTRIG Jumper – JP2
The default setting for the jumper connects the watchdog trigger signal output pin PA3 of the microcontroller and the
watchdog trigger signal input pin NTRIG of the LIN SBC. If the PA3 pin is used for alternative functions in the application, the
NTRIG (JP2) jumper can be completely removed, making the PA3 pin accessible. In this case, the watchdog has to be
triggered by another I/O pin from the microcontroller, and the connection to the trigger input has to be made via an extra 1wire cable.
3.3.3
MODE Jumper – JP4
By default this jumper is removed to apply a low-level at the MODE pin of the LIN SBC via the pull-down resistor R4. In this
case, the LIN SBC's watchdog is active and expects trigger pulses from the microcontroller.
When debugging an application, it is often useful to deactivate the watchdog in order to get no resets, such as while at a
break point. In this case the MODE jumper has to be set, which applies a high level at the MODE pin. From now on the
watchdog is deactivated. More information about the Debug Mode can be found in “MODE Pin (LIN SBC) and Debug Mode”
on page 8.
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3.3.4
Boost Jumper – JP3
By default, this jumper is set so that the internal 5V voltage regulator is active with a current capability of 85mA (PVCC
connected to VCC). Most LIN nodes have this current capability or less. For LIN nodes requiring more current, the current
capability can be boosted by using some additional external components. Please refer to “Boosting Up the Voltage
Regulator” on page 15 for a detailed description of how to boost the current of the internal voltage regulator.
3.3.5
EN Jumper – JP1
The default setting for the jumper connects the microcontroller enable output pin PA4 and the enable input pin EN from the
LIN SBC. If pin PA4 is used for alternative functions in the application, the EN jumper can be removed so the PA4 pin can be
accessed. In this case the enable input has to be controlled either by another I/O pin from the microcontroller or it can be set
fixed to VCC. In both cases the connection to the enable input has to be made via an extra 1-wire cable.
3.4
Optional Components
The development board for the Atmel® ATA6616/ATA6617 provides some placeholders for mounting additional, optional
components. Some factory-mounted components can be replaced so the LIN node can be adapted to meet the user's
specific requirements. In the following sections these placeholders and components are shown and described.
3.4.1
Configuring the Atmel ATA6616-EK/ATA6617-EK as a Master or a Slave Node
Both the LIN 2.0 and LIN 2.1 specification require the master node in a LIN network be set up as shown in Figure 3-3.
Figure 3-3. External Circuitry for a LIN Master Node
VShift_BAT
VBATTERY
Master ECU
VBAT
Transceiver IC
VSUP
Dser_int
30kΩ
VBAT
VBATTERY
Dser_
master
Rx
1kΩ
VBUS
Tx
VGND_BATTERY
VGND_ECU
VBUS: Internal supply for electronics
VShift_GND
The difference between a master node and a slave node is the additional Dser_master diode and a serial 1k pull- up resistor
between Vsup and the LIN line. The placeholders for the two components D2 and R9 on the Atmel ATA6616-EK/ATA6617EK are shown in Figure 3-4 on page 12.
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Figure 3-4. Diode and Resistor Necessary for LIN Master Applications
3.4.2
Running the Microcontroller on External Clock
For cases in which the accuracy of the internal RC oscillator is not sufficient to meet the application-specific requirements,
an external crystal oscillator and the two capacitors can be mounted on the Atmel ATA6616/ATA8888. The location for these
placeholders (Q1, C10, and C11) is shown in Figure 3-5. For the two load capacitor values check the datasheet of the
relevant oscillator.
Figure 3-5. Placeholder for an External Crystal Oscillator and its Load Capacitors
3.4.3
Changing the Watchdog Timings
The watchdog timing is generated with the help of a 51k resistor (R3) connected between pin WD_OSC and ground by
default on the Atmel ATA6616/ATA6617 - EK. In order to change these timings, the R3 resistor has to be changed.
A description of how the resistor R3 influences the watchdog timing can be found in “The Window Watchdog (NTRIG,
WD_OSC and NRES)” on page 6 and in the Atmel ATA6616/ATA6617 datasheet.
12
ATA6616-EK/ATA6617-EK [APPLICATION NOTE]
9342D–AUTO–09/13
4.
Programming and Debugging the Atmel ATA6616/ATA6617
The easiest way to program and debug the Atmel® ATA6616/ATA6617 is to use the AVR Studio® environment together with
the Atmel STK®600 or the JTAG-ICE MkII. AVR Studio is an Integrated Development Environment (IDE) for writing and
debugging AVR® applications Windows® 9x/Me/NT/2000/XP environments. AVR Studio provides a project management
tool, source file editor, chip simulator, and in-circuit emulator interface for the powerful AVR 8-bit RISC family of
microcontrollers.
4.1
Programming the Atmel
ATA6616/ATA6617
Connect the selected hardware (STK600 or JTAG-ICE MkII) to the ISP header of the Atmel ATA6616-EK/ATA6617-EK via
the 6-wire cable. Pin 1 is marked with two small triangles on the board.
In the AVR Studio, the two devices Atmel ATA6616 and Atmel ATA6617 are not listed in the supported devices list, because
they contain the standard Atmel ATtiny87 and Atmel ATtiny167 devices respectively. To program the Atmel ATA6616, select
the Atmel ATtiny87 and to program the Atmel ATA6617, select the Atmel ATtiny167.
For more information about using the STK600, the JTAG-ICE MkII or the AVR Studio, refer to the relevant documentation,
available on the internet.
4.2
Debugging the ATA6616/ATA6617
Combined with AVR Studio, the JTAG-ICE MkII can perform on-chip debugging on all AVR 8-bit RISC microcontrollers with
a JTAG or debugWIRE interface. The Atmel ATA6616 and Atmel ATA6617 come with a debugWIRE interface so only three
wires are required for communication between the JTAG-ICE MkII and the board. These signals are RESET, VCC, and
GND.
The debugWIRE on-chip debug system uses a one-wire bi-directional interface to control the program flow, execute AVR
instructions in the CPU, and to program the various non-volatile memories. For debugging via debugWIRE, the reset line is
used and the NRES jumper has to be removed because the JTAG ICE mkII requires exclusive access to this line.
For more detailed information about debugging via the debugWIRE interface, refer to the relevant documentation available
on the Internet
ATA6616-EK/ATA6617-EK [APPLICATION NOTE]
9342D–AUTO–09/13
13
5.
Tools
As was briefly mentioned in the previous section, AVR Studio, in combination with the STK®600 and JTAG-ICE MkII, is a
powerful tool for programming and debugging the AVR microcontroller family in general.
Furthermore, Atmel provides cost-effective software support for the development of a LIN network. These can easily be used
together with the development board.
A LIN1.3 ANSI C software library for the AVR microcontroller family is available. The software library allows programming of
protocol handling for LIN slave nodes. The library can be downloaded at
http://www.atmel.com/dyn/resources/prod_documents/doc1637.pdf
Many OEMs require their suppliers to use certified third-party LIN protocol stacks. In order to satisfy this requirement, both,
LIN 2.0 and LIN 2.1 protocol stacks are available for the Atmel® ATA6616 (Atmel ATtiny87) as well as for the Atmel
ATA6617 (Atmel ATtiny167) from Mentor Graphics®, Vector Informatik, and from Warwick Control Technologies.
Warwick Control Technologies offers the NETGEN configuration and autocoder tool. For testing purposes and to provide a
quick start to using Atmel products, there is a limited but free version available. The demo version is available at
http://www.warwickcontrol.com/
For more information about the certified LIN stacks please contact the third party suppliers directly.
14
ATA6616-EK/ATA6617-EK [APPLICATION NOTE]
9342D–AUTO–09/13
6.
Boosting Up the Voltage Regulator
For some applications a higher current is required than what the internal voltage regulator is able to deliver (85mA). In order
to meet this requirement, it is possible to boost the maximum current by using an external NPN transistor. A transistor,
MJD31C in a D-PAK package, is already mounted on the development board, and, in addition to the transistor, there are two
more components placed on the development board - the resistor R6 (3.3) and the electrolytic capacitor C4 (2.2µF), which
are needed for stability reasons. In addition, the jumper boost (JP3) has to be removed when using the external transistor.
Note that the output voltage is no longer short-circuit protected when boosting the output current with an external NPN
transistor.
Figure 6-1. External NPN Transistor and Additional Components Required for Boosting the Voltage Regulator
Current
The limiting parameter for the currently available output current is the maximum power dissipation of the external NPN
transistor. In the version at this stage, the thermal resistance of the MJD31C soldered on the minimum pad size is 80K/W.
This means that the maximum possible output current when VS = 12V is approximately 230mA at room temperature. this
limit should not be exceeded because the transistor could be damaged as a result of overtemperature. If a higher output
current is required, additional cooling of the external transistor must be ensured.
ATA6616-EK/ATA6617-EK [APPLICATION NOTE]
9342D–AUTO–09/13
15
7.
Atmel ATA6616-EK/ATA6617-EK Schematic of the Development Board
Figure 7-1. Atmel ATA6616-EK/ATA6617-EK Schematic of the Development Board
PVCC
VS
C10
100nF
PA4
220pF
PA7
PA5
3
1
4
2
LIN
PB4
U1
ATA6616/17
VCC(AVR
GND(SYSTEM)
KL15
NRES
TXD
INH
RXD
PA2
PA1
PA0
PB0
PB1
PB3
R5
R4
13
10kΩ
MJD31C
T1
R3
51kΩ
PB0
C2
+ C3
100nF
PVCC
PA3
2 1
NTRIG
JP5
NRES
PA4
1
PB7
PB3
PB2
Port A
PA7
5
6
PA6
PA4
9
16
PA5
10
V+
X2
1
2
PB1
VS
PB0
LIN
5
6
PB6
PVCC
9
10
PB5
PA2
PB7
WAKE
PA5
INH
PB7
PVCC
ATA6616-EK/ATA6617-EK [APPLICATION NOTE]
9342D–AUTO–09/13
XISP1
Port B
PB4
EN
JP1
2 1
ENABLE
X3
X1
PA3
NTRIG
1
JP2
2
1
PA2
PVCC
10µF
PVCC
10kΩ
PA1
1
100nF
R1
47kΩ
2
2.2µF
47kΩ
R2
TXD
INH
1
+
3.3Ω
C1
JP3
1 2
C4
KL_15
2 JP4
1
12
PB1
22µF +
R6
MODE
1
PA1
PA2
PA0
RXD
100nF
C6
VCC(REG)
GND(37)
PB2
EN
VS
PVCC
PB2
C5
NTRIG
EN
GND(36)
38
10nF
19
NTRIG
TM
100nF
WAKE
WD_OSC
C12
GND(LIN)
PA3
AVCC
PA4
AGND
PB7
PB6
20
PB5
PB4
PA0
10kΩ
S1
PA3
31
32
PB3
33kΩ
C7
Quarz
PVCC
VS
R9
1kΩ
LIN
PB6
PB5
PA6
PB7
22pF
PA5
Q1
PA6
22pF
R8
R7
C9
C8
PA7
C11
WAKE
D2
LL4148
L1
10µH
KL_15
PVCC
1
PA4
ISP
1
8.
Atmel ATA6616-EK/ATA6617-EK Board Layout
Figure 8-1. Atmel ATA6616-EK/ATA6617-EK Board Component Placement; Top side, Top View
Figure 8-2. Atmel ATA6616-EK/ATA6617-EK Development Board; Top Side, Top View
ATA6616-EK/ATA6617-EK [APPLICATION NOTE]
9342D–AUTO–09/13
17
Figure 8-3. Atmel ATA6616-EK/ATA6617-EK Development Board; Bottom Side, Top View (as if PCB is
Transparent)
18
ATA6616-EK/ATA6617-EK [APPLICATION NOTE]
9342D–AUTO–09/13
9.
Atmel ATA6616-EK/ATA6617-EK Bill of Material
Table 9-1.
Atmel ATA6616/ATA6617 Bill of Material
Part No.
Designation
Value
Housing
Manufacturer/ Distributor
C1
Capacitor
100nF
SMD 0603 / X7R
e.g., Vishay
C2
Capacitor
100nF
SMD 0603 / X7R
e.g., Vishay
C3
Capacitor
10µF/16V Tantal
SMD Typ A-3216
e.g., Vishay
C4
Capacitor
2.2µF/16V Tantal
SMD Typ A-3216
e.g., Vishay
C5
Capacitor
100nF
SMD 0603 / X7R
e.g., Vishay
C6
Capacitor
22µF/50V Elco
SMD Typ D-7343
e.g., Panasonic
C7
Capacitor
10nF
SMD 0603 / X7R
e.g., Vishay
C8
Capacitor
220pF
SMD 0603 / X7R
e.g., Vishay
SMD 0603 / X7R
e.g., Vishay
C9
Capacitor
100nF
C10
Capacitor
Option (NC)
C11
Capacitor
Option (NC)
C12
Capacitor
100nF
SMD 0603 / X7R
e.g., Vishay
D1
Diode
LL4148
SOD-80C
e.g., Mira
D2
Diode
Option (NC)
SOD-80C
L1
Filter Choke
10µH
SMD 1206
e.g., Mira OrderNr.:
7656/103
NTRIG, ENABLE, MODE,
NRES, Boost, XV1
Header 2pole
1x2 pins
1001-171-002
e.g., CAB
ISP
Connector
2x3 pins
1002-171-006
e.g., CAB
Q1
Quartz
Option (NC)
262-2179
e.g., RS
486-662
e.g. RS
RXD, TXD
Test pin
1mm black
X1, X2
Connector
Option (NC)
X3
Header 8pole
n.m.
X4
Power jack
2.1mm
T1
Transistor
MJD31C
348-4552
e.g. RS
S1
Switch
KSC 241 J
ITT Canon
e.g. Spörle
GND
Jumper link
pitch 5.08, d = 1mm
13.07.434
www.ettinger.de
U1
LIN SiP
ATA6616/ATA6617
SMD QFN38
Atmel
R1
Resistor
47k
SMD 0603
Standard
R2
Resistor
10k
SMD 0603
Standard
R3
Resistor
51k
SMD 0603
Standard
R4
Resistor
10k
SMD 0603
Standard
R5
Resistor
47k
SMD 0603
Standard
R6
Resistor
3R3
SMD 0603
Standard
R7
Resistor
33k
SMD 0603
Standard
R8
Resistor
10k
SMD 0603
Standard
R9
Resistor
n.m.
SMD 0603
Standard
4x stick on feet
8x2.5mm black
223-859 3M
e.g., RS
5x jumper
2.54mm
(3300111)
e.g., CAB
PCB
ATA6616-EK/
ATA6617-EK V1.1
FRF, 1.5mm
ATA6616-EK/ATA6617-EK [APPLICATION NOTE]
9342D–AUTO–09/13
19
XXXXXX
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© 2015 Atmel Corporation. / Rev.: 9342D–AUTO–09/13
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