Standard ICs Quad 2-input NAND gate BU4011B / BU4011BF / BU4011BFV The BU4011B, BU4011BF, and BU4011BFV are dual-input positive logic NAND gates. Four circuits are contained on a single chip. An inverter-based buffer has been added to the gate output, enabling improved input / output propagation characteristics, and an increased load capacitance minimizes fluctuation in propagation time. •1)Features Low power dissipation. 4) High fan-out. 5) Direct drive of 2 L-TTL inputs and 1 LS-TTL input. 2) Wide range of operating power supply voltage. 3) High input impedance. •Block diagram •Absolute maximum ratings (V Parameter SS A1 1 14 VDD B1 2 13 A4 O1 3 12 B4 O2 4 11 O4 B2 5 10 O3 A2 6 9 B3 VSS 7 8 A3 = 0V, Ta = 25°C) Symbol Limits Unit Power supply voltage VDD – 0.3 ~ + 18 V Power dissipation Pd 1000 (DIP), 450 (SOP) 350 (SSOP-B14) mW Operating temperature Topr – 40 ~ + 85 °C Storage temperature Tstg – 55 ~ + 150 °C – 0.3 ~ VDD + 0.3 V Input voltage VIN 1 Standard ICs BU4011B / BU4011BF / BU4011BFV characteristics •DCElectrical characteristics (unless otherwise noted, V SS Parameter Symbol Input high-level voltage VIH Input low-level voltage Input high-level current Input low-level current Output high-level voltage Output low-level voltage Output high-level current Output low-level current Static current dissipation 2 = 0V, Ta = 25°C) Min. Typ. Max. 3.5 — — 7.0 — — 11.0 — — 15 — — 1.5 5 — — 3.0 — — 4.0 IIH — — IIL — 4.95 VIL VOH VOL IOH IOL IDD Unit VDD (V) Conditions Measurement circuit — Fig. 1 — Fig. 1 5 V 10 V 10 0.3 µA 15 VIH = 15V Fig. 1 — – 0.3 µA 15 VIL = 0V Fig. 1 — — IO = 0mA Fig. 1 IO = 0mA Fig. 1 9.95 — — 14.95 — — — — 0.05 — — 0.05 — 15 5 V 10 15 5 V 10 — 0.05 15 – 0.16 — — 5 VOH = 4.6V – 0.4 — — 10 VOH = 9.5V – 1.2 — — 15 VOH = 13.5V 0.44 — — 5 VOL = 0.4V 1.1 — — 10 VOL = 0.5V 3.0 — — 15 VOL = 1.5V — — 1 — — 2 — — 4 mA mA Fig. 1 Fig. 1 5 µA 10 15 VI = VDD or GND — Standard ICs BU4011B / BU4011BF / BU4011BFV Switching characteristics (unless otherwise noted, Ta = 25°C, Vss = 0V, CL = 50pF) Parameter Output rise time Output fall time “L” to “H” Propagation delay time “H” to “L” Propagation delay time Input capacitance Symbol tTLH tTHL tPLH tPHL CIN Min. Typ. Max. — 180 360 — 90 180 — 65 130 — 100 200 — 50 100 Unit. VDD (V) 90 180 50 100 — 40 80 15 — 90 180 5 80 — 5 — •Measurement circuits Fig. 2 — Fig. 2 — Fig. 2 — — 10 — 100 — 5 ns 80 50 Fig. 2 15 40 40 — 10 ns — — Measurement circuit 5 — — Conditions 15 5 ns 10 ns 10 15 — pF VDD A V GND Fig. 1 DC characteristics 20ns VDD 20ns 90% 50% Input waveform 10% tPHL Output waveform tPLH 90% 50% P.G CL = 50pF GND 10% tTHL tTLH Fig. 2 Switching characteristics 3 Standard ICs BU4011B / BU4011BF / BU4011BFV •Electrical characteristic curve POWER DISSIPATION : Pd (mW) 1200 DIP14 1000 800 600 SOP14 400 SSOP - B14 200 0 0 25 50 75 100 125 150 AMBIENT TEMPERATURE: Ta (°C) Fig. 3 Power dissipation vs. Ta •External dimensions (Units: mm) BU4011B BU4011BF 8.7 ± 0.2 0.3 ± 0.1 1.27 0.4 ± 0.1 0.3Min. 0.15 5.0 ± 0.2 14 8 1 7 0.65 0.15 ± 0.1 4.4 ± 0.2 0.1 6.4 ± 0.3 7 SOP14 BU4011BFV 1.15 ± 0.1 1 0.5 ± 0.1 0° ~ 15° 2.54 DIP14 0.22 ± 0.1 0.3Min. 0.1 SSOP - B14 4 8 0.15 ± 0.1 1.5 ± 0.1 7.62 14 4.4 ± 0.2 6.2 ± 0.3 7 0.11 1 6.5 ± 0.3 8 0.51Min. 14 3.2 ± 0.2 4.25 ± 0.3 19.4 ± 0.3