Evaluation Board User Guide UG-487 One Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel: 781.329.4700 • Fax: 781.461.3113 • www.analog.com iCoupler EVAL-ADuM5010EBZ, 150 mW isoPower Evaluation Board FEATURES setting the desired output voltage, setting enable control, and providing multiple positions for on-board loads and bypass capacitors. isoPower integrated, isolated dc-to-dc converter Regulated 3.15 V to 5.25 V output Up to 150 mW output power 20-lead SSOP package with 5.3 mm creepage High temperature operation: 105°C High common-mode transient immunity: >25 kV/µs isoPower devices employ high frequency high power switching circuits to enable power transfer across chip scale, air core transformers. The evaluation board includes EMI mitigation recommendations from the AN-0971 Application Note. With the included techniques, this PCB and power module is capable of meeting the requirements of CISPER22 Class A or Class B depending on the voltage and load range. SUPPORTED iCoupler® MODELS ADuM5010 ADuM6010 GENERAL DESCRIPTION The EVAL-ADuM5010EBZ supports the ADuM5010 and ADuM6010 150 mW isolated power modules. It provides a JEDEC standard SSOP20 pad layout as well as support for Complete specifications for the ADuM5010 and ADuM6010 are provided in the ADuM5010 and ADuM6010 data sheets, available from Analog Devices, Inc., and should be consulted in conjunction with this user guide when using the evaluation board. 11083-001 EVALUATION BOARD Figure 1. EVAL-ADuM5010EBZ Evaluation Board PLEASE SEE THE LAST PAGE FOR AN IMPORTANT WARNING AND LEGAL TERMS AND CONDITIONS. Rev. 0 | Page 1 of 8 UG-487 Evaluation Board User Guide TABLE OF CONTENTS Features .............................................................................................. 1 Bypass on the PCB ........................................................................3 Supported iCoupler® Models........................................................... 1 Provision for Loading ...................................................................3 General Description ......................................................................... 1 EMI Mitigation ..............................................................................4 Evaluation Board .............................................................................. 1 High Voltage Capability ...............................................................4 Revision History ............................................................................... 2 Evaluation Board Schematics and Artwork ...................................5 PCB Evaluation Goals .................................................................. 3 Ordering Information .......................................................................7 Connectors .................................................................................... 3 Bill of Materials ..............................................................................7 Part Configuration Structures .................................................... 3 REVISION HISTORY 11/12—Revision 0: Initial Version Rev. 0 | Page 2 of 8 Evaluation Board User Guide UG-487 Control of the VISO voltage is accomplished through a voltage divider that’s center node is attached to the VSEL pin as shown in Figure 3. There are two options for setting the output voltage supported on this evaluation board. A 20 kΩ potentiometer is installed at R1A in series with a 16.5 kΩ resistor at position R16A making a variable resistance to VISO of 16.5 kΩ to 36 kΩ. A resistor to ground at position R14A forms the lower leg of the voltage divider. This will give a range of adjustment of VISO < 3.3 V to > 5 V. PCB EVALUATION GOALS This board is intended to achieve two goals. It will allow a user of the ADuM5010 or ADuM6010 to exercise the functional capabilities of the part. These include evaluation of bypass, loading, power supply enable/disable control and setting the adjustable output voltage level. This evaluation board demonstrates the EMI mitigation techniques required to make a low emissions design as discussed in the AN-0971 Application Note. CONNECTORS This evaluation system will be used to evaluate a variety of different aspects of performance. Connections to a power supply and instrumentation are critical to performing accurate measurements without creating artificial ringing, reflections, ripple, and EMI. Two types of interconnections are provided, SMA edge connectors and through-hole signal ground pairs. Between these two options, both temporary and permanent connections to the board are easily made. When coax connections are desired, SMA connectors are available for the VDDP power input and VISO output. These connectors were chosen because they are low profile and provide excellent mechanical connections to the PCB. Most lab equipment is geared toward use of BNC connectors, so adaptors will be required to use the on board connectors. Power can be directly wired to the PCB via the P6A and P7A through-hole connectors. These provide a power ground pair with the power on the Pin 1 hole. These through holes are on 200mil centers, which match the pin spacing required for Tektronix active probes. These positions can be used for scope test points or direct wiring of power and ground. Alternatively, if a fixed output voltage is desired, R16A can be removed and a resistor can be installed in R13A that combined with the existing resistance in R14A will form a fixed voltage divider to set VISO to a single voltage. Refer to the ADuM5010 or ADuM6010 data sheet for selection of resistor values. BYPASS ON THE PCB Several positions and structures are provided to allow optimum bypass of the evaluation board. Provisions have been made for optional surface-mount bulk capacitors to be installed near the power connectors to compensate for long cables to the power supply or external load. Parallel bypass capacitors are installed near the ADuM5010 or ADuM6010 consisting of a 0.1 μF and a 10 μF capacitor for VDDP and VISO. The 0.1 μF capacitors can be moved to positions on the back side of the board if required. The PCB also implements distributed capacitive bypass on the primary side of the PCB. This consists of power and ground fills on the top and bottom layers of the PCB on the VDDP side of the board. This is one of the techniques discussed in the EMI Mitigation section. It has the added benefit of providing added bypass on the primary side of the converter where the largest currents flow as well as RF shielding. PROVISION FOR LOADING VISO can be loaded three ways. PART CONFIGURATION STRUCTURES The ADuM5010 and ADuM6010 have pins that must have set inputs for the IC to operate properly. The evaluation board allows all a full range of configuration options. On the primary side, the PDIS pin must either be tied low to enable the converter, or pulled high to disable the output power and put the part in a standby state. Connector P3A allows a jumper to be placed between Pin 1 and Pin 2 to disable the converter, or between Pin 2and Pin 3 to enable the converter. The header can be removed if an external logic source controls the disable function and the signal can be fed directly into Position 2 of the header. Rev. 0 | Page 3 of 8 An external load can be connected via the SMA connector. A fixed resistor can be installed at R18A. A surface mount resistor can be installed at R15A. UG-487 Evaluation Board User Guide EMI MITIGATION The PCB implements EMI mitigation techniques discussed in the AN-0971 Application Note to demonstrate the recommended board layout options for this device. These techniques include stitching capacitance and edge guarding. Stitching Capacitance The capacitance between the primary and secondary power and ground planes is the most effective way to reduce high frequency emissions from an isoPower device. Figure 2 shows how the inner layers of a PCB can create this stitching capacitance by overlapping inner layer metal to create an extremely low inductance capacitance. The green area shows the active coupling area. Edge Guarding Providing guard rings laced together with vias on each layer of the primary side reduces edge emissions from the PCB stack-up. This addresses emissions due to large high frequency vertical current flow through vias and traces near the edges. Figure 4 shows the top layer guard ring and the bottom layer ground fill as well as the regularly spaced vias in the guard ring that creates a cage type structure to reflect inter-plane emissions back into the PCB. Figure 5 shows the top layer power fill along with its vias to the Layer 3 power plane. This top layer power fill adds distributed capacitance as well as shielding for the layer below. HIGH VOLTAGE CAPABILITY This PCB is designed in line with 2500 V basic insulation practices. High voltage testing beyond 2500 V is not recommended. Appropriate care must be taken when using this evaluation board at high voltages, and it should not be relied on for safety functions since it has not been hi-pot tested or certified for safety. LAYER 2 GROUND LAYER 3 POWER 11083-003 OVERLAP CREATING CAPACITANCE Figure 2. Ground and Power Planes Creating Stitching Capacitance Rev. 0 | Page 4 of 8 Evaluation Board User Guide UG-487 EVALUATION BOARD SCHEMATICS AND ARTWORK MTSW-202-12-G-S-730 MTSW-202-12-G-S-730 VDDPA P6A 1 2 VISOA VDDPA P7A 1 2 VISOA P C8A DNI N P C10A DNI N JOHNSON142-0701-851 J4A JOHNSON142-0701-851 VDDPA C12A C3A C5A 0.1µF 1 2 3 4 5 6 7 8 9 10 VDDPA VDDPA C4A 10µF R15A R18A 5 4 3 2 DNI DUT1A ADuM5010ARSZ MOLEX22-03-2031 P3A 1 2 3 C14A 0.1µF 1 C6A 0.1µF VDD1 GNDP NC NC GNDP GNDP NC PDIS VDDP GNDP VDD2 GNDISO NC NC GNDISO GNDISO NC VSEL VISO GNDISO 20 19 18 17 16 15 14 13 12 11 VISOA R13A TBD0805 R16A 16.5kΩ 3 R14A 10kΩ 2 R1A 20kΩ 1 VDDPA VISOA VISOA C7A C11A C13A 0.1µF C15A 10µF 11083-002 2 3 4 5 VISOA CW J1A 1 VISOA Figure 3. ADuM5010/ADuM6010 Schematic Rev. 0 | Page 5 of 8 Evaluation Board User Guide 11083-004 UG-487 11083-005 Figure 4. Edge Guard on Primary Side Top and Bottom Layers Figure 5. Power Fill, Top Layer, Primary Side Rev. 0 | Page 6 of 8 Evaluation Board User Guide UG-487 ORDERING INFORMATION BILL OF MATERIALS Table 1. Quantity 1 4 2 1 1 1 2 Reference Designator DUT1A C5A, C6A, C16A, C17A C4A, C15A R14A R16A R1A J1A, J4A Description ADuM5010 0.1 µF, 25 V, 10%, 0805 10 µF, 6.3 V, 10%, 0805 10 kΩ, 1/10 W, 1% 0805 16.5 kΩ, 1/10 W, 1%, 0805 20 kΩ resistor VAR 3/8 inch SQ top ADJ SMA edge connector, Johnson 142-0701-851 Rev. 0 | Page 7 of 8 UG-487 Evaluation Board User Guide NOTES ESD Caution ESD (electrostatic discharge) sensitive device. Charged devices and circuit boards can discharge without detection. Although this product features patented or proprietary protection circuitry, damage may occur on devices subjected to high energy ESD. Therefore, proper ESD precautions should be taken to avoid performance degradation or loss of functionality. Legal Terms and Conditions By using the evaluation board discussed herein (together with any tools, components documentation or support materials, the “Evaluation Board”), you are agreeing to be bound by the terms and conditions set forth below (“Agreement”) unless you have purchased the Evaluation Board, in which case the Analog Devices Standard Terms and Conditions of Sale shall govern. Do not use the Evaluation Board until you have read and agreed to the Agreement. Your use of the Evaluation Board shall signify your acceptance of the Agreement. This Agreement is made by and between you (“Customer”) and Analog Devices, Inc. (“ADI”), with its principal place of business at One Technology Way, Norwood, MA 02062, USA. Subject to the terms and conditions of the Agreement, ADI hereby grants to Customer a free, limited, personal, temporary, non-exclusive, non-sublicensable, non-transferable license to use the Evaluation Board FOR EVALUATION PURPOSES ONLY. Customer understands and agrees that the Evaluation Board is provided for the sole and exclusive purpose referenced above, and agrees not to use the Evaluation Board for any other purpose. Furthermore, the license granted is expressly made subject to the following additional limitations: Customer shall not (i) rent, lease, display, sell, transfer, assign, sublicense, or distribute the Evaluation Board; and (ii) permit any Third Party to access the Evaluation Board. As used herein, the term “Third Party” includes any entity other than ADI, Customer, their employees, affiliates and in-house consultants. The Evaluation Board is NOT sold to Customer; all rights not expressly granted herein, including ownership of the Evaluation Board, are reserved by ADI. CONFIDENTIALITY. This Agreement and the Evaluation Board shall all be considered the confidential and proprietary information of ADI. Customer may not disclose or transfer any portion of the Evaluation Board to any other party for any reason. Upon discontinuation of use of the Evaluation Board or termination of this Agreement, Customer agrees to promptly return the Evaluation Board to ADI. ADDITIONAL RESTRICTIONS. Customer may not disassemble, decompile or reverse engineer chips on the Evaluation Board. Customer shall inform ADI of any occurred damages or any modifications or alterations it makes to the Evaluation Board, including but not limited to soldering or any other activity that affects the material content of the Evaluation Board. Modifications to the Evaluation Board must comply with applicable law, including but not limited to the RoHS Directive. TERMINATION. ADI may terminate this Agreement at any time upon giving written notice to Customer. Customer agrees to return to ADI the Evaluation Board at that time. LIMITATION OF LIABILITY. THE EVALUATION BOARD PROVIDED HEREUNDER IS PROVIDED “AS IS” AND ADI MAKES NO WARRANTIES OR REPRESENTATIONS OF ANY KIND WITH RESPECT TO IT. ADI SPECIFICALLY DISCLAIMS ANY REPRESENTATIONS, ENDORSEMENTS, GUARANTEES, OR WARRANTIES, EXPRESS OR IMPLIED, RELATED TO THE EVALUATION BOARD INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, TITLE, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT OF INTELLECTUAL PROPERTY RIGHTS. IN NO EVENT WILL ADI AND ITS LICENSORS BE LIABLE FOR ANY INCIDENTAL, SPECIAL, INDIRECT, OR CONSEQUENTIAL DAMAGES RESULTING FROM CUSTOMER’S POSSESSION OR USE OF THE EVALUATION BOARD, INCLUDING BUT NOT LIMITED TO LOST PROFITS, DELAY COSTS, LABOR COSTS OR LOSS OF GOODWILL. ADI’S TOTAL LIABILITY FROM ANY AND ALL CAUSES SHALL BE LIMITED TO THE AMOUNT OF ONE HUNDRED US DOLLARS ($100.00). EXPORT. Customer agrees that it will not directly or indirectly export the Evaluation Board to another country, and that it will comply with all applicable United States federal laws and regulations relating to exports. GOVERNING LAW. This Agreement shall be governed by and construed in accordance with the substantive laws of the Commonwealth of Massachusetts (excluding conflict of law rules). Any legal action regarding this Agreement will be heard in the state or federal courts having jurisdiction in Suffolk County, Massachusetts, and Customer hereby submits to the personal jurisdiction and venue of such courts. The United Nations Convention on Contracts for the International Sale of Goods shall not apply to this Agreement and is expressly disclaimed. ©2012 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. UG11083-0-11/12(0) Rev. 0 | Page 8 of 8