FAN102 Primary-Side-Control PWM Controller Features Description Constant-Voltage (CV) and Constant-Current (CC) Control without Secondary-Feedback Circuitry Green Mode: Frequency Reduction at Light Load Cable Voltage Drop Compensation in CV Mode The primary-side PWM controller significantly simplifies power supply design that requires CV and CC regulation capabilities. The FAN102 controls the output voltage and current precisely with the information in the primary side of the power supply, not only removing the output current sensing loss, but eliminating all secondary feedback circuitry. SOP-8 Package Available Fixed PWM Frequency at 42kHz with Frequency Hopping to Reduce EMI Low Startup Current: 10μA Low Operating Current: 3.5mA Peak-Current-Mode Control in CV Mode Cycle-by-Cycle Current Limiting VDD Over-Voltage Protection with Auto-Restart VDD Under-Voltage Lockout (UVLO) Gate Output Maximum Voltage Clamped at 18V The green-mode function with a low startup current (10µA) maximizes the light-load efficiency so the power supply can meet stringent standby power regulations. Compared with a conventional secondary-side regulation approach, the FAN102 can reduce total cost, component count, size, and weight; while simultaneously increasing efficiency, productivity, and system reliability. A typical output CV/CC characteristic envelope is shown in Figure 1. Fixed Over-Temperature Protection with AutoRestart Applications Battery Chargers for Cellular Phones, Cordless Phones, PDA, Digital Cameras, Power Tools Replaces Linear Transformer and RCC SMPS Offline High Brightness (HB) LED Drivers Figure 1. Typical Output V-I Characteristic Ordering Information Part Number Operating Temperature Range FAN102MY -40°C to +105°C Eco Status Green Package Packing Method 8-Lead, Small Outline Package (SOP-8) Tape & Reel For Fairchild’s definition of Eco Status, please visit: http://www.fairchildsemi.com/company/green/rohs_green.html. © 2008 Fairchild Semiconductor Corporation FAN102 Rev. 1.0.3 www.fairchildsemi.com FAN102 — Primary-Side-Control PWM Controller April 2009 CS N2 R S N2 VO Bridge Rectifier Diode VDL + C DL R S N1 C S N1 R S TAR T - IO DR NS NP CO DS N D DD CDD AC Line FAN102 1 R C O MR C C O MR 2 3 4 CS G ATE C OMR V DD C OMI S G ND C OMV VS NA R G ATE 8 R S1 7 6 RC S 5 R S2 C C O MV C C O MI CS R C O MV R C O MI Figure 2. FAN102 — Primary-Side-Control PWM Controller Application Diagram Typical Application Internal Block Diagram VDD + VDD 7 S Q 28V R Q OTP Internal Bias + - Soft-Driver Protection Reset 8 VDD Good Gate 16V/5V OSC with Frequency Hopping S Q - R Q PWM Comparator PWM Comparator + + 1.3V Leading-Edge Blanking Slope Compensation IO Estimator + Green Mode Controller + EA_I 2.5V Cable Drop Compensation - GND Brownout Protection t DIS Detector 5 VS Temperature Compensation EA_V 6 VO Estimator 3 4 COMI Figure 3. © 2008 Fairchild Semiconductor Corporation FAN102 Rev. 1.0.3 1 CS + PWM Comparator 2 COMV COMR Functional Block Diagram www.fairchildsemi.com 2 F- Fairchild Logo Z- Plant Code X- 1-Digit Year Code Y- 1-Digit Week Code TT- 2-Digit Die Run Code T- Package Type (M=SOP) P- Z: Pb Free, Y: Green Package M- Manufacture Flow Code Figure 4. Top Mark Pin Configuration Figure 5. FAN102 — Primary-Side-Control PWM Controller Marking Information Pin Configuration Pin Definitions Pin # Name Description 1 CS 2 COMR Cable Compensation. This pin is connects a capacitor between COMR and GND for compensation voltage drop due to output cable loss in CV mode. 3 COMI Constant Current Loop Compensation. This pin is connects a capacitor and a resistor between COMI and GND for compensation current loop gain. 4 COMV Constant Voltage Loop Compensation. This pin is connects a capacitor and a resistor between COMV and GND for compensation voltage loop gain. 5 VS 6 GND Ground. 7 VDD Power Supply. IC operating current and MOSFET driving current are supplied using this pin. This pin is connected to an external VDD capacitor (typically 10μF). The threshold voltages for startup and turn-off are 16V and 5V, respectively. 8 GATE PWM Signal Output. This pin outputs PWM signal and includes the internal totem-pole output driver to drive the external power MOSFET. The clamped gate output voltage is 18V. Current Sense. This pin connects a current-sense resistor to sense the MOSFET current for peak-current-mode control in CV mode and provides for output-current regulation in CC mode. Voltage Sense. This pin detects the output voltage information and discharges time base on voltage of auxiliary winding. This pin connects two divider resistors and one capacitor. © 2008 Fairchild Semiconductor Corporation FAN102 Rev. 1.0.3 www.fairchildsemi.com 3 Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol Parameter Min. (1,2) VDD DC Supply Voltage Max. Unit 30 V VVS VS Pin Input Voltage -0.3 7.0 V VCS CS Pin Input Voltage -0.3 7.0 V VCOMV Voltage Error Amplifier Output Voltage -0.3 7.0 V VCOMI Voltage Error Amplifier Output Voltage -0.3 7.0 V PD Power Dissipation (TA＜50°C) 660 mW ΘJA Thermal Resistance (Junction-to-Air) 150 °C /W ΘJC Thermal Resistance (Junction-to-Case) TJ TSTG TL ESD Operating Junction Temperature Storage Temperature Range -55 Lead Temperature (Wave Soldering or IR, 10 Seconds) Electrostatic Discharge Capability, Human Body Model, JEDEC- JESD22_A114 Electrostatic Discharge Capability, Charged Device Model, JEDEC- JESD22_C101 39 °C /W +150 °C +150 °C +260 °C 4.5 kV 1250 V FAN102 — Primary-Side-Control PWM Controller Absolute Maximum Ratings Notes: 1. Stresses beyond those listed under ”absolute maximum ratings” may cause permanent damage to the device. 2. All voltage values, except differential voltages, are given with respect to GND pin. Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to Absolute Maximum Ratings. Symbol TA Parameter Conditions Operating Ambient Temperature © 2008 Fairchild Semiconductor Corporation FAN102 Rev. 1.0.3 Min. -40 Typ. Max. Unit +105 °C www.fairchildsemi.com 4 VDD=15V and TA=25°C unless otherwise specified. Symbol Parameter Conditions Min. Typ. Max. Units 25 V VDD Section VOP Continuously Operating Voltage VDD-ON Turn-On Threshold Voltage VDD-OFF Turn-Off Threshold Voltage 15 16 17 V 4.5 5.0 5.5 V 3.5 5.0 mA 1.6 10.0 μA 1 2 mA IDD-OP Operating Current VDD=20V, fs=fOSC, VVS=2V, VCS=3V, CL=1nF IDD-ST Startup Current 0< VDD < VDD-ON-0.16V IDD-GREEN Green-Mode Operating Supply Current VDD=20V, VVS=2.7V fS=fOSC-N-MIN, VCS=0V CL=1nF, VCOMV=0V VDD-OVP VDD Over-Voltage Protection Level VCS=3V, VVS=2.3V 27 28 29 V tD-VDDOVP VDD Over-Voltage Protection Debounce Time fs=fOSC, VVS=2.3V 100 250 400 μs Center Frequency TA=25°C 39 42 45 Frequency Hopping Range TA=25°C ±1.8 ±2.6 ±3.6 0 FAN102 — Primary-Side-Control PWM Controller Electrical Characteristics Oscillator Section fOSC Frequency tFHR Frequency Hopping Period TA=25°C fOSC-N-MIN Minimum Frequency at No Load fOSC-CM-MIN KHz 3 ms VVS=2.7V, VCOMV=0V 550 Hz Minimum Frequency at CCM VVS=2.3V, VCS=0.5V 20 KHz fDV Frequency Variation vs. VDD Deviation VDD=10V to 25V 5 % fDT Frequency Variation vs. Temperature Deviation TA=-40°C to +105°C 15 % Voltage-Sense Section IVS-UVP Itc VBIAS-COMV Sink Current for Brownout Protection RVS=20KΩ IC Compensation Bias Current Adaptive Bias Voltage Dominated by VCOMV VCOMV=0V, TA=25°C, RVS=20KΩ 180 μA 9.5 μA 1.4 V Current-Sense Section tPD Propagation Delay to GATE Output 100 200 ns tMIN-N Minimum On Time at No Load VVS=-0.8V, RS=2KΩ, VCOMV=1V 1100 ns tMINCC Minimum On Time in CC Mode VVS=0V, VCOMV=2V 400 ns VTH Threshold Voltage for Current Limit 1.3 V Continued on the following page… © 2008 Fairchild Semiconductor Corporation FAN102 Rev. 1.0.3 www.fairchildsemi.com 5 VDD=15V and TA=25°C unless otherwise specified. Symbol Parameter Conditions Min. Typ. Max. Units 2.475 2.500 2.525 V Voltage-Error-Amplifier Section VVR Reference Voltage VN Green Mode Starting Voltage on fS=fOSC-2KHz, VVS=2.3V COMV Pin 2.8 V VG Green Mode Ending Voltage on COMV Pin fS=1KHz 0.8 V Output Sink Current VVS=3V, VCOMV=2.5V 90 μA 90 μA IV-SINK IV-SOURCE VV-HGH Output Source Current VVS=2V, VCOMV=2.5V Output High Voltage VVS=2.3V 4.5 V Current-Error-Amplifier Section VIR Reference Voltage II-SINK Output Sink Current II-SOURCE VI-HGH 2.475 VCS=3V, VCOMI=2.5V Output Source Current VCS=0V, VCOMI=2.5V Output High Voltage VCS=0V 2.500 2.525 V 55 μA 55 μA 4.5 V Cable Compensation Section VCOMR Variation Test Voltage on COMR RCOMR=100KΩ Pin for Cable Compensation 0.735 V 75 % FAN102 — Primary-Side-Control PWM Controller Electrical Characteristics Gate Section DCYMAX Maximum Duty Cycle VOL Output Voltage LOW VDD=20V, IO=10mA VOH Output Voltage HIGH VDD=8V, IO=1mA 5 V VOH_MIN Output Voltage HIGH VDD=5.5V, IO=1mA 4 V tr Rising Time VDD=20V, CL=1nF 200 300 ns tf Falling Time VDD=20V, CL=1nF 80 150 ns Output Clamp Voltage VDD=25V 15 18 V VCLAMP 1.5 V Over-Temperature-Protection Section TOTP Threshold Temperature for (3) OTP +140 °C Note: 3. When over-temperature protection is activated, the power system enters auto restart mode and output is disabled. © 2008 Fairchild Semiconductor Corporation FAN102 Rev. 1.0.3 www.fairchildsemi.com 6 5.5 16.6 5.3 16.2 VDD-OFF (V) VDD-ON (V) 17 15.8 15.4 5.1 4.9 4.7 15 14.6 -40 -30 -15 0 25 50 75 85 100 4.5 125 -40 -30 -15 0 Temperature (ºC) Figure 6. Turn-On Threshold Voltage (VDD-ON) vs. Temperature Figure 7. 75 85 100 125 Turn-Off Threshold Voltage (VDD-OFF) vs. Temperature 45 fOSC (KHz) 3.6 IDD-OP (mA) 50 47 4 3.2 2.8 2.4 43 41 39 37 2 -40 -30 -15 0 25 50 75 85 100 35 125 -40 -30 -15 Temperature (ºC) Figure 8. 0 25 50 75 85 100 125 Temperature (ºC) Operating Current (IDD-OP) vs. Temperature Figure 9. 2.525 2.525 2.515 2.515 2.505 2.505 VIR (V) VVR (V) 25 Temperature (ºC) FAN102 — Primary-Side-Control PWM Controller Typical Performance Characteristics 2.495 2.485 Center Frequency (fOSC) vs. Temperature 2.495 2.485 2.475 -40 -30 -15 0 25 50 75 85 100 2.475 125 -40 Temperature (ºC) -15 0 25 50 75 85 100 125 Temperature (ºC) Figure 10. Reference Voltage (VVR) vs. Temperature © 2008 Fairchild Semiconductor Corporation FAN102 Rev. 1.0.3 -30 Figure 11. Reference Voltage (VIR) vs. Temperature www.fairchildsemi.com 7 23 600 22 fOSC-CM-MIN (KHz) fOSC-N-MIN (Hz) 580 560 540 520 21 20 19 18 500 -40 -30 -15 0 25 50 75 85 100 17 125 -40 -30 -15 Temperature (ºC) 25 75 85 100 125 Figure 13. Minimum Frequency at CCM (fOSC-CM-MIN) vs. Temperature 30 1250 25 1170 tMIN-N (ns) 20 15 10 1090 1010 930 5 0 -40 -30 -15 0 25 50 75 85 100 850 125 -40 -30 -15 0 Temperature (ºC) 25 50 75 85 100 125 Temperature (ºC) Figure 14. Green Mode Frequency Decreasing Rate (SG) vs. Temperature Figure 15. Minimum On Time at No Load (tMIN-N) vs. Temperature 3 1 2.5 0.8 VG (V) 2 VN (V) 50 Temperature (ºC) Figure 12. Minimum Frequency at No Load (fOSC-N-MIN) vs. Temperature SG (KHz/V) 0 FAN102 — Primary-Side-Control PWM Controller Typical Performance Characteristics 1.5 0.6 0.4 1 0.2 0.5 0 -40 -30 -15 0 25 50 75 85 100 0 125 -40 Temperature (ºC) Figure 16. Green Mode Starting Voltage on COMV Pin (VN) vs. Temperature © 2008 Fairchild Semiconductor Corporation FAN102 Rev. 1.0.3 -30 -15 0 25 50 75 85 100 125 Temperature (ºC) Figure 17. Green Mode Ending Voltage on COMV Pin (VG) vs. Temperature www.fairchildsemi.com 8 95 92 91 IV-SOURCE (µA) IV-SINK (µA) 95 89 86 83 87 83 79 80 -40 -30 -15 0 25 50 75 85 100 75 125 -40 -30 -15 0 Temperature (ºC) 50 75 85 100 125 Figure 19. Output Source Current (IV-SOURCE) vs. Temperature 60 60 58 58 II-SOURCE (µA) II-SINK (µA) Figure 18. Output Sink Current (IV-SINK) vs. Temperature 56 54 52 56 54 52 50 -40 -30 -15 0 25 50 75 85 100 50 125 -40 -30 -15 0 Temperature (ºC) 25 50 75 85 100 125 Temperature (ºC) Figure 20. Output Sink Current (II-SINK) vs. Temperature Figure 21. Output Source Current (II-SOURCE) vs. Temperature 2 80 1.6 76 DCYMAX (%) VCOMR (V) 25 Temperature (ºC) FAN102 — Primary-Side-Control PWM Controller Typical Performance Characteristics 1.2 0.8 0.4 72 68 64 0 -40 -30 -15 0 25 50 75 85 100 60 125 -40 Temperature (ºC) -15 0 25 50 75 85 100 125 Temperature (ºC) Figure 22. Variation Test Voltage on COMR Pin for Cable Compensation (VCOMR) vs. Temperature © 2008 Fairchild Semiconductor Corporation FAN102 Rev. 1.0.3 -30 Figure 23. Maximum Duty Cycle (DCYMAX) vs. Temperature www.fairchildsemi.com 9 Figure 24 shows the basic circuit diagram of primaryside regulated flyback converter with typical waveforms shown in Figure 25. Generally, discontinuous conduction mode (DCM) operation is preferred for primary-side regulation since it allows better output regulation. The operation principles of DCM flyback converter are as follows: Io D + V DL Lm VO Ids EA_I VCOMI L O A D - Gate CS Io Estimator RCS Ref VS t DIS Detector PWM Control When the MOSFET is turned off, the energy stored in the inductor forces the rectifier diode (D) to turn on. While the diode is conducting, the output voltage (Vo), together with diode forward voltage drop (VF), are 2 applied across the secondary-side inductor (Lm×Ns / 2 Np ) and the diode current (ID) decreases linearly from the peak value (Ipk×Np/Ns) to zero. At the end of inductor current discharge time (tDIS), all the energy stored in the inductor has been delivered to the output. + + VF - - VAC During the MOSFET ON time (tON), input voltage (VDL) is applied across the primary-side inductor (Lm). Then MOSFET current (Ids) increases linearly from zero to the peak value (Ipk). During this time, the energy is drawn from the input and stored in the inductor. V COMV NA VDD Vo Estimator EA_V RS1 Ref RS2 Primary-Side Regulation Controller + Vw - Figure 24. Simplified PSR Flyback Converter Circuit When the diode current reaches zero, the transformer auxiliary winding voltage (VW) begins to oscillate by the resonance between the primary-side inductor (Lm) and the effective capacitor loaded across MOSFET. Id s (MOSFET Drain-to-Source Current) I pk During the inductor current discharge time, the sum of output voltage and diode forward voltage drop is reflected to the auxiliary winding side as (VO+VF)× NA/NS. Since the diode forward voltage drop decreases as current decreases, the auxiliary winding voltage reflects the output voltage best at the end of diode conduction time where the diode current diminishes to zero. By sampling the winding voltage at the end of the diode conduction time, the output voltage information can be obtained. The internal error amplifier for output voltage regulation (EA_V) compares the sampled voltage with internal precise reference to generate error voltage (VCOMV), which determines the duty cycle of the MOSFET in CV mode. ID (Diode Current) I pk • NP NS I D .avg = I o VW (Auxiliary Winding Voltage) VF • Meanwhile, the output current can be estimated using the peak drain current and inductor current discharge time since output current is same as average of the diode current in steady state. The output current estimator picks up the peak value of the drain current with a peak detection circuit and calculates the output current using the inductor discharge time (tDIS) and switching period (tS). The output information is compared with internal precise reference to generate error voltage (VCOMI), which determines the duty cycle of the MOSFET in CC mode. NA NS VO • t ON t t NA NS DI S S Figure 25. Key Waveforms of DCM Flyback Converter Among the two error voltages, VCOMV and VCOMI, the smaller actually determines the duty cycle. During constant voltage regulation mode, VCOMV determines the duty cycle while VCOMI is saturated to high. During constant current regulation mode, VCOMI determines the duty cycle while VCOMV is saturated to HIGH. © 2008 Fairchild Semiconductor Corporation FAN102 Rev. 1.0.3 ID Np:Ns FAN102 — Primary-Side-Control PWM Controller Functional Description www.fairchildsemi.com 10 Switching Frequen cy When it comes to cellular phone charger applications, the actual battery is located at the end of cable, which causes typically several percent of voltage drop on the actual battery voltage. FAN102 has a programmable cable voltage drop compensation, which provides a constant output voltage at the end of the cable over the entire load range in CV mode. As load increases, the voltage drop across the cable is compensated by increasing the reference voltage of voltage regulation error amplifier. The amount of compensation is programmed by the resistor on the COMR pin. The relationship between the amount of compensation and COMR resistor is shown in Figure 26. 42kHz Deep Green Mode 15 14 Normal Mode 550H z 13 0.8V 12 V COMV 2.8V Figure 27. Switching Frequency in Green Mode 11 Compensation Percentage (%) Green Mode 10 Frequency Hopping 9 EMI reduction is accomplished by frequency hopping, which spreads the energy over a wider frequency range than the bandwidth measured by the EMI test equipment. FAN102 has an internal frequency hopping circuit that changes the switching frequency between 39.4kHz and 44.6kHz with a period of 3ms, as shown in Figure 28. 8 7 6 5 4 3 FAN102 — Primary-Side-Control PWM Controller Cable Voltage Drop Compensation Gate Drive Signal 2 1 10 20 30 40 50 60 RCOMR (k ) 70 80 90 100 t s t s t s Figure 26. Cable Voltage Drop Compensation Temperature Compensation Built-in temperature compensation provides constant voltage regulation over a wide range of temperature variation. This internal compensation current compensates the forward-voltage drop variation of the secondary-side rectifier diode. fs Green-Mode Operation 44.6kHz 42.0kHz 39.4kHz The FAN102 uses voltage regulation error amplifier output (VCOMV) as an indicator of the output load and modulates the PWM frequency, as shown in Figure 27, such that the switching frequency decreases as load decreases. In heavy load conditions, the switching frequency is fixed at 42KHz. Once VCOMV decreases below 2.8V, the PWM frequency starts to linearly decrease from 42KHz to 550Hz to reduce the switching losses. As VCOMV decreases below 0.8V, the switching frequency is fixed at 550Hz and FAN102 enters deep green mode, where the operating current reduces to 1mA, further reducing the standby power consumption. © 2008 Fairchild Semiconductor Corporation FAN102 Rev. 1.0.3 44.6kHz t 3ms Figure 28. Frequency Hopping www.fairchildsemi.com 11 At the instant the MOSFET is turned on, a high-current spike occurs through the MOSFET, caused by primaryside capacitance and secondary-side rectifier reverse recovery. Excessive voltage across the RCS resistor can lead to premature turn-off of MOSFET. FAN102 employs an internal leading-edge blanking (LEB) circuit. To inhibit the PWM comparator for a short time after the MOSFET is turned on. Thus, external RC filtering is not required. VDS Startup Fault Occurs Power On Fault Removed VDD Figure 29 shows the typical startup circuit and transformer auxiliary winding for a FAN102 application. Before FAN102 begins switching, it consumes only startup current (typically 10µA) and the current supplied through the startup resistor charges the VDD capacitor (CDD). When VDD reaches turn-on voltage of 16V (VDDFAN102 begins switching and the current ON), consumed by FAN102 increases to 3.5mA. Then, the power required for FAN102 is supplied from the transformer auxiliary winding. The large hysteresis of VDD provides more holdup time, which allows using a small capacitor for VDD. 16V 5V Operating Current 3.5mA 10µA VD L + CD L - Normal Operation Np RSTAR T CD D VDD Over-Voltage Protection (OVP) VDD over-voltage protection prevents damage from overvoltage conditions. If the VDD voltage exceeds 28V by open feedback condition, OVP is triggered. The OVP has a de-bounce time (typcal 250µs) to prevent false trigger by switching noise. It also protects other switching devices from over voltage. NA FAN102 1 2 3 4 CS COMI Over-Temperature Protection (OTP) A built-in temperature-sensing circuit shuts down PWM output if the junction temperature exceeds 140°C. GATE 8 VDD COMR SGND COMV VS 7 RS1 6 Brownout Protection FAN102 detects the line voltage using auxiliary winding voltage since the auxiliary winding voltage reflects the input voltage when the MOSFET is turned on. The VS pin is clamped at 1.15V while the MOSFET is turned on and brownout protection is triggered if the current out of the VS pin is less than IVS-UVP (typical 180µA) during the MOSFET conduction. 5 RS2 Figure 29. Startup Circuit Pulse-by-Pulse Current Limit When the sensing voltage across the current sense resistor exceeds the internal threshold of 1.4V, the MOSFET is turned off for the remainder of switching cycle. In normal operation, the pulse-by-pulse current limit is not triggered since the peak current is limited by the control loop. Protections The FAN102 has several self-protective functions, such as Over-Voltage Protection (OVP), Over-Temperature Protection (OTP) and brownout protection. All the protections are implemented as auto-restart mode. Once the fault condition occurs, switching is terminated and the MOSFET remains off. This causes VDD to fall. When VDD reaches the VDD turn-off voltage of 5V, the current consumed by FAN102 reduces to the startup current (typically 10µA) and the current supplied startup resistor charges the VDD capacitor. When VDD reaches the turn-on voltage of 16V, FAN102 resumes normal © 2008 Fairchild Semiconductor Corporation FAN102 Rev. 1.0.3 Normal Operation Figure 30. Auto-Restart Operation DD D AC Line Fault Situation FAN102 — Primary-Side-Control PWM Controller operation. In this manner, the auto-restart alternately enables and disables the switching of the MOSFET until the fault condition is eliminated (see Figure 30 ). Leading-Edge Blanking (LEB) www.fairchildsemi.com 12 FAN102 — Primary-Side-Control PWM Controller Typical Application Circuit (Primary-Side Regulated Flyback Charger) Application Fairchild Devices Input Voltage Range Output Cell Phone Charger FAN102 90~265VAC 5V/0.78A (3.9W) Features SM High efficiency (>68% at full load) meeting Energy Star V2.0 and CEC regulation with enough margin Low standby power consumption (Pin=0.087W for 115VAC and Pin=0.123W for 230V) Tight output regulation (CV:±5%, CC:±7%) 74 6 72 5 115V60Hz (70.7% avg) Output Voltage (V) Efficiency (%) 70 230V50Hz (68.3% avg) 68 66.3% : Energy Star V2.0 (Nov. 2008) 66 4 3 AC90V AC120V AC230V AC264V 2 64 1 62 62.2% : CEC (2008) 25 50 75 0 100 0 100 200 300 Load (%) 400 500 600 700 800 900 Output Current (mA) Figure 31. Measured Efficiency and Output Regulation 1nF 30Ω CSN 2 RSN 2 LP 15µH 1mH 1N4007 1N4007 1N4007 VO CDL1 4.7µF 1N4007 RSN1 VDL + 1kΩ CDL2 4.7µF IO 100kΩ RSTART - 2MΩ DR CS N1 RDAMP 270Ω DDD N1 1nF N3 SB260 CO 470µF CP 220µF RPL 1kΩ DS N 1N4007 1N4007 CDD AC Line QMOSFE T FAN102 1 RCOMR CCOMR 82kΩ N2 10µF 2 1µF 3 4 CS C OMR C OMI C OMV GATE 8 V DD S G ND VS 7 RGATE FQU1N60C RS1 100Ω 115kΩ 6 5 RCS 1.6Ω RS2 24.9kΩ 10nF 68nF CCOMI 200kΩRCOMI CCOMV CS RCOMV 47pF 43kΩ Figure 32. Schematic of Typical Application Circuit © 2008 Fairchild Semiconductor Corporation FAN102 Rev. 1.0.3 www.fairchildsemi.com 13 FAN102 — Primary-Side-Control PWM Controller Typical Application Circuit (Continued) Transformer specification Core: EE16 Bobbin: EE16 Pin Specification Primary-Side Inductance 1－3 2.3mH ± 5% 100kHz, 1V Primary-Side Effective Leakage 1－8 65μH ± 5%. Short one of the secondary windings © 2008 Fairchild Semiconductor Corporation FAN102 Rev. 1.0.3 Remark www.fairchildsemi.com 14 5.00 4.80 A 0.65 3.81 8 5 B 6.20 5.80 PIN ONE INDICATOR 1.75 4.00 3.80 1 5.60 4 1.27 (0.33) 0.25 M 1.27 C B A LAND PATTERN RECOMMENDATION 0.25 0.10 SEE DETAIL A 1.75 MAX R0.10 0.25 0.19 C 0.10 0.51 0.33 0.50 x 45° 0.25 C OPTION A - BEVEL EDGE GAGE PLANE R0.10 8° 0° 0.90 0.406 FAN102 — Primary-Side-Control PWM Controller Physical Dimensions OPTION B - NO BEVEL EDGE 0.36 NOTES: UNLESS OTHERWISE SPECIFIED A) THIS PACKAGE CONFORMS TO JEDEC MS-012, VARIATION AA, ISSUE C, B) ALL DIMENSIONS ARE IN MILLIMETERS. C) DIMENSIONS DO NOT INCLUDE MOLD FLASH OR BURRS. D) LANDPATTERN STANDARD: SOIC127P600X175-8M. E) DRAWING FILENAME: M08AREV13 SEATING PLANE (1.04) DETAIL A SCALE: 2:1 Figure 33. 8-Lead, Small Outline Package (SOP-8) Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. © 2008 Fairchild Semiconductor Corporation FAN102 Rev. 1.0.3 www.fairchildsemi.com 15 FAN102 — Primary-Side-Control PWM Controller © 2008 Fairchild Semiconductor Corporation FAN102 Rev. 1.0.3 www.fairchildsemi.com 16