ESD7361, SZESD7361 ESD Protection Diodes Low Capacitance ESD Protection Diode for High Speed Data Line The ESD7361 Series ESD protection diodes are designed to protect high speed data lines from ESD. Ultra−low capacitance make this device an ideal solution for protecting voltage sensitive high speed data lines. www.onsemi.com MARKING DIAGRAMS Features 2 IEC61000−4−2 (ESD): Level 4 ±15 kV Contact ♦ IEC61000−4−4 (EFT): 40 A −5/50 ns ♦ IEC61000−4−5 (Lightning): 1 A (8/20 ms) ISO 10605 (ESD) 330 pF/2 kW ±15 kV Contact SZ Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q101 Qualified and PPAP Capable These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant ♦ • • • Typical Applications 1 2 SOD−523 CASE 502 1 7H M 7X 1 2 SOD−923 CASE 514AB X, XX M • Wireless Charger • Near Field Communications 2M = Specific Device Code = Date Code PIN CONFIGURATION AND SCHEMATIC MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) Rating Symbol Value Unit Operating Junction Temperature Range TJ −55 to +125 °C Storage Temperature Range Tstg −55 to +150 °C Lead Solder Temperature − Maximum (10 Seconds) TL 260 °C ESD ESD ESD ±15 ±15 ±15 kV kV kV IEC 61000−4−2 Contact (ESD) IEC 61000−4−2 Air (ESD) ISO 10605 330 pF/2 kW Contact (ESD) SOD−323 CASE 477 M • Low Capacitance (0.55 pF Max, I/O to GND) • Protection for the Following IEC Standards: 1 Cathode 2 Anode ORDERING INFORMATION See detailed ordering and shipping information on page 6 of this data sheet. Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. © Semiconductor Components Industries, LLC, 2016 November, 2016 − Rev. 3 1 Publication Order Number: ESD7361/D ESD7361, SZESD7361 ELECTRICAL CHARACTERISTICS I (TA = 25°C unless otherwise noted) IF Parameter Symbol IPP Maximum Reverse Peak Pulse Current VC Clamping Voltage @ IPP VRWM VC VBR VRWM Working Peak Reverse Voltage IR VBR V IR VF IT Maximum Reverse Leakage Current @ VRWM Breakdown Voltage @ IT IT Test Current *See Application Note AND8308/D for detailed explanations of datasheet parameters. IPP Uni−Directional TVS ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise specified) Parameter Symbol Reverse Working Voltage Conditions Min Typ Max Unit 5 16 V 1000 1000 nA nA VRWM Breakdown Voltage VBR IT = 1 mA; pin 1 to pin 2 16.5 V Reverse Leakage Current IR VRWM = 5.0 V VRWM = 15 V <1 20 Clamping Voltage (Note 2) VC IPP = 8 A 31 V Clamping Voltage (Note 2) VC IPP = 16 A 34 V Junction Capacitance CJ VR = 0 V, f = 1 MHz VR = 0 V, f < 1 GHz Dynamic Resistance RDYN Insertion Loss 0.55 0.55 pF TLP Pulse 0.735 W f = 1 MHz f = 5 GHz 0.01 2 dB Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 1. For test procedure see Figures 9 and 10 and application note AND8307/D. 2. ANSI/ESD STM5.5.1 − Electrostatic Discharge Sensitivity Testing using Transmission Line Pulse (TLP) Model. TLP conditions: Z0 = 50 W, tp = 100 ns, tr = 4 ns, averaging window; t1 = 30 ns to t2 = 60 ns. 1.E−03 1 1.E−04 0.8 CAPACITANCE (pF) CURRENT (A) 1.E−05 1.E−06 1.E−07 1.E−08 1.E−09 1.E−10 1.E−11 0.6 0.4 0.2 1.E−12 1.E−13 0 5 10 15 20 25 30 0 0 2 4 6 8 10 12 14 VOLTAGE (V) VBias (V) Figure 1. Typical IV Characteristics Figure 2. Typical CV Characteristics www.onsemi.com 2 16 18 ESD7361, SZESD7361 1 0.9 0 0.8 CAPACITANCE (pF) 1 0.5 S21 (dB) −0.5 −1 −1.5 −2 −2.5 0.7 0.6 0.5 0.4 0.3 −3 0.2 −3.5 0.1 −4 1.E+07 1.E+08 0 1.E+07 1.E+09 5.E+08 1.E+09 Figure 4. Typical Capacitance Over Frequency ESD7361HT1G (SOD323) 1 0.5 0.9 0 0.8 CAPACITANCE (pF) 1 S21 (dB) −0.5 −1 −1.5 −2 −2.5 0.7 0.6 0.5 0.4 0.3 −3 0.2 −3.5 0.1 1.E+08 0 1.E+07 1.E+09 1.E+09 FREQUENCY (Hz) 1 1 0.9 0 0.8 −0.5 0.7 CURRENT (A) S21 (dB) 3.E+09 4.E+09 Figure 6. Typical Capacitance Over Frequency ESD7361XV2T1G (SOD523) 0.5 −1 −1.5 −2 −2.5 0.6 0.5 0.4 0.3 −3 0.2 −3.5 0.1 1.E+08 2.E+09 FREQUENCY (Hz) Figure 5. Typical Insertion Loss ESD7361XV2T1G (SOD523) −4 1.E+07 2.E+09 3.E+09 FREQUENCY (Hz) FREQUENCY (Hz) Figure 3. Typical Insertion Loss ESD7361HT1G (SOD323) −4 1.E+07 2.E+09 0 1.E+07 1.E+09 1.E+09 2.E+09 3.E+09 4.E+09 FREQUENCY (Hz) FREQUENCY (Hz) Figure 7. Typical Insertion Loss ESD7361P2T5G (SOD923) Figure 8. Typical Capacitance Over Frequency ESD7361P2T5G (SOD923) www.onsemi.com 3 ESD7361, SZESD7361 IEC61000−4−2 Waveform IEC 61000−4−2 Spec. Ipeak Level Test Voltage (kV) First Peak Current (A) Current at 30 ns (A) Current at 60 ns (A) 1 2 7.5 4 2 2 4 15 8 4 3 6 22.5 12 6 4 8 30 16 8 100% 90% I @ 30 ns I @ 60 ns 10% tP = 0.7 ns to 1 ns Figure 9. IEC61000−4−2 Spec ESD Gun Oscilloscope TVS 50 W Cable 50 W Figure 10. Diagram of ESD Clamping Voltage Test Setup The following is taken from Application Note AND8308/D − Interpretation of Datasheet Parameters for ESD Devices. systems such as cell phones or laptop computers it is not clearly defined in the spec how to specify a clamping voltage at the device level. ON Semiconductor has developed a way to examine the entire voltage waveform across the ESD protection diode over the time domain of an ESD pulse in the form of an oscilloscope screenshot, which can be found on the datasheets for all ESD protection diodes. For more information on how ON Semiconductor creates these screenshots and how to interpret them please refer to AND8307/D. ESD Voltage Clamping For sensitive circuit elements it is important to limit the voltage that an IC will be exposed to during an ESD event to as low a voltage as possible. The ESD clamping voltage is the voltage drop across the ESD protection diode during an ESD event per the IEC61000−4−2 waveform. Since the IEC61000−4−2 was written as a pass/fail spec for larger www.onsemi.com 4 25 −25 20 −20 TLP CURRENT (A) TLP CURRENT (A) ESD7361, SZESD7361 15 10 −15 −10 −5 5 0 0 0 NOTE: 5 10 15 20 25 30 35 40 0 −2 −4 −6 −8 −10 −12 VC, VOLTAGE (V) VC, VOLTAGE (V) Figure 11. Positive TLP I−V Curve Figure 12. Negative TLP I−V Curve −14 TLP parameter: Z0 = 50 W, tp = 100 ns, tr = 300 ps, averaging window: t1 = 30 ns to t2 = 60 ns. VIEC is the equivalent voltage stress level calculated at the secondary peak of the IEC 61000−4−2 waveform at t = 30 ns with 2 A/kV. See TLP description below for more information. Transmission Line Pulse (TLP) Measurement L Transmission Line Pulse (TLP) provides current versus voltage (I−V) curves in which each data point is obtained from a 100 ns long rectangular pulse from a charged transmission line. A simplified schematic of a typical TLP system is shown in Figure 13. TLP I−V curves of ESD protection devices accurately demonstrate the product’s ESD capability because the 10s of amps current levels and under 100 ns time scale match those of an ESD event. This is illustrated in Figure 14 where an 8 kV IEC 61000−4−2 current waveform is compared with TLP current pulses at 8 A and 16 A. A TLP I−V curve shows the voltage at which the device turns on as well as how well the device clamps voltage over a range of current levels. 50 W Coax Cable S Attenuator ÷ 50 W Coax Cable 10 MW IM VM DUT VC Oscilloscope Figure 13. Simplified Schematic of a Typical TLP System Figure 14. Comparison Between 8 kV IEC 61000−4−2 and 8 A and 16 A TLP Waveforms www.onsemi.com 5 ESD7361, SZESD7361 ORDERING INFORMATION Package Shipping† ESD7361HT1G SOD−323 (Pb−Free) 3000 / Tape & Reel ESD7361XV2T1G SOD−523 (Pb−Free) 3000 / Tape & Reel ESD7361P2T5G SOD−923 (Pb−Free) 8000 / Tape & Reel SZESD7361HT1G SOD−323 (Pb−Free) 3000 / Tape & Reel SZESD7361XV2T1G SOD−523 (Pb−Free) 3000 / Tape & Reel SZESD7361P2T5G SOD−923 (Pb−Free) 8000 / Tape & Reel Device †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. www.onsemi.com 6 ESD7361, SZESD7361 PACKAGE DIMENSIONS SOD−323 CASE 477−02 ISSUE H NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. LEAD THICKNESS SPECIFIED PER L/F DRAWING WITH SOLDER PLATING. 4. DIMENSIONS A AND B DO NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. 5. DIMENSION L IS MEASURED FROM END OF RADIUS. HE D b 1 2 E MILLIMETERS DIM MIN NOM MAX A 0.80 0.90 1.00 A1 0.00 0.05 0.10 A3 0.15 REF b 0.25 0.32 0.4 C 0.089 0.12 0.177 D 1.60 1.70 1.80 E 1.15 1.25 1.35 L 0.08 HE 2.30 2.50 2.70 A3 A C NOTE 3 L NOTE 5 A1 SOLDERING FOOTPRINT* 0.63 0.025 0.83 0.033 1.60 0.063 2.85 0.112 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. www.onsemi.com 7 INCHES NOM MAX 0.035 0.040 0.002 0.004 0.006 REF 0.010 0.012 0.016 0.003 0.005 0.007 0.062 0.066 0.070 0.045 0.049 0.053 0.003 0.090 0.098 0.105 MIN 0.031 0.000 ESD7361, SZESD7361 PACKAGE DIMENSIONS SOD−523 CASE 502 ISSUE E −X− D NOTES: 6. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 7. CONTROLLING DIMENSION: MILLIMETERS. 8. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. 9. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. −Y− E 2X b 0.08 1 M 2 X Y DIM A b c D E HE L L2 TOP VIEW A c HE RECOMMENDED SOLDERING FOOTPRINT* SIDE VIEW 2X 2X 0.48 L L2 BOTTOM VIEW 1.80 2X 0.40 PACKAGE OUTLINE 2X MILLIMETERS MIN NOM MAX 0.50 0.60 0.70 0.25 0.30 0.35 0.07 0.14 0.20 1.10 1.20 1.30 0.70 0.80 0.90 1.50 1.60 1.70 0.30 REF 0.15 0.20 0.25 DIMENSION: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. www.onsemi.com 8 ESD7361, SZESD7361 PACKAGE DIMENSIONS SOD−923 CASE 514AB ISSUE C NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. 4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. −X− D −Y− E 1 2X b 0.08 X Y 2 DIM A b c D E HE L L2 TOP VIEW A c MILLIMETERS MIN NOM MAX 0.34 0.37 0.40 0.15 0.20 0.25 0.07 0.12 0.17 0.75 0.80 0.85 0.55 0.60 0.65 0.95 1.00 1.05 0.19 REF 0.05 0.10 0.15 SOLDERING FOOTPRINT* HE SIDE VIEW 1.20 2X 2X 2X 0.36 L PACKAGE OUTLINE 2X INCHES MIN NOM MAX 0.013 0.015 0.016 0.006 0.008 0.010 0.003 0.005 0.007 0.030 0.031 0.033 0.022 0.024 0.026 0.037 0.039 0.041 0.007 REF 0.002 0.004 0.006 L2 0.25 DIMENSIONS: MILLIMETERS See Application Note AND8455/D for more mounting details BOTTOM VIEW *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor 19521 E. 32nd Pkwy, Aurora, Colorado 80011 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Email: [email protected] ◊ N. American Technical Support: 800−282−9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81−3−5817−1050 www.onsemi.com 9 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative ESD7361/D