Rohm BU1S12S1AG-TR Successive approximation a/d converter Datasheet

Datasheet
AD Converter Series
Successive Approximation A/D Converter
12bit, 0.5M to 1MSPS, 2.7 to 5.25V,
1-channel, SPITM Interface
BU1S12S1AG-LB
General Description
Key Specifications
 Supply Voltage Range:
 Sampling Rate:
 Power Consumption
In 1MSPS Operation:
This is the product guarantees long time support in
Industrial market.
The BU1S12S1AG-LB is a general purpose, 12-bit
1-channel successive approximation AD converter. The
sampling rate of BU1S12S1AG-LB ranges from
0.5MSPS to 1MSPS.





Features
Long Time Support Product for Industrial Applications
Maximum 1MSPS Sampling Rate
Low Power Consumption
Small SSOP6 Package Compatible with SOT23-6
Serial Interface Compatible with
TM
TM
TM
SPI /QSPI /MICROWIRE
 Operational Supply Voltage Range: 2.7V to 5.25V
 Single-ended Input
 Output Code in Straight Binary Format





2.7V to 5.25V
0.5MSPS to 1MSPS
8mW @VA=5V (Typ)
1.5mW @VA=3V (Typ)
INL:
-1.1 to +1.0 LSB
DNL:
-0.9 to +1.0 LSB
SNR:
71.5dB @ VA=3V (Typ)
SINAD:
71dB @ VA=3V (Typ)
Operational Temperature Range: -40°C to +105°C
Package
SSOP6
W(Typ) x D(Typ) x H(Max)
2.90mm x 2.80mm x 1.25mm
Applications




Industrial Equipment
Instrumentation and Control Systems
Motor Control Systems
Data Acquisition Systems
SSOP6
Figure 1. Package Outline
Typical Application Circuit
Figure 2 shows a typical application circuit of BU1S12S1AG-LB.
VOLTAGE
REFERENCE
10µF
ANALOG
SIGNAL
SOURCE
VA
0.1µF
CSB
BU1S12S1AG-LB
330Ω
SCLK
330Ω
VIN
22Ω
MICROPROCESSOR
or
DSP
SDATA
GND
1000pF
to 0.1µF
100Ω
Figure 2. Typical Application Circuit
〇Product structure : Silicon monolithic integrated circuit
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〇This product has no designed protection against radioactive rays
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Pin Configuration
(TOP VIEW)
VA
1
6
CSB
GND
2
5
SDATA
VIN
3
4
SCLK
Figure 3. Pin Configuration
Pin Descriptions
Pin No.
Pin Name
Description
1
VA
Power supply pin. This voltage is the full scale of the analog input.
2
GND
Ground pin. This voltage level is the zero scale of the analog input.
3
VIN
Analog input pin. The voltage range must be between 0V and VA.
4
SCLK
Digital clock input pin.
5
SDATA
Digital data output pin.
6
CSB
Chip select pin. A/D conversion starts at the falling edge of this signal.
Block Diagram
VIN
TRACK/HOLD
12-BIT
SUCCESSIVE
APPROXIMATION
ADC
SCLK
CONTROL
LOGIC
CSB
SDATA
Figure 4. Block Diagram
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Absolute Maximum Ratings (Ta=25°C)
Parameter
Symbol
Ratings
Unit
Supply Voltage
VA
5.7
V
Analog Input Voltage
VIN
-0.3 to VA +0.3
V
Digital Input Voltage
VDIN
-0.3 to 5.7
V
(Note1)
W
Power Dissipation
PD
0.54
Junction Temperature
TJmax
125
°C
Storage Temperature
Tstg
-55 to +125
°C
(Note 1) Derate by 5.4mW/°C when operating above Ta=25°C. (when mounted on a 70mm×70mm×1.6mm, 1-layer, glass-epoxy board.)
Caution: Operating the IC over the absolute maximum ratings may damage the IC. The damage can either be a short circuit between pins or an open circuit
between pins and the internal circuitry. Therefore, it is important to consider circuit protection measures, such as adding a fuse, in case the IC is operated over
the absolute maximum ratings.
Recommended Operational Conditions
Parameter
Symbol
Ratings
Unit
Supply Voltage
VA
2.7 to 5.25
V
Analog Input Voltage
VIN
0 to VA
V
Digital Input Voltage
VDIN
0 to 5.25
V
Operational Temperature
Topr
-40 to +105
°C
Clock Frequency
fSCLK
10 to 20
MHz
fS
0.5 to 1
MSPS
Sampling Rate
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Electrical Characteristics
Unless otherwise specified, Ta=-40°C to +105°C (typical: Ta=25°C), VA=2.7 to 5.25V, fSCLK=20MHz, fS=1MSPS
Limits
Parameter
Symbol
Unit
Condition
Min
Typ
Max
Statistic Converter Characteristics
Resolution with No missing codes
RES
12
bit
VA=2.7 to 3.6V
Integral Non-Linearity
INL
-1.1
+1.0
LSB
VA=2.7 to 3.6V
Differential Non-Linearity
DNL
-0.9
+1.0
LSB
VA=2.7 to 3.6V
Offset Error
OE
-1.2
±0.2
+1.2
LSB
VA=2.7 to 3.6V
Gain Error
GE
-1.2
±0.3
+1.2
LSB
VA=2.7 to 3.6V
Dynamic Converter Characteristics
Signal-to-Noise and Distortion Ratio
Total Harmonic Distortion
Spurious-Free Dynamic Range
Effective Number of Bits
THD
SFDR
ENOB
Inter-modulation Distortion 1,
(Second Order Term)
Inter-modulation Distortion 2,
(Third Order term)
Full Power Band Width 1
Full Power Band Width 2
Aperture Delay
Aperture Jitter
Clock Frequency
Sampling Rate
Track/Hold Acquisition Time
IMD1
70
68
70.8
68.8
11.3
11.0
-
IMD2
-
-76
-
dB
FPBW1
FPBW2
tAD
tAJ
fSCLK
fS
tACQ
10
500k
-
10.1
7.2
4.3
30
-
20
1M
350
MHz
MHz
ns
ps
MHz
SPS
ns
VIN
ILEAK
CINA
0
-1
-
±0.1
28
4
VA
+1
-
V
µA
pF
pF
VIH
VIH
VIL
VIL
IIND
CIND
2.4
2.1
-1
-
±0.1
2.5
0.8
0.4
+1
4
V
V
V
V
µA
pF
VA=5.25V
VA=3.6V
VA=5V
VA=3V
VIND=0V or VA
VOH
VOH
VOL
VOL
IOZ
COUT
VA-0.2
-10
-
VA-0.03
VA-0.1
0.02
0.1
±0.1
2
0.4
+10
4
V
V
V
V
µA
pF
Isource=200µA
Isource=1mA
Isink=200µA
Isink=1mA
VOZ=0V or VA
VA
IA
2.7
-
1.6
0.5
5.25
2.8
1.2
V
mA
mA
Signal-to-Noise-Ratio
Analog Input Characteristics
Input Voltage Range
Input DC Leakage Current
Input Capacitance
Digital Input Characteristics
High Input Voltage
Low Input Voltage
Input Current
Input Capacitance
Digital Output Characteristics
Output High Voltage
Output Low Voltage
High-Z Leakage Current
High-Z Output Capacitance
Power Supply Characteristics
Supply Voltage
Operational Current Consumption
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SINAD
SNR
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71
70
71.5
71
-80
82
11.5
11.3
-78
-
dB
dB
dB
dB
dB
dB
bit
bit
dB
fIN=100kHz,
VIN=-0.02dBFS
VA=2.7 to 3.6V
VA=4.75 to 5.25V
VA=2.7 to 3.6V
VA=4.75 to 5.25V
VA=2.7 to 3.6V
VA=2.7 to 3.6V
VA=2.7 to 3.6V
VA=4.75 to 5.25V
VA=5.25V
103.5kHz, 113.5kHz
VA=5.25V
103.5kHz, 113.5kHz
VA=5V
VA=3V
VA=5V
VA=5V
VIN=0V or VA
Track mode, VA=5V
Hold mode, VA=5V
VA=5.25V, fS=1MSPS
VA=3.6V, fS=1MSPS
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BU1S12S1AG-LB
Timing Specifications
Unless otherwise specified, Ta=-40°C to +85°C (Typical: Ta=25°C), VA=2.7 to 5.25V, fSCLK=10 to 20MHz, CL=25pF
Parameter
Symbol
Conversion Time
CSB Pulse Width
CSB Setup Time
SDATA Enable Time
SDATA Access Time 1
SDATA Access Time 2
SCLK Low Pulse Width
SCLK High Pulse Width
SDATA Hold Time 1
SDATA Hold Time 2
SDATA Disable Time 1
SDATA Disable Time 2
CSB Hold Time
SCLK Setup Time
Quiet Time
Power-Up Time
Throughput Period
Limits
Typ
16
1
-
Min
10
10
0.4 x tSCLK
0.4 x tSCLK
7
5
6
5
10
10
50
1
tCONV
t1
t2
t3
t4
t4
t5
t6
t7
t7
t8
t8
t9
t10
tQUIET
tPOWUP
tTHROUGHPUT
Hold mode
Unit
Max
20
40
20
25
25
20
SCLK
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
µs
Condition
VA=2.7 to 3.6V
VA=4.75 to 5.25V
VA=2.7 to 3.6V
VA=4.75 to 5.25V
VA=2.7 to 3.6V
VA=4.75 to 5.25V
Track mode
t1
CSB
tCONV
t9
t2
1
2
3
t6
4
t10
5
13
15
14
16
SCLK
t4
t3
SDATA
t8
tQUIET
ZERO ZERO
High-Z
t5
t7
ZERO
ZERO
DB11 DB10
DB2
DB1
DB0
High-Z
4 LEADING ZEROS
tTHROUGHPUT
(a) If SCLK is high at the falling edge of CSB
Hold mode
Track mode
t1
CSB
tCONV
t9
t2
1
2
3
4
t6
t10
5
13
15
14
16
SCLK
t4
t3
SDATA
High-Z
t5
t7
t8
tQUIET
ZERO ZERO
ZERO
ZERO
DB11 DB10
DB2
DB1
DB0
High-Z
4 LEADING ZEROS
tTHROUGHPUT
(b) If SCLK is low at the falling edge of CSB
Figure 5. Serial Interface Timing Chart
(Note 1) When the BU1S12S1AG-LB is used at the sampling frequency of 1MSPS, it is recommended to hold SCLK
high at the falling edge of CSB as shown in Figure 5(a). (See also “3. Serial Interface” on page 10.)
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Term Definitions
ACQUISITION TIME:
At the 13th rising edge of SCLK, the mode is changed from Hold mode to Track mode and the sampling capacitor starts
to be charged by the analog input voltage. This charge time is defined as the acquisition time.
APERTURE DELAY:
It is defined as the time from falling edge of CSB to the time when the analog input voltage is acquired.
APERTURE JITTER:
The variation in the aperture delays in sampling operations. Aperture jitter gets to affect signal-to-noise ratio.
INTEGRAL NON-LINEARLITY (INL):
It is a measure of the deviation of each individual code from a line drawn from zero scale (0.5 LSB below the first code
transition) through full scale (0.5 LSB above the last code transition). The deviation of any given code from this straight
line is measured from the center of that code value.
DIFFERENTIAL NON-LINEARLITY (DNL):
It is the measure of the maximum deviation from the ideal step size of 1 LSB.
OFFSET ERROR (OE):
It is the deviation of the first code transition “(000…000) to (000…001)” from the ideal of 0.5 LSB.
FULL SCALE ERROR (FSE):
It is the deviation of the last code transition “(111…110) to (111…111)” from the ideal of “VA – 1.5LSB.”
GAIN ERROR (GE):
It is defined as full scale error minus offset error.
TOTAL HARMONIC DISTORTION (THD):
It is the ratio, expressed in dB or dBc, of the rms total of the first five harmonic components at the output to the rms level
of the input signal frequency as seen at the output. THD is calculated as
where Af1 is the RMS power of the input frequency at the output and Af2 through Af6 are the RMS power in the first 5
harmonic frequencies.
SIGNAL TO NOISE AND DISTORTION RATIO(SINAD):
It is the ratio, expressed in dB, of the rms value of the input signal to the rms value of all of the other spectral components
below half the sampling frequency, including harmonics but excluding d.c.
EFFECTIVE NUMBER OF BITS(ENOB):
It is another method of specifying Signal-to-Noise and Distortion or SINAD. ENOB is defined as “(SINAD – 1.76) / 6.02”
and says that the converter is equivalent to a perfect ADC of this (ENOB) number of bits.
SIGNAL TO NOISE RATIO (SNR):
It is the ratio, expressed in dB, of the rms value of the input signal to the rms value of the sum of all other spectral
components below half the sampling frequency, not including harmonics.
SPURIOUS FREE DYNAMIC RANGE (SFDR):
It is the difference, expressed in dB, between the desired signal amplitude to the amplitude of the peak spurious spectral
component, where a spurious spectral component is any signal present in the output spectrum that is not present at the
input and may be a harmonic.
CONVERSION TIME:
It is the required time for the A/D converter to convert the sampled analog input signal to the digital code.
THROUGHPUT PERIOD:
It is the period that should be used as an interval time between any adjacent conversions.
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Typical Performance Characteristics
1.00
1.00
0.75
0.75
0.50
0.50
0.25
0.25
INL [LSB]
DNL [LSB]
Unless otherwise noted, Ta=25 °C.
0.00
-0.25
0.00
-0.25
-0.50
-0.50
-0.75
-0.75
-1.00
-1.00
0
1024
2048
3072
4096
0
1024
OUTPUT CODE
3072
4096
Figure 7. INL vs OUTPUT CODE
(VA=3V, fSCLK=10MHz, fS=500kSPS)
1.00
1.00
0.75
0.75
0.50
0.50
0.25
0.25
INL [LSB]
DNL [LSB]
Figure 6. DNL vs OUTPUT CODE
(VA=3V, fSCLK=10MHz, fS=500kSPS)
0.00
-0.25
0.00
-0.25
-0.50
-0.50
-0.75
-0.75
-1.00
-1.00
0
1024
2048
3072
4096
0
1024
OUTPUT CODE
2048
3072
4096
OUTPUT CODE
Figure 8. DNL vs OUTPUT CODE
(VA=3V, fSCLK=20MHz, fS=1MSPS)
Figure 9. INL vs OUTPUT CODE
(VA=3V, fSCLK=20MHz, fS=1MSPS)
1.5
1.5
VA = 5V
1.0
1.0
VA = 5V
0.5
VA = 3V
INL [LSB]
DNL [LSB]
2048
OUTPUT CODE
0.0
VA = 3V
-0.5
VA = 3V
0.5
0.0
VA = 3V
-0.5
VA = 5V
VA = 5V
-1.0
-1.0
-1.5
-1.5
0
5
10
15
0
20
10
15
20
Clock Frequency [MHz]
Clock Frequency [MHz]
Figure 10. DNL vs CLOCK FREQUENCY
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Figure 11. INL vs CLOCK FREQUENCY
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Typical Performance Characteristics – continued
Unless otherwise noted, Ta=25 °C, fIN =100 kHz.
80
75
VA = 3V
70
VA = 5V
70
SINAD [dB]
SNR [dB]
75
VA = 3V
VA = 5V
65
60
65
55
60
0
5
10
15
0
20
5
10
15
20
Clock Frequency [MHz]
Clock Frequency [MHz]
Figure 12. SNR vs CLOCK FREQUENCY
Figure 13. SINAD vs CLOCK FREQUENCY
95
-70
VA = 5V
-75
THD [dB]
SFDR [dB]
90
VA = 3V
85
-80
VA = 3V
-85
-90
80
-95
VA = 5V
75
-100
0
5
10
15
20
0
Clock Frequency [MHz]
10
15
20
Clock Frequency [MHz]
Figure 14. SFDR vs CLOCK FREQUENCY
Figure 15. THD vs CLOCK FREQUENCY
0
0
-20
-20
Amplitude [dBFS]
Amplitude [dBFS]
5
-40
-60
-80
-40
-60
-80
-100
-100
-120
-120
0
50
100
150
200
250
0
Frequency [kHz]
200
300
400
500
Frequency [kHz]
Figure 16. SPECTRAL RESPONCE
(VA=5V, fSCLK=10MHz, fS=500kSPS)
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Figure 17. SPECTRAL RESPONCE
(VA=5V, fSCLK=20MHz, fS=1MSPS)
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Description of Functions
1. Overview of A/D Conversion Process
BU1S12S1AG-LB is a successive-approximation A/D converter designed with a charge-redistribution D/A converter.
Simplified schematics of the A/D converter are shown in Figure 18 and Figure 19.
Figure 18 shows the A/D converter in Track mode: the switch SW1 is in the position A, SW2 is closed and balances the
comparator. Then, the sampling capacitor is charged with the analog input voltage VIN.
Figure 19 shows the A/D converter in Hold mode. When a conversion starts, the A/D converter goes into Hold mode:
SW2 becomes open, SW1 connects the sampling capacitor to ground through the terminal B and the comparator loses
its balance. The control logic controls the input voltage of the comparator via the sampling capacitors of the
charge-redistribution D/A converter to get the comparator back into a balanced state. A/D conversion finishes when the
comparator balances again. The control logic also generates the output code of the A/D converter.
CHARGE
REDISTRIBUTION
DAC
VIN
A
SAMPLING
CAPACITOR
VIN
SW1
A
SAMPLING
CAPACITOR
SW1
CONTROL
LOGIC
SW2
B
GND
CHARGE
REDISTRIBUTION
DAC
SW2
B
GND
VA
2
CONTROL
LOGIC
VA
2
Figure 18. Track mode
Figure 19. Hold mode
2. Ideal Transfer Characteristics
Figure 20 shows the ideal transfer characteristics of BU1S12S1AG-LB. Code transitions occur midway between
successive integer LSB values, such as 0.5 LSB, 1.5 LSB, and so on. The LSB size for the BU1S12S1AG-LB is VA /
4096. The output code format of the A/D converter is straight binary
111...111
・・・ ・・
ADC CODE
111...110
111...000
1LSB = VA / 4096
011...111
・・・
000...010
000...001
000...000
0.5LSB
+VA - 1.5 LSB
0V
ANALOG INPUT
Figure 20. Ideal Transfer Characteristics
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3. Serial Interface
The serial interface timing is shown in Figure 21. When CSB goes low, both a conversion process and data transfer are
started. At the falling edge of CSB, SDATA changes its state from High-Z to Low, the converter moves from Track mode
to Hold mode. A tracked input signal is sampled and held for conversion at this point. The converter returns from Hold
mode back to Track mode at the rising edge of SCLK subsequent to the 13th falling edge of it. SDATA goes back to
High-Z at the 16th falling edge of SCLK or at the rising edge of CSB. After a conversion, the quiet time t QUIET must be
satisfied before the next conversion triggered by the falling edge of CSB.
Sixteen SCLK cycles are needed to read a complete data of the A/D conversion from BU1S12S1AG-LB. First, four
leading zeros come out from SDATA. Then, the 12bit data comes out bit by bit, starting from the MSB. The first zero is
clocked out at the falling edge of CSB. The remaining leading 3 zeros and data bits are clocked out to SDATA at the
falling edge of SCLK; the host IC, the receiver of the A/D conversion data, is intended to receive the data at the
subsequent falling edge of SCLK.
To perform A/D conversion properly, the BU1S12S1AG-LB needs at least 16 SCLK cycles while CSB is low. If an A/D
conversion is interrupted in the middle of the conversion with CSB going to high before the 16th SCLK falling edge, the
following A/D conversion may not be performed normally. Therefore, it is necessary that equal to or more than 16 falling
edges of SCLK exist while CSB is low.
In addition, SCLK should be held either high or low at the falling edge of CSB. If SCLK is low at the falling edge of CSB,
as shown in Figure 21(b), a Hold mode time length is about a half clock period longer than one if SCLK is high as shown
in Figure 21(a). Therefore, when the BU1S12S1AG-LB is used at the sampling frequency of 1MSPS, it is recommended
to hold SCLK high at the falling edge of CSB, as shown in Figure 21(a), in order to ensure sufficient Track mode time for
the maximum acquisition time.
Hold mode
Track mode
CSB
1
2
3
4
5
6
7
8
9
DB11
DB10
DB9
DB8
DB7
10
11
12
13
14
15
16
SCLK
SDATA
High-Z
ZERO
ZERO
ZERO
ZERO
DB6
DB5
DB4
DB3
DB2
DB1
DB0
High-Z
4 LEADING ZEROS
(a) If SCLK is high at the falling edge of CSB
Hold mode
Track mode
CSB
1
2
3
4
5
6
7
8
9
DB11
DB10
DB9
DB8
DB7
10
11
12
13
14
15
16
SCLK
SDATA
High-Z
ZERO
ZERO
ZERO
ZERO
DB6
DB5
DB4
DB3
DB2
4 LEADING ZEROS
DB1
DB0
High-Z
(b) If SCLK is low at the falling edge of CSB
Figure 21. Serial Interface Timing
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4. Dummy Conversion
Dummy conversions are necessary in the following cases.
(1) A/D conversion after power-up
The first A/D conversion data after applying power to the BU1S12S1AG-LB is invalid. Therefore, a dummy
conversion is necessary after power-up before getting valid data. In addition, the power-up time is satisfied with a
cycle of the dummy conversion.
after power-up
dummy conversion
CSB
1
1
16
16
SCLK
SDATA
VALID DATA
INVALID DATA
Figure 22. A/D conversion after power-up
(2) A/D conversion after a stop period more than the maximum throughput time
The BU1S12S1AG-LB may stop performing A/D conversion between some A/D conversion cycles. If the maximum
limit of the throughput period of 20μsec is violated, the first A/D conversion data after the resumption is not valid
similar to the case after power-up. Therefore, a dummy conversion cycle is necessary when A/D conversions are
resumed after a stop period longer than the limit and the results later than the dummy conversion can be used
validly.
more than max throughput time
dummy conversion
CSB
1
1
16
16
1
16
SCLK
SDATA
INVALID DATA
VALID DATA
VALID DATA
Figure 23. A/D conversion after a long suspension
5. Pin Information
(1) Analog Input Pin
The equivalent analog input circuit is shown in Figure 24. The diodes, D1 and D2, are placed for ESD protection. If
the analog input voltage is more than “VA + 0.3V”, or less than “GND – 0.3V”, these diodes are turned on and
forward current is generated. This current might cause malfunction or irreversible damage to BU1S12S1AG-LB.
The capacitance value of the C1 in Figure 24 is typically 4pF, derived from the package parasitic capacitance. The
R1 is the resistance of the track/hold switch, typically 500Ω. The C2 is the sampling capacitance of
BU1S12S1AG-LB, and the capacitance value is typically 24pF.
VA
D1
R1
VIN
C1
D2
SW1
OPEN : HOLD MODE
CLOSE : TRACK MODE
C2
Figure 24. Analog Input Equivalent Circuit
(2) Digital Input and Output Pins
The equivalent digital input circuit is shown in Figure 25. Digital input pins, CSB and SCLK, don’t have any diodes
to VA. Thus, the maximum rating of “VA + 0.3V” is not applied to these digital input pins. Digital input voltage range
can vary from ground to 5.25V regardless of the supply voltage V A. This enables BU1S12S1AG-LB to be
interfaced with a wide range of logic levels, independent of the supply voltage VA.
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VA
VA
SCLK
SDATA
CSB
Figure 25. Equivalent Digital Input Circuit
Figure 26. Equivalent Digital Output Circuit
6. Considerations in Application Circuits
As shown in Figure 2, a voltage reference IC is used; 0.1μF and 10μF bypass capacitors between VA and GND are used
as measures against high and low frequency noise respectively to make the maximum use of the AD converter’s
capability. Ceramic capacitors of 0.1μF and 1μF to 10μF are to be used as decoupling capacitor near the AD converter.
Especially, the capacitor of 0.1μF should be placed as close to VA pin of BU1S12S1AG-LB as possible.
Because the voltages of VA and GND are used as the reference voltages for the A/D converter, the deviation of the
supply voltage directly affects the full scale and has much influence on its characteristics. Therefore, the fully stable
supply voltage should be connected to VA.
The output impedance of the analog input signal source should be small enough. Charge stored internally in the sampling
capacitor of the track/hold circuit is swept out to the analog input pin VIN at the transition from Hold mode to Track mode
because of the difference of the voltage between the input signal voltage and the sampling capacitor voltage. This charge
could cause undesirable voltage deviation. If influence of the deviation remains at the transition from Track mode to Hold
mode, it could cause the conversion error.
If a buffer amplifier is used to get the analog input to be low impedance, high-speed response is required of the buffer
amplifier. A decoupling capacitor and a resister on the VIN analog input could support the amplifier to reduce the
influence of the charge.
The voltage fluctuation on the supply and ground pins is caused by the charge and discharge of the digital input and
output pins through the digital signals. This fluctuation can be reduced by inserting resisters serially to the digital input
and output pins. The resistance values must be small enough not to cause critical delay errors. It is more effective to
place these resisters as close to the digital pins as possible.
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Operational Notes
1.
Reverse Connection of Power Supply
Connecting the power supply in reverse polarity can damage the IC. Take precautions against reverse polarity when
connecting the power supply, such as mounting an external diode between the power supply and the IC’s power
supply pins.
2.
Power Supply Lines
Design the PCB layout pattern to provide low impedance supply lines. Furthermore, connect a capacitor to ground at
all power supply pins. Consider the effect of temperature and aging on the capacitance value when using electrolytic
capacitors.
3.
Ground Voltage
Ensure that no pins are at a voltage below that of the ground pin at any time, even during transient condition.
4.
Ground Wiring Pattern
When using both small-signal and large-current ground traces, the two ground traces should be routed separately but
connected to a single ground at the reference point of the application board to avoid fluctuations in the small-signal
ground caused by large currents. Also ensure that the ground traces of external components do not cause variations
on the ground voltage. The ground lines must be as short and thick as possible to reduce line impedance.
5.
Thermal Consideration
Should by any chance the power dissipation rating be exceeded, the rise in temperature of the chip may result in
deterioration of the properties of the chip. In case of exceeding this absolute maximum rating, increase the board size
and copper area to prevent exceeding the Pd rating.
6.
Recommended Operating Conditions
These conditions represent a range within which the expected characteristics of the IC can be approximately obtained.
The electrical characteristics are guaranteed under the conditions of each parameter.
7.
Inrush Current
When power is first supplied to the IC, it is possible that the internal logic may be unstable and inrush current may
flow instantaneously due to the internal powering sequence and delays, especially if the IC has more than one power
supply. Therefore, give special consideration to power coupling capacitance, power wiring, width of ground wiring, and
routing of connections.
8.
Operation Under Strong Electromagnetic Field
Operating the IC in the presence of a strong electromagnetic field may cause the IC to malfunction.
9.
Testing on Application Boards
When testing the IC on an application board, connecting a capacitor directly to a low-impedance output pin may
subject the IC to stress. Always discharge capacitors completely after each process or step. The IC’s power supply
should always be turned off completely before connecting or removing it from the test setup during the inspection
process. To prevent damage from static discharge, ground the IC during assembly and use similar precautions during
transport and storage.
10. Inter-pin Short and Mounting Errors
Ensure that the direction and position are correct when mounting the IC on the PCB. Incorrect mounting may result in
damaging the IC. Avoid nearby pins being shorted to each other especially to ground, power supply and output pin.
Inter-pin shorts could be due to many reasons such as metal particles, water droplets (in very humid environment) and
unintentional solder bridge deposited in between pins during assembly to name a few.
11.
Unused Input Pins
Input pins of an IC are often connected to the gate of a MOS transistor. The gate has extremely high impedance and
extremely low capacitance. If left unconnected, the electric field from the outside can easily charge it. The small
charge acquired in this way is enough to produce a significant effect on the conduction through the transistor and
cause unexpected operation of the IC. So unless otherwise specified, unused input pins should be connected to the
power supply or ground line.
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Operational Notes – continued
12. Regarding the Input Pin of the IC
In the construction of this IC, P-N junctions are inevitably formed creating parasitic diodes or transistors. The
operation of these parasitic elements can result in mutual interference among circuits, operational faults, or physical
damage. Therefore, conditions which cause these parasitic elements to operate, such as applying a voltage to an
input pin lower than the ground voltage should be avoided. Furthermore, do not apply a voltage to the input pins when
no power supply voltage is applied to the IC. Even if the power supply voltage is applied, make sure that the input pins
have voltages within the values specified in the electrical characteristics of this IC.
13.
Ceramic Capacitor
When using a ceramic capacitor, determine the dielectric constant considering the change of capacitance with
temperature and the decrease in nominal capacitance due to DC bias and others.
Ordering Information
B
U
1
S
1
2
S
1
A
G
-
Package
G: SSOP6
Part Number
LBTR
Product class
LB for Industrial applications
Packaging and forming specifications
TR: Embossed tape and reel
Marking Diagrams
SSOP6(TOP VIEW)
BP
Part Number Marking
1PIN MARK
LOT Number
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Physical Dimension, Tape and Reel Information
Package Name
SSOP6
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BU1S12S1AG-LB
Revision History
Date
Revision
04.Jul.2016
001
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Changes
New Release
16/16
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04.Jul.2016 Rev.001
Notice
Precaution on using ROHM Products
1.
(Note 1)
If you intend to use our Products in devices requiring extremely high reliability (such as medical equipment
,
aircraft/spacecraft, nuclear power controllers, etc.) and whose malfunction or failure may cause loss of human life,
bodily injury or serious damage to property (“Specific Applications”), please consult with the ROHM sales
representative in advance. Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way
responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of any
ROHM’s Products for Specific Applications.
(Note1) Medical Equipment Classification of the Specific Applications
JAPAN
USA
EU
CHINA
CLASSⅢ
CLASSⅡb
CLASSⅢ
CLASSⅢ
CLASSⅣ
CLASSⅢ
2.
ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor
products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate
safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which
a failure or malfunction of our Products may cause. The following are examples of safety measures:
[a] Installation of protection circuits or other protective devices to improve system safety
[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure
3.
Our Products are not designed under any special or extraordinary environments or conditions, as exemplified below.
Accordingly, ROHM shall not be in any way responsible or liable for any damages, expenses or losses arising from the
use of any ROHM’s Products under any special or extraordinary environments or conditions. If you intend to use our
Products under any special or extraordinary environments or conditions (as exemplified below), your independent
verification and confirmation of product performance, reliability, etc, prior to use, must be necessary:
[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents
[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust
[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,
H2S, NH3, SO2, and NO2
[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves
[e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items
[f] Sealing or coating our Products with resin or other coating materials
[g] Use of our Products without cleaning residue of flux (even if you use no-clean type fluxes, cleaning residue of
flux is recommended); or Washing our Products by using water or water-soluble cleaning agents for cleaning
residue after soldering
[h] Use of the Products in places subject to dew condensation
4.
The Products are not subject to radiation-proof design.
5.
Please verify and confirm characteristics of the final or mounted products in using the Products.
6.
In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse. is applied,
confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power
exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect
product performance and reliability.
7.
De-rate Power Dissipation depending on ambient temperature. When used in sealed area, confirm that it is the use in
the range that does not exceed the maximum junction temperature.
8.
Confirm that operation temperature is within the specified range described in the product specification.
9.
ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in
this document.
Precaution for Mounting / Circuit board design
1.
When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product
performance and reliability.
2.
In principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method must
be used on a through hole mount products. If the flow soldering method is preferred on a surface-mount products,
please consult with the ROHM representative in advance.
For details, please refer to ROHM Mounting specification
Notice-PAA-E
© 2015 ROHM Co., Ltd. All rights reserved.
Rev.003
Precautions Regarding Application Examples and External Circuits
1.
If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the
characteristics of the Products and external components, including transient characteristics, as well as static
characteristics.
2.
You agree that application notes, reference designs, and associated data and information contained in this document
are presented only as guidance for Products use. Therefore, in case you use such information, you are solely
responsible for it and you must exercise your own independent verification and judgment in the use of such information
contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses
incurred by you or third parties arising from the use of such information.
Precaution for Electrostatic
This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper
caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be
applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron,
isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).
Precaution for Storage / Transportation
1.
Product performance and soldered connections may deteriorate if the Products are stored in the places where:
[a] the Products are exposed to sea winds or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2
[b] the temperature or humidity exceeds those recommended by ROHM
[c] the Products are exposed to direct sunshine or condensation
[d] the Products are exposed to high Electrostatic
2.
Even under ROHM recommended storage condition, solderability of products out of recommended storage time period
may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is
exceeding the recommended storage time period.
3.
Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads
may occur due to excessive stress applied when dropping of a carton.
4.
Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of
which storage time is exceeding the recommended storage time period.
Precaution for Product Label
A two-dimensional barcode printed on ROHM Products label is for ROHM’s internal use only.
Precaution for Disposition
When disposing Products please dispose them properly using an authorized industry waste company.
Precaution for Foreign Exchange and Foreign Trade act
Since concerned goods might be fallen under listed items of export control prescribed by Foreign exchange and Foreign
trade act, please consult with ROHM in case of export.
Precaution Regarding Intellectual Property Rights
1.
All information and data including but not limited to application example contained in this document is for reference
only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any
other rights of any third party regarding such information or data.
2.
ROHM shall not have any obligations where the claims, actions or demands arising from the combination of the
Products with other articles such as components, circuits, systems or external equipment (including software).
3.
No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any
third parties with respect to the Products or the information contained in this document. Provided, however, that ROHM
will not assert its intellectual property rights or other rights against you or your customers to the extent necessary to
manufacture or sell products containing the Products, subject to the terms and conditions herein.
Other Precaution
1.
This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.
2.
The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written
consent of ROHM.
3.
In no event shall you use in any way whatsoever the Products and the related technical information contained in the
Products or this document for any military purposes, including but not limited to, the development of mass-destruction
weapons.
4.
The proper names of companies or products described in this document are trademarks or registered trademarks of
ROHM, its affiliated companies or third parties.
Notice-PAA-E
© 2015 ROHM Co., Ltd. All rights reserved.
Rev.003
Datasheet
General Precaution
1. Before you use our Pro ducts, you are requested to care fully read this document and fully understand its contents.
ROHM shall n ot be in an y way responsible or liabl e for fa ilure, malfunction or acci dent arising from the use of a ny
ROHM’s Products against warning, caution or note contained in this document.
2. All information contained in this docume nt is current as of the issuing date and subj ect to change without any prior
notice. Before purchasing or using ROHM’s Products, please confirm the la test information with a ROHM sale s
representative.
3.
The information contained in this doc ument is provi ded on an “as is” basis and ROHM does not warrant that all
information contained in this document is accurate an d/or error-free. ROHM shall not be in an y way responsible or
liable for an y damages, expenses or losses incurred b y you or third parties resulting from inaccur acy or errors of or
concerning such information.
Notice – WE
© 2015 ROHM Co., Ltd. All rights reserved.
Rev.001
Datasheet
BU1S12S1AG-LB - Web Page
Part Number
Package
Unit Quantity
Minimum Package Quantity
Packing Type
Constitution Materials List
RoHS
BU1S12S1AG-LB
SSOP6
3000
3000
Taping
inquiry
Yes
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