APT28M120B2 APT28M120L 1200V, 29A, 0.53Ω Max N-Channel MOSFET Power MOS 8™ is a high speed, high voltage N-channel switch-mode power MOSFET. A proprietary planar stripe design yields excellent reliability and manufacturability. Low switching loss is achieved with low input capacitance and ultra low Crss "Miller" capacitance. The intrinsic gate resistance and capacitance of the poly-silicon gate structure help control slew rates during switching, resulting in low EMI and reliable paralleling, even when switching at very high frequency. Reliability in flyback, boost, forward, and other circuits is enhanced by the high avalanche energy capability. T-MaxTM TO-264 APT28M120B2 APT28M120L D Single die MOSFET G S TYPICAL APPLICATIONS FEATURES • Fast switching with low EMI/RFI • PFC and other boost converter • Low RDS(on) • Buck converter • Ultra low Crss for improved noise immunity • Two switch forward (asymmetrical bridge) • Low gate charge • Single switch forward • Avalanche energy rated • Flyback • RoHS compliant • Inverters Absolute Maximum Ratings Symbol ID Parameter Unit Ratings Continuous Drain Current @ TC = 25°C 29 Continuous Drain Current @ TC = 100°C 18 A IDM Pulsed Drain Current VGS Gate-Source Voltage ±30 V EAS Single Pulse Avalanche Energy 2 2165 mJ IAR Avalanche Current, Repetitive or Non-Repetitive 14 A 1 104 Thermal and Mechanical Characteristics Min Characteristic Typ Max Unit W PD Total Power Dissipation @ TC = 25°C 1135 RθJC Junction to Case Thermal Resistance 0.11 RθCS Case to Sink Thermal Resistance, Flat, Greased Surface Operating and Storage Junction Temperature Range 150 °C Soldering Temperature for 10 Seconds (1.6mm from case) WT Package Weight 300 0.22 oz 6.2 g 10 in·lbf 1.1 N·m Mounting Torque ( TO-264 Package), 4-40 or M3 screw MicrosemiWebsite-http://www.microsemi.com 04-2009 TL Torque -55 Rev B TJ,TSTG °C/W 0.11 050-8097 Symbol Static Characteristics TJ = 25°C unless otherwise specified Symbol Parameter VBR(DSS) Drain-Source Breakdown Voltage ΔVBR(DSS)/ΔTJ Breakdown Voltage Temperature Coefficient RDS(on) Drain-Source On Resistance VGS(th) Gate-Source Threshold Voltage ΔVGS(th)/ΔTJ IGSS Gate-Source Leakage Current Dynamic Characteristics Symbol VDS = 1200V VGS = 0V Forward Transconductance Ciss Input Capacitance Crss Reverse Transfer Capacitance Coss Output Capacitance Typ Max 1.41 0.45 4 -10 0.53 5 TJ = 25°C 100 500 ±100 TJ = 125°C VGS = ±30V Unit V V/°C Ω V mV/°C µA nA TJ = 25°C unless otherwise specified Parameter gfs 3 VGS = VDS, ID = 2.5mA Threshold Voltage Temperature Coefficient Zero Gate Voltage Drain Current Min 1200 VGS = 10V, ID = 14A 3 IDSS Test Conditions VGS = 0V, ID = 250µA Reference to 25°C, ID = 250µA APT28M120B2_L Min Test Conditions VDS = 50V, ID = 14A VGS = 0V, VDS = 25V f = 1MHz Co(cr) 4 Effective Output Capacitance, Charge Related Co(er) 5 Effective Output Capacitance, Energy Related Typ 31 9670 115 715 Max Unit S pF 275 VGS = 0V, VDS = 0V to 800V Qg Total Gate Charge Qgs Gate-Source Charge Qgd Gate-Drain Charge td(on) Turn-On Delay Time tr td(off) tf 140 300 50 140 50 31 170 48 VGS = 0 to 10V, ID = 14A, VDS = 600V Resistive Switching VDD = 800V, ID = 14A Current Rise Time RG = 2.2Ω 6 , VGG = 15V Turn-Off Delay Time Current Fall Time nC ns Source-Drain Diode Characteristics Symbol IS ISM Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) 1 VSD Diode Forward Voltage trr Reverse Recovery Time Qrr Reverse Recovery Charge dv/dt Test Conditions MOSFET symbol showing the integral reverse p-n junction diode (body diode) Peak Recovery dv/dt Min Typ D Max Unit 29 A G 104 S ISD = 14A, TJ = 25°C, VGS = 0V ISD = 14A 3 diSD/dt = 100A/µs, TJ = 25°C ISD ≤ 14A, di/dt ≤1000A/µs, VDD = 100V, TJ = 125°C 1 1290 33 V ns µC 10 V/ns 1 Repetitive Rating: Pulse width and case temperature limited by maximum junction temperature. 2 Starting at TJ = 25°C, L = 22.09mH, RG = 2.2Ω, IAS = 14A. 04-2009 3 Pulse test: Pulse Width < 380µs, duty cycle < 2%. 4 Co(cr) is defined as a fixed capacitance with the same stored charge as COSS with VDS = 67% of V(BR)DSS. 5 Co(er) is defined as a fixed capacitance with the same stored energy as COSS with VDS = 67% of V(BR)DSS. To calculate Co(er) for any value of VDS less than V(BR)DSS, use this equation: Co(er) = -4.40E-7/VDS^2 + 5.34E-8/VDS + 7.59E-11. 6 RG is external gate resistance, not including internal gate resistance or gate driver impedance. (MIC4452) 050-8097 Rev B Microsemi reserves the right to change, without notice, the specifications and information contained herein. APT28M120B2_L 90 30 V GS = 10V T = 125°C J 80 70 ID, DRIAN CURRENT (A) TJ = -55°C 60 50 40 TJ = 25°C 30 20 TJ = 150°C 15 5V 10 0 0 5 10 15 20 25 30 VDS(ON), DRAIN-TO-SOURCE VOLTAGE (V) 4.5V 0 Figure 2, Output Characteristics NORMALIZED TO VDS> ID(ON) x RDS(ON) MAX. 250µSEC. PULSE TEST @ <0.5 % DUTY CYCLE VGS = 10V @ 14A 2.5 80 2.0 1.5 1.0 0.5 60 TJ = -55°C TJ = 25°C 40 TJ = 125°C 20 0 0 -55 -25 0 25 50 75 100 125 150 TJ, JUNCTION TEMPERATURE (°C) Figure 3, RDS(ON) vs Junction Temperature 0 1 2 3 4 5 6 7 8 VGS, GATE-TO-SOURCE VOLTAGE (V) Figure 4, Transfer Characteristics 20,000 40 10,000 35 Ciss TJ = -55°C 30 C, CAPACITANCE (pF) TJ = 25°C 25 TJ = 125°C 20 15 10 1000 Coss 100 Crss 5 0 VGS, GATE-TO-SOURCE VOLTAGE (V) 16 2 4 6 8 10 12 14 ID, DRAIN CURRENT (A) Figure 5, Gain vs Drain Current 200 400 600 800 1000 1200 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 6, Capacitance vs Drain-to-Source Voltage 12 VDS = 240V 10 VDS = 600V 8 6 VDS = 960V 4 2 0 0 100 ID = 14A 14 0 10 16 50 100 150 200 250 300 350 400 Qg, TOTAL GATE CHARGE (nC) Figure 7, Gate Charge vs Gate-to-Source Voltage ISD, REVERSE DRAIN CURRENT (A) 0 90 80 70 60 50 TJ = 25°C 40 TJ = 150°C 30 20 10 0 0 0.2 0.4 0.6 0.8 1.0 1.2 VSD, SOURCE-TO-DRAIN VOLTAGE (V) Figure 8, Reverse Drain Current vs Source-to-Drain Voltage 04-2009 gfs, TRANSCONDUCTANCE 5 10 15 20 25 30 VDS, DRAIN-TO-SOURCE VOLTAGE (V) 100 ID, DRAIN CURRENT (A) RDS(ON), DRAIN-TO-SOURCE ON RESISTANCE Figure 1, Output Characteristics 3.0 = 6, 7, 8 & 9V Rev B 0 GS 5 TJ = 125°C 10 V 20 050-8097 ID, DRAIN CURRENT (A) 25 200 100 100 IDM ID, DRAIN CURRENT (A) ID, DRAIN CURRENT (A) APT28M120B2_L 200 10 13µs 100µs 1ms 1 Rds(on) 0.1 Rds(on) 10 13µs 100µs 1ms TJ = 150°C TC = 25°C 1 DC line 0.1 10 100 1200 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 9, Forward Safe Operating Area 10ms Scaling for Different Case & Junction Temperatures: 100ms ID = ID(T = 25°C)*(TJ - TC)/125 C DC line 100ms TJ = 125°C TC = 75°C 1 10ms IDM 1 10 100 1200 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 10, Maximum Forward Safe Operating Area 0.10 D = 0.9 0.08 0.7 0.06 0.5 Note: PDM ZθJC, THERMAL IMPEDANCE (°C/W) 0.12 0.04 t1 0.3 t2 t1 = Pulse Duration SINGLE PULSE 0.02 t Duty Factor D = 1/t2 Peak TJ = PDM x ZθJC + TC 0.1 0.05 0 -5 10-4 10-3 10-2 10-1 RECTANGULAR PULSE DURATION (seconds) Figure 11. Maximum Effective Transient Thermal Impedance Junction-to-Case vs Pulse Duration 10 T-MAX® (B2) Package Outline 1.0 TO-264 (L) Package Outline e3 100% Sn Plated 4.69 (.185) 5.31 (.209) 1.49 (.059) 2.49 (.098) 4.60 (.181) 5.21 (.205) 1.80 (.071) 2.01 (.079) 15.49 (.610) 16.26 (.640) 19.51 (.768) 20.50 (.807) 3.10 (.122) 3.48 (.137) 5.38 (.212) 6.20 (.244) 5.79 (.228) 6.20 (.244) Drain Drain 20.80 (.819) 21.46 (.845) 04-2009 4.50 (.177) Max. 0.40 (.016) 0.79 (.031) 25.48 (1.003) 26.49 (1.043) 2.87 (.113) 3.12 (.123) 2.29 (.090) 2.69 (.106) 1.65 (.065) 2.13 (.084) 19.81 (.780) 20.32 (.800) 1.01 (.040) 1.40 (.055) 19.81 (.780) 21.39 (.842) Gate Drain Rev B 050-8097 5.45 (.215) BSC 2-Plcs. These dimensions are equal to the TO-247 without the mounting hole. Dimensions in Millimeters and (Inches) Gate Drain Source Source 2.21 (.087) 2.59 (.102) 2.29 (.090) 2.69 (.106) 0.48 (.019) 0.84 (.033) 2.59 (.102) 3.00 (.118) 0.76 (.030) 1.30 (.051) 2.79 (.110) 3.18 (.125) 5.45 (.215) BSC 2-Plcs. Dimensions in Millimeters and (Inches) Microsemi's products are covered by one or more of U.S.patents 4,895,810 5,045,903 5,089,434 5,182,234 5,019,522 5,262,336 6,503,786 5,256,583 4,748,103 5,283,202 5,231,474 5,434,095 5,528,058 and foreign patents. US and Foreign patents pending. All Rights Reserved.