MPS EV0033 1.2a synchronous rectified step-down converter Datasheet

TM
MP1567
1.2A Synchronous Rectified
Step-Down Converter
The Future of Analog IC Technology
TM
DESCRIPTION
FEATURES
The MP1567 is a 1.2A, 800KHz DC to DC
converter designed for low voltage applications
requiring high efficiency. Capable of providing
output voltages as low as 0.9V from a 3.3V
supply voltage, the MP1567 eliminates the
need for a 5V rail, providing over 90% efficiency
via synchronous rectification and eliminating
heat issues in confined spaces. Soft-start
operation protects internal circuitry from hard
turn on issues. Switching at 800KHz reduces
the size of external components and thereby
reduces board space.
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•
•
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•
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The MP1567 includes cycle-by-cycle current
limiting and under voltage lockout. Internal
power switches combined with the tiny 10-pin
MSOP or QFN packages provide a solution
requiring a minimum of space.
EVALUATION BOARD REFERENCE
Board Number
Dimensions
EV0033 (MP1567DK)
EV0059 (MP1567DK)
EV0060 (MP1567DQ)
2.5”X x 2.0”Y x 0.7”Z
2.5”X x 2.0”Y x 0.4”Z
2.5”X x 2.0”Y x 0.4”Z
1.2A Output Current
Synchronous Rectified
Internal 180mΩ and 220mΩ Power Switches
VIN Range of 2.6V to 6V
Over 90% Efficiency
Zero Current Shutdown Mode
Under Voltage Lockout Protection
Soft-Start Operation
Thermal Shutdown
Internal Current Limit (Source & Sink)
Tiny 10-Pin MSOP or QFN Packages
Evaluation Boards Available
APPLICATIONS
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SOHO Routers, PCMCIA Cards, Mini PCI
Handheld Computers, PDAs
Cell Phones
Digital Video Cameras
Small LCD Displays
“MPS” and “The Future of Analog IC Technology” are Trademarks of Monolithic
Power Systems, Inc.
TYPICAL APPLICATION
INPUT
2.6V to 6V
Efficiency vs
Load Current
10nF
100
2
OFF ON
6
OPEN IF
NOT USED
IN
BS
EN
SW
MP1567
FB
BP
SS
90
VOUT
1.8V/1.2A
3
7
9
SGND PGND COMP
5
10nF
4
8
10nF
VIN=3.3V
80
EFFICIENCY (%)
10
1
70
VIN=4V
60
50
VIN=5V
40
30
20
1nF
VOUT=1.8V
10
0
10
100
LOAD CURRENT (mA)
MP1567_TAC_S01
MP1567 Rev. 2.3
1/3/2006
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1000
MP1567_EC01
1
TM
MP1567 – 1.2A SYNCHRONOUS RECTIFIED STEP-DOWN CONVERTER
PACKAGE REFERENCE
TOP VIEW
TOP VIEW
BS
1
10
EN
IN
2
9
BP
SW
3
8
COMP
PGND
4
7
FB
SGND
5
6
SS
BS
1
10
EN
IN
2
9
BP
SW
3
8
COMP
PGND
4
7
FB
SGND
5
6
SS
EXPOSED PAD
ON BACKSIDE
MP1567_PD01_MSOP10
Part Number*
Package
Temperature
Part Number**
MP1567DK
MSOP10
–40°C to +85°C
MP1567DQ
*
MP1567_PD02_QFN10
Package
QFN10
(3mm x 3mm)
Temperature
–40°C to +85°C
** For Tape & Reel, add suffix –Z (eg. MP1567DQ–Z)
For Tape & Reel, add suffix –Z (eg. MP1567DK–Z)
For Lead Free, add suffix –LF (eg. MP1567DK–LF–Z)
For Lead Free, add suffix –LF (eg. MP1567DQ–LF–Z)
ABSOLUTE MAXIMUM RATINGS (1)
Input Supply Voltage VIN ............................. 6.5V
SW Voltage VSW ................... –0.3V to VIN + 0.3V
BS to SW Voltage .........................–0.3V to +6V
Voltage at All Other Pins ...............–0.3V to +6V
Storage Temperature.............. –55°C to +150°C
Recommended Operating Conditions
(2)
Input Supply Voltage VIN ....................2.6V to 6V
Output Voltage VOUT ........................0.9V to 4.5V
Operating Temperature............. –40°C to +85°C
Thermal Resistance
(3)
θJA
θJC
MSOP10 ................................ 150 ..... 65... °C/W
3x3 QFN10 ............................. 50 ...... 12... °C/W
Notes:
1) Exceeding these ratings may damage the device.
2) The device is not guaranteed to function outside of its
operating conditions.
3) Measured on approximately 1” square of 1 oz copper.
ELECTRICAL CHARACTERISTICS
VIN = 5V, TA = +25°C, unless otherwise noted.
Parameter
Input Voltage Range
Input Undervoltage Lockout
Input Undervoltage Lockout Hysteresis
Shutdown Supply Current
Operating Supply Current
BP Voltage
EN Input Low Voltage
EN Input High Voltage
EN Hysteresis
EN Input Bias Current
Oscillator
Switching Frequency
Maximum Duty Cycle
Minimum On Time
MP1567 Rev. 2.3
1/3/2006
Symbol
VIN
VBP
VIL
VHL
Condition
Min
2.6
Typ
2.2
100
0.5
1.2
2.4
VEN ≤ 0.3V
VEN > 2V, VFB = 1.1V
VIN = 2.6 to 6V
Max
6
1.0
1.8
0.4
1.5
100
1
fSW
DMAX
tON
800
VFB = 0.7V
85
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200
Units
V
V
mV
µA
mA
V
V
V
mV
µA
KHz
%
ns
2
TM
MP1567 – 1.2A SYNCHRONOUS RECTIFIED STEP-DOWN CONVERTER
ELECTRICAL CHARACTERISTICS (continued)
VIN = 5V, TA = +25°C, unless otherwise noted.
Parameter
Error Amplifier
Voltage Gain
Transconductance
COMP Maximum Output Current
FB Regulation Voltage
FB Input Bias Current
Soft-Start
Soft-Start Current
Output Switch On-Resistance
Symbol
Condition
Min
AVEA
GEA
VFB
IFB
875
FB = 0.9V
ISS
VIN = 5V
VIN = 3V
VIN = 5V
VIN = 3V
Switch On Resistance
Synchronous Rectifier On Resistance
Switch Current Limit (Source)
Synchronous Rectifier Current Limit (Sink)
Thermal Shutdown
1.5
Typ
400
300
±30
905
–100
Max
935
Units
V/V
µA/V
µA
mV
nA
2
µA
265
330
220
270
2.0
350
160
mΩ
mΩ
mΩ
mΩ
A
mA
°C
TYPICAL PERFORMANCE CHARACTERISTICS
VIN = 3.3V, VOUT = 1.8V, TA = +25°C, unless otherwise noted.
Current Limit vs.
Load Transient
0.1A to 1A Load Step
Duty Cycle
CURRENT LIMIT (A)
2.5
VOUT
50mV/div.
2.0
VSS
1V/div.
1.5
VOUT
1V/div.
1.0
ILOAD
0.5A/div.
0.5
0
0
20
40
60
DUTY CYCLE (%)
IIN
0.5A/div.
2ms/div.
80
MP1567-TPC02
MP1567-TPC01
Output Short Circuit
Steady State
IOUT = 1.2A
VOUT
1V/div.
MP1567-TPC03
VSW
2V/div.
VSS
1mV/div.
IINDUCTOR
1A/div.
IINDUCTOR
1A/div.
2ms/div.
MP1567-TPC04
MP1567 Rev. 2.3
1/3/2006
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MP1567-TPC05
3
TM
MP1567 – 1.2A SYNCHRONOUS RECTIFIED STEP-DOWN CONVERTER
PIN FUNCTIONS
Pin#
Name
1
BS
2
IN
3
SW
4
PGND
5
SGND
6
SS
7
FB
8
COMP
9
BP
10
EN
Function
Power Switch Boost. BS powers the gate of the high-side N-Channel power MOSFET switch.
Connect a 10nF or greater capacitor between BS and SW.
Internal Power Input. IN supplies the power to the MP1567 through the internal LDO
regulator. Bypass IN to PGND with a 10µF or greater capacitor. Connect IN to the input
source voltage.
Output Switching Node. SW is the source of the high-side N-Channel switch and the drain of
the low-side N-Channel switch. Connect the output LC filter between SW and the output.
Power Ground. PGND is the source of the N-Channel MOSFET synchronous rectifier.
Connect PGND to SGND as close to the MP1567 as possible.
Signal Ground.
Soft-Start Input. Place a capacitor from SS to SGND to set the soft-start period. The MP1567
sources 2µA from SS to the soft-start capacitor at start up. As the voltage at SS rises, the
feedback threshold voltage increases to limit inrush current at start up.
Feedback Input. FB is the inverting input of the internal error amplifier. Connect a resistive
voltage divider from the output voltage to FB to set the output voltage.
Compensation Node. COMP is the output of the error amplifier. Connect a series RC network
to compensate the regulation control loop.
Internal 2.4V Regulator Bypass. Connect a 10nF capacitor between BP and SGND to bypass
the internal regulator. Do not apply any load to BP.
On/Off Control Input. Drive EN high to turn on the MP1567; low to turn it off. For automatic
startup, connect EN to IN.
OPERATION
The MP1567 measures the output voltage
through an external resistive voltage divider and
compares that to the internal 0.9V reference to
generate the error voltage at COMP. The
current-mode regulator uses the voltage at
COMP and compares it to the inductor current
to regulate the output voltage. The use of
current-mode regulation improves transient
response and improves control loop stability.
At the beginning of each cycle, the high-side
N-Channel MOSFET is turned on, forcing the
inductor current to rise. The current at the drain
of the high-side MOSFET is internally
measured and converted to a voltage by the
current sense amplifier. That voltage is
compared to the error voltage at COMP. When
the inductor current raises sufficiently, the PWM
comparator turns off the high-side switch and
turns on the low-side switch, forcing the
MP1567 Rev. 2.3
1/3/2006
inductor current to decrease. The average
inductor current is controlled by the voltage at
COMP, which in turn, is controlled by the output
voltage. Thus the output voltage controls the
inductor current to satisfy the load.
Since the high-side N-Channel MOSFET
requires voltage above VIN to drive its gate, a
bootstrap capacitor from SW to BS is required
to drive the high-side MOSFET gate. When SW
is driven low (through the low-side MOSFET),
the BS capacitor is internally charged. The
voltage at BS is applied to the high-side
MOSFET gate to turn it on, and maintains that
voltage until the high-side MOSFET is turned
off and the low-side MOSFET is turned on, and
the cycle repeats. Connect a 10nF or greater
capacitor from BS to SW to drive the high-side
MOSFET gate. Using a larger capacitor does
little to improve performance.
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TM
MP1567 – 1.2A SYNCHRONOUS RECTIFIED STEP-DOWN CONVERTER
VIN
2.6V to 6V
IN
OFF ON
EN
ENABLE
CKT & LDO
REGULATOR
BP
VBP
2.4V
GATE
DRIVE
REGULATOR
Vdr
CURRENT
SENSE
AMPLIFIER
+
-BS
Vdr
PWM
COMPARATOR
C7
+
--
SW
CONTROL
LOGIC
Vdr
L1
VOUT
800KHz
OSCILLATOR
RAMP
VBP
CURRENT
LIMIT
COMPARATOR
+
--
UVLO &
THERMAL
SHUTDOWN
+
--
PGND
SS
C5
-FB
GM -ERROR
AMPLIFIER
VFB
0.9V
CURRENT
LIMIT
THRESHOLD
SGND
+
COMP
R3
C3
MP1567_BD01
Figure 1—Functional Block Diagram
MP1567 Rev. 2.3
1/3/2006
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TM
MP1567 – 1.2A SYNCHRONOUS RECTIFIED STEP-DOWN CONVERTER
APPLICATION INFORMATION
COMPONENT SELECTION
Internal Low-Dropout Regulator
The internal power to the MP1567 is supplied
from the input voltage through an internal 2.4V
low-dropout linear regulator, whose output is
BP. Bypass BP to SGND with a 10nF or greater
capacitor to insure the MP1567 operates
properly. The internal regulator cannot supply
more current than is required to operate the
MP1567, therefore do not apply any external
load to BP.
Soft-Start
The MP1567 includes a soft-start timer that
slowly ramps the output voltage at startup to
prevent excessive current at the input. This
prevents premature termination of the battery
voltage at startup due to input current overshoot
at startup.
When power is applied to the MP1567 a 2µA
internal current source charges the external
capacitor at SS. As the capacitor charges, the
voltage at SS will rise. The MP1567 internally
limits the feedback threshold voltage at FB to
that of the voltage at SS. This forces the output
voltage to rise at the same rate as the voltage
at SS, forcing the output voltage to ramp
linearly from 0V to the desired regulation
voltage during soft-start. The soft-start period is
determined by the equation:
t SS = 0.45 × C5
Where C5 (in nF) is the soft-start capacitor from
SS to GND, and tSS (in ms) is the soft-start
period. Determine the capacitor required for a
given soft-start period by the equation:
C5 = 2.22 × t SS
Use values for C5 between 10nF and 22nF to
set the soft-start period (between 4ms and
10ms).
Setting the Output Voltage
Set the output voltage by selecting the resistive
voltage divider ratio. The voltage divider drops
the output voltage to the 0.9V feedback
threshold voltage. Use 10kΩ for the low-side
resistor of the voltage divider. Determine the
high side resistor by the equation:
MP1567 Rev. 2.3
1/3/2006
R2 =
VOUT − VFB
⎛ VFB
⎜⎜
⎝ R1
⎞
⎟⎟
⎠
Where R2 is the high-side resistor, R1 is the
low-side resistor, VOUT is the output voltage and
VFB is the feedback regulation threshold.
For R1 = 10kΩ and VFB = 0.9V, then
R2(kΩ) = 11.1kΩ (VOUT – 0.9V)
Selecting the Input Capacitor
The input current to the step-down converter is
discontinuous, so a capacitor is required to
supply the AC current to the step-down
converter while maintaining the DC input
voltage. A low ESR capacitor is required to
keep the noise at the IC to a minimum. Ceramic
capacitors are preferred, but tantalum or low
ESR electrolytic capacitors will also suffice.
Use an input capacitor with a value greater than
10µF. The capacitor can be electrolytic,
tantalum or ceramic. However, since it absorbs
the input switching current it requires an
adequate ripple current rating. Use a capacitor
with a RMS current rating greater than 1/2 of
the DC load current.
For insuring stable operation, place the input
capacitor as close to the IC as possible.
Alternately, a smaller high quality 0.1µF
ceramic capacitor may be placed closer to the
IC with the larger capacitor placed further away.
If using this technique, it is recommended that
the larger capacitor be a tantalum or electrolytic
type. All ceramic capacitors should be placed
close to the MP1567.
Selecting the Output Capacitor
The output capacitor is required to maintain the
DC output voltage. Low ESR capacitors are
preferred to keep the output voltage ripple to a
minimum. The characteristics of the output
capacitor also affect the stability of the
regulation control system. Ceramic, tantalum or
low
ESR
electrolytic
capacitors
are
recommended.
In the case of ceramic capacitors, the
impedance at the switching frequency is
dominated by the capacitance, and so the
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MP1567 – 1.2A SYNCHRONOUS RECTIFIED STEP-DOWN CONVERTER
output voltage ripple is mostly independent of
the ESR. The output voltage ripple is estimated
to be:
⎛f
VRIPPLE = 1.4 × VIN × ⎜⎜ LC
⎝ f SW
⎞
⎟
⎟
⎠
2
Where VRIPPLE is the output ripple voltage, VIN is
the input voltage, fLC is the resonant frequency
of the LC filter and fSW is the switching
frequency. In the case of tantalum or low-ESR
electrolytic capacitors, the ESR dominates the
impedance at the switching frequency, and so
the output ripple is calculated as:
VRIPPLE = ∆I × R ESR
Where ∆I is the inductor ripple current, and
RESR is the equivalent series resistance of the
output capacitors.
Choose an output capacitor to satisfy the output
ripple requirements of the design. A 10µF
ceramic capacitor is suitable for most
applications.
Selecting the Inductor
The inductor is required to supply constant
current to the output load while being driven by
the switched input voltage. A larger value
inductor results in less ripple current that will
results in lower output ripple voltage. However,
the larger value inductor has a larger physical
size, higher series resistance and/or lower
saturation current. Choose an inductor that
does not saturate under the worst-case load
conditions. A good rule for determining the
inductance is to allow the peak-to-peak ripple
current to be approximately 30% of the
maximum load current. Make sure that the peak
inductor current (the load current plus half the
peak-to-peak inductor ripple current) is below
2A to prevent loss of regulation due to the
current limit.
Calculate the required inductance value by the
equation:
V
× ( VIN − VOUT )
L = OUT
VIN × f SW × ∆I
MP1567 Rev. 2.3
1/3/2006
Compensation
The system stability is controlled through the
COMP pin. COMP is the output of the internal
transconductance error amplifier. A series
capacitor-resistor combination sets a pole-zero
combination to control the characteristics of the
control system.
The DC loop gain is:
⎛ V
A VDC = A VEA × G CS × R LOAD × ⎜⎜ FB
⎝ VOUT
⎞
⎟
⎟
⎠
Where AVEA is the transconductance error
amplifier voltage gain, GCS is the current sense
gain (roughly the output current divided by the
voltage at COMP) and RLOAD is the load
resistance (VOUT/IOUT where IOUT is the output
load current)
The system has 2 poles of importance, one is
due to the compensation capacitor (C3), and
the other is due to the load resistance and the
output capacitor (C2). The first is:
fP1 =
G EA
2π × A VEA × C3
Where P1 is the first pole and GEA is the error
amplifier transconductance (300µA/V). The
second is:
fP2 =
1
2π × R LOAD × C2
The system has one zero of importance, due to
the compensation capacitor (C3) and the
compensation resistor (R3). The zero is:
f Z1=
1
2π × R3 × C3
If large value capacitors with relatively high
equivalent-series-resistance (ESR) are used,
the zero due to the capacitance and ESR of the
output capacitor can be compensated by a third
pole set by R3 and C4. This pole is:
f P3 =
1
2π × R3 × C4
The system crossover frequency (the frequency
where the loop gain drops to 1, or 0dB) is
important. Set the crossover frequency to
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TM
MP1567 – 1.2A SYNCHRONOUS RECTIFIED STEP-DOWN CONVERTER
75KHz or lower to insure stable operation.
Lower crossover frequencies result in slower
response and worse transient load recovery.
Higher crossover frequencies degrade the
phase and/or gain margins and can result in
instability.
Choose the compensation capacitor to set the
zero to one fourth of the crossover frequency.
Determine the value by the following equation:
Choosing the Compensation Components
The values of the compensation components
given in Table 1 yield a stable control loop for
the output voltage and capacitor given.
Determine if the second compensation
capacitor, C4, is required. It is required if the
ESR zero of the output capacitor occurs at less
than four times the crossover frequency, or:
Table 1—Compensation Values for Typical
Output Voltage/Capacitor Combinations
8π × C2 × R ESR × f C ≥ 1
VOUT
C2
R3
C3
C4
1.8V
2.5V
3.3V
1.8V
2.5V
3.3V
4.7µF Ceramic
4.7µF Ceramic
4.7µF Ceramic
10µF Ceramic
10µF Ceramic
10µF Ceramic
47µF Tantalum
(300mΩ)
47µF Tantalum
(300mΩ)
47µF Tantalum
(300mΩ)
3.3kΩ
5.1kΩ
6.8kΩ
7.5kΩ
10kΩ
10kΩ
2.2nF
1.5nF
1.2nF
1nF
820pF
820pF
None
None
None
None
None
None
10kΩ
2.2nF
1.5nF
10kΩ
3.3nF
1.5nF
10kΩ
4.7nF
1.5nF
1.8V
2.5V
3.3V
To optimize the compensation components for
conditions not listed in Table 1, use the
following procedure.
Choose the compensation resistor to set the
desired crossover frequency. Determine the
value by the following equation:
R3 =
2π × C2 × VOUT × f C
G EA × G CS × VFB
Putting in the known constants and setting the
crossover frequency to the desired 75KHz:
C3 =
4 × C2 × VOUT
2
R3 × G EA × G CS × VFB
Where RESR is the equivalent series resistance
of the output capacitor.
If this is the case, then add the second
compensation capacitor. Determine the value
by the equation:
C4 =
C2 × R ESR(MAX )
R3
Where RESR(MAX) is the maximum ESR of the
output capacitor.
For Example:
Given:
VOUT = 1.8V
C2 = 10µF Ceramic (ESR = 10mΩ max.)
Calculate:
R3 ≈ 4.36 × 10 8 (10µF) × (1.8 V ) = 7.85kΩ
(Use the nearest standard value of 7.5kΩ.)
C3 =
1.9 × 10 −14
= 1.05nF
10µF × 1.8 V
(Use 1nF since it is a standard value.)
8π × C2 × R ESR × f C = 0.19
which is less than 1, therefore the second
compensation capacitor (C4) is not required.
R3 ≈ 4.36 × 10 8 × C2 × VOUT
In this case, the actual crossover frequency is
less than the desired 75KHz, and it is
calculated by:
fC =
MP1567 Rev. 2.3
1/3/2006
R3 × G EA × G CS × VFB
2π × C2 × VOUT
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MP1567 – 1.2A SYNCHRONOUS RECTIFIED STEP-DOWN CONVERTER
External Boost Diode
For 5V input or output applications, it is
recommended that an external boost diode be
added. This will help improve the regulator
efficiency. The diode can be a low cost diode
such as an IN4148 or BAT54.
5V
BS
BOOST
DIODE
1
10nF
MP1567
SW
3
MP1567_F02
Figure 2—External Boost Diode
This diode is also recommended for high duty
cycle operation (when
VOUT
>65%) and high
VIN
output voltage (VOUT>12V) applications.
TYPICAL APPLICATION CIRCUITS
INPUT
6V
C7
10nF
2
10
OFF ON
6
OPEN IF
NOT USED
1
IN
BS
SW
EN
MP1567
FB
BP
SS
VOUT
1.8V/1.2A
3
7
9
SGND PGND COMP
5
C5
10nF
4
8
C3
1nF
C6
10nF
C4
OPEN
MP1567_F03
Figure 3—6V Input Application Circuit
MP1567 Rev. 2.3
1/3/2006
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MP1567 – 1.2A SYNCHRONOUS RECTIFIED STEP-DOWN CONVERTER
PACKAGE INFORMATION
MSOP10
MP1567 Rev. 2.3
1/3/2006
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MP1567 – 1.2A SYNCHRONOUS RECTIFIED STEP-DOWN CONVERTER
QFN10 (3mm x 3mm)
NOTICE: The information in this document is subject to change without notice. Please contact MPS for current specifications.
Users should warrant and guarantee that third party Intellectual Property rights are not infringed upon when integrating MPS
products into any application. MPS will not assume any legal responsibility for any said applications.
MP1567 Rev. 2.3
1/3/2006
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