Infineon BTS640S2 Smart sense high-side power switch Datasheet

PROFET® BTS 640 S2
Smart Sense High-Side
Power Switch
Product Summary
Operating voltage
On-state resistance
Load current (ISO)
Current limitation
Features
• Short circuit protection
• Current limitation
• Proportional load current sense
• CMOS compatible input
Package
• Open drain diagnostic output
• Fast demagnetization of inductive loads
TO220-7-11
• Undervoltage and overvoltage shutdown with
auto-restart and hysteresis
• Overload protection
• Thermal shutdown
1
Standard (staggered)
• Overvoltage protection including load dump (with
external GND-resistor)
• Reverse battery protection (with external GND-resistor)
• Loss of ground and loss of Vbb protection
• Electrostatic discharge (ESD) protection
Vbb(on)
RON
IL(ISO)
IL(SCr)
5.0 ... 34
V
30 mΩ
12.6
A
24
A
TO263-7-2
TO220-7-12
1
SMD
1
Straight
Application
• µC compatible power switch with diagnostic feedback for 12 V and 24 V DC grounded loads
• All types of resistive, inductive and capacitve loads
• Replaces electromechanical relays, fuses and discrete circuits
General Description
N channel vertical power FET with charge pump, ground referenced CMOS compatible input and diagnostic

feedback, proportional sense of load current, monolithically integrated in Smart SIPMOS technology.
Providing embedded protective functions.
Block Diagram
4
+ V bb
Voltage
Overvoltage
Current
Gate
source
protection
limit
protection
V Logic
3
IN
1
ST
Voltage
Charge pump
sensor
Level shifter
Rectifier
ESD
Logic
Limit for
unclamped
ind. loads
Output
Voltage
detection
OUT
IL
Current
Sense
Load
R
Temperature
sensor
5
IS
I IS
R
GND
IS
6, 7
O
GND

PROFET
Load GND
2
Signal GND
Semiconductor Group
Page 1 of 15
2003-Oct-01
BTS 640 S2
Pin
Symbol
1
ST
Function
Diagnostic feedback: open drain, invers to input level
2
GND
Logic ground
3
IN
Input, activates the power switch in case of logical high signal
4
Vbb
5
IS
Positive power supply voltage, the tab is shorted to this pin
Sense current output, proportional to the load current, zero in
the case of current limitation of load current
6&7
OUT
(Load, L)
Output, protected high-side power output to the load.
Both output pins have to be connected in parallel for operation
according this spec (e.g. kILIS).
Design the wiring for the max. short circuit current
Maximum Ratings at Tj = 25 °C unless otherwise specified
Parameter
Supply voltage (overvoltage protection see page 4)
Supply voltage for full short circuit protection
Symbol
Vbb
Vbb
Values
43
34
Unit
V
V
60
V
self-limited
-40 ...+150
-55 ...+150
85
A
°C
0,41
3,5
1.0
4.0
8.0
J
Tj Start=-40 ...+150°C
Load dump protection1) VLoadDump = VA + Vs, VA = 13.5V
VLoad dump3)
Load current (Short circuit current, see page 5)
Operating temperature range
Storage temperature range
Power dissipation (DC), TC ≤ 25 °C
Inductive load switch-off energy dissipation, single pulse
IL
Tj
Tstg
Ptot
RI2)= 2 Ω, RL= 1 Ω, td= 200 ms, IN= low or high
Vbb = 12V, Tj,start = 150°C, TC = 150°C const.
IL = 12.6 A, ZL = 4,2 mH, 0 Ω: EAS
IL = 4 A, ZL = 330 mH, 0 Ω: EAS
Electrostatic discharge capability (ESD)
IN: VESD
(Human Body Model)
ST, IS:
out to all other pins shorted:
W
kV
acc. MIL-STD883D, method 3015.7 and ESD assn. std. S5.1-1993
R=1.5kΩ; C=100pF
Input voltage (DC)
Current through input pin (DC)
Current through status pin (DC)
Current through current sense pin (DC)
VIN
IIN
IST
IIS
-10 ... +16
±2.0
±5.0
±14
V
mA
see internal circuit diagrams page 8
1)
2)
3)
Supply voltages higher than Vbb(AZ) require an external current limit for the GND and status pins (a 150 Ω
resistor in the GND connection is recommended).
RI = internal resistance of the load dump test pulse generator
VLoad dump is setup without the DUT connected to the generator according to ISO 7637-1 and DIN 40839
Semiconductor Group
Page 2
2003-Oct-01
BTS 640 S2
Thermal Characteristics
Parameter and Conditions
Thermal resistance
Symbol
chip - case: RthJC
junction - ambient (free air): RthJA
SMD version, device on PCB4):
min
----
Values
typ
max
-- 1.47
-75
33
--
Unit
K/W
Electrical Characteristics
Parameter and Conditions
Symbol
at Tj = 25 °C, Vbb = 12 V unless otherwise specified
Values
min
typ
max
Unit
Load Switching Capabilities and Characteristics
On-state resistance (pin 4 to 6&7)
Tj=25 °C: RON
Tj=150 °C:
--
27
54
30
60
mΩ
--
50
--
mV
11.4
12.6
--
A
IL(NOM)
IL(GNDhigh)
4.0
--
4.5
--
-8
A
mA
9; not subject to production test, specified by design
Turn-on time
IN
to 90% VOUT:
Turn-off time
IN
to 10% VOUT:
RL = 12 Ω, Tj =-40...+150°C
ton
toff
25
25
70
80
150
200
µs
Slew rate on
dV /dton
0.1
--
1
V/µs
Slew rate off
-dV/dtoff
0.1
--
1
V/µs
IL = 5 A
Output voltage drop limitation at small load
currents (pin 4 to 6&7), see page 14
IL = 0.5 A
VON(NL)
Tj =-40...+150°C:
Nominal load current, ISO Norm (pin 4 to 6&7)
IL(ISO)
VON = 0.5 V, TC = 85 °C
Nominal load current, device on PCB4)
TA = 85 °C, Tj ≤ 150 °C VON ≤ 0.5 V,
Output current (pin 6&7) while GND disconnected
or GND pulled up, Vbb=30 V, VIN= 0, see diagram page
10 to 30% VOUT, RL = 12 Ω, Tj =-40...+150°C
70 to 40% VOUT, RL = 12 Ω, Tj =-40...+150°C
4)
Device on 50mm*50mm*1.5mm epoxy PCB FR4 with 6cm2 (one layer, 70µm thick) copper area for Vbb
connection. PCB is vertical without blown air.
Semiconductor Group
Page 3
2003-Oct-01
BTS 640 S2
Parameter and Conditions
Symbol
at Tj = 25 °C, Vbb = 12 V unless otherwise specified
Values
min
typ
max
Operating Parameters
Operating voltage 5)
Undervoltage shutdown
Undervoltage restart
Vbb(on)
Tj =-40...+150°C: Vbb(under)
Tj =-40...+25°C: Vbb(u rst)
Tj =+150°C:
Undervoltage restart of charge pump
see diagram page 13
Tj =-40...+25°C: Vbb(ucp)
Tj =25...150°C:
Undervoltage hysteresis
∆Vbb(under)
5.0
3.2
--
--4.5
34
5.0
5.5
6.0
V
V
V
----
4.7
-0.5
6.5
7.0
--
V
Overvoltage shutdown
Overvoltage restart
Overvoltage hysteresis
Overvoltage protection6)
34
33
-41
43
--1
-47
43
---52
V
V
V
V
----
4
12
--
15
25
10
µA
--
1.2
3
mA
Tj =-40...+150°C:
∆Vbb(under) = Vbb(u rst) - Vbb(under)
Ibb=40 mA
Vbb(over)
Tj =-40...+150°C: Vbb(o rst)
Tj =-40...+150°C: ∆Vbb(over)
Tj =-40°C: Vbb(AZ)
Tj =+25...+150°C
Tj =-40...+150°C:
Standby current (pin 4)
Tj=-40...+25°C: Ibb(off)
Tj= 150°C:
IL(off)
Off state output current (included in Ibb(off))
VIN=0
VIN=0,
6)
7)
V
µA
Tj =-40...+150°C:
Operating current (Pin 2)7), VIN=5 V
5)
Unit
IGND
At supply voltage increase up to Vbb= 4.7 V typ without charge pump, VOUT ≈Vbb - 2 V
Supply voltages higher than Vbb(AZ) require an external current limit for the GND and status pins (a 150 Ω
resistor in the GND connection is recommended). See also VON(CL) in table of protection functions and
circuit diagram page 9.
Add IST, if IST > 0, add IIN, if VIN>5.5 V
Semiconductor Group
Page 4
2003-Oct-01
BTS 640 S2
Parameter and Conditions
Symbol
at Tj = 25 °C, Vbb = 12 V unless otherwise specified
Protection Functions8)
Initial peak short circuit current limit (pin 4 to 6&7)
IL(SCp)
Tj =-40°C:
Tj =25°C:
=+150°C:
Tj
Repetitive short circuit shutdown current limit
IL(SCr)
Tj = Tjt (see timing diagrams, page 12)
Values
min
typ
max
Unit
48
40
31
56
50
37
65
58
45
A
--
24
--
A
41
43
150
---
-47
-10
--
-52
--32
V
°C
K
V
--
600
--
mV
4550
3300
5000
5000
6000
8000
4550
4000
5000
5000
5550
6500
5.4
6.1
6.9
V
0
0
0
----
1
15
10
µA
Output clamp (inductive load switch off)
Tj =-40°C:
Tj =+25..+150°C:
Thermal overload trip temperature
Thermal hysteresis
Reverse battery (pin 4 to 2) 9)
at VOUT = Vbb - VON(CL); IL= 40 mA,
VON(CL)
Tjt
∆Tjt
-Vbb
Reverse battery voltage drop (Vout > Vbb)
IL = -5 A
Tj=150 °C: -VON(rev)
Diagnostic Characteristics
Current sense ratio10), static on-condition,
VIS = 0...5 V, Vbb(on) = 6.511)...27V,
Tj
kILIS = IL / IIS
= -40°C, IL = 5 A: kILIS
Tj= -40°C, IL= 0.5 A:
Tj= 25...+150°C, IL= 5 A:
,
Tj= 25...+150°C, IL = 0.5 A:
Current sense output voltage limitation
Tj = -40 ...+150°C
IIS = 0, IL = 5 A:
VIS(lim)
Current sense leakage/offset current
Tj = -40 ...+150°C
VIN=0, VIS = 0, IL = 0: IIS(LL)
VIN=5 V, VIS = 0, IL = 0: IIS(LH)
VIN=5 V, VIS = 0, VOUT = 0 (short circuit): IIS(SH)12 )
8)
9)
10)
11)
12)
Integrated protection functions are designed to prevent IC destruction under fault conditions described in the
data sheet. Fault conditions are considered as "outside" normal operating range. Protection functions are not
designed for continuous repetitive operation.
Requires 150 Ω resistor in GND connection. The reverse load current through the intrinsic drain-source
diode has to be limited by the connected load. Note that the power dissipation is higher compared to normal
operating conditions due to the voltage drop across the intrinsic drain-source diode. The temperature
protection is not active during reverse current operation! Input and Status currents have to be limited (see
max. ratings page 2 and circuit page 9).
This range for the current sense ratio refers to all devices. The accuracy of the kILIS can be raised at least by
a factor of two by matching the value of kILIS for every single device.
In the case of current limitation the sense current IIS is zero and the diagnostic feedback potential VST is
High. See figure 2b, page 11.
Valid if Vbb(u rst) was exceeded before.
not subject to production test, specified by design
Semiconductor Group
Page 5
2003-Oct-01
BTS 640 S2
Parameter and Conditions
Symbol
at Tj = 25 °C, Vbb = 12 V unless otherwise specified
Current sense settling time to IIS static±10% after
positive input slope13) , IL = 0
5 A,
Values
min
typ
max
Unit
tson(IS)
--
--
300
µs
Current sense settling time to 10% of IIS static after
negative input slope13) , IL = 5
0A,
tsoff(IS)
--
30
100
µs
--
10
--
µs
2
3
4
V
5
15
40
kΩ
3,0
4,5
7,0
kΩ
-1.5
--
--0.5
3.5
---
V
V
V
1
--
50
µA
20
50
90
µA
td(ST OL3)
--
400
--
µs
tdon(ST)
--
13
--
µs
tdoff(ST)
--
1
--
µs
5.4
----
6.1
----
6.9
0.4
0.7
2
V
Tj= -40...+150°C
Tj= -40...+150°C
Current sense rise time (60% to 90%) after change
of load current13) , IL = 2.5
5A
tslc(IS)
Open load detection voltage14) (off-condition)
VOUT(OL)
Tj=-40..150°C:
Internal output pull down
RO
(pin 6 to 2), VOUT=5 V, Tj=-40..150°C
Input and Status Feedback15)
Input resistance
RI
see circuit page 8
Input turn-on threshold voltage
Tj =-40..+150°C: VIN(T+)
Input turn-off threshold voltage
Tj =-40..+150°C: VIN(T-)
Input threshold hysteresis
∆ VIN(T)
Off state input current (pin 3), VIN = 0.4 V
Tj =-40..+150°C IIN(off)
On state input current (pin 3), VIN = 5 V
Tj =-40..+150°C
IIN(on)
Delay time for status with open load
after Input neg. slope (see diagram page 13)
Status delay after positive input slope13)
Tj=-40 ... +150°C:
Status delay after negative input
slope13)
Tj=-40 ... +150°C:
Status output (open drain)
Zener limit voltage Tj =-40...+150°C, IST = +1.6 mA: VST(high)
ST low voltage
Tj =-40...+25°C, IST = +1.6 mA: VST(low)
Tj = +150°C, IST = +1.6 mA:
Status leakage current, VST = 5 V,
Tj=25 ... +150°C: IST(high)
µA
13)
not subject to production test, specified by design
External pull up resistor required for open load detection in off state.
15) If a ground resistor R
GND is used, add the voltage drop across this resistor.
14)
Semiconductor Group
Page 6
2003-Oct-01
BTS 640 S2
Truth Table
Normal
operation
Currentlimitation
Short circuit to
GND
Overtemperature
Short circuit to
Vbb
Open load
Undervoltage
Overvoltage
Negative output
voltage clamp
L = "Low" Level
H = "High" Level
16)
17)
18)
19)
20)
Input
Output
Status
Current
Sense
level
level
level
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
L
H
L
H
L
L16)
L
L
H
H
H
L
H
H
H
H
H
H
L17)
L
H (L20))
L
H
L
H
L
H
IIS
0
nominal
0
0
0
0
0
0
0
<nominal 18)
0
0
0
0
0
0
0
L19)
H
L
L
L
L
L
X = don't care
Z = high impedance, potential depends on external circuit
Status signal after the time delay shown in the diagrams (see fig 5. page 12...13)
The voltage drop over the power transistor is Vbb-VOUT>typ.3V. Under this condition the sense current IIS is
zero
An external short of output to Vbb, in the off state, causes an internal current from output to ground. If RGND
is used, an offset voltage at the GND and ST pins will occur and the VST low signal may be errorious.
Low ohmic short to Vbb may reduce the output current IL and therefore also the sense current IIS.
Power Transistor off, high impedance
with external resistor between pin 4 and pin 6&7
Semiconductor Group
Page 7
2003-Oct-01
BTS 640 S2
Status output
Terms
+5V
V
bb
4
I IN
3
I ST
I IS
V
IN
1
Ibb
VON
Vbb
IN
OUT
6
R ST(ON)
IL
ST
PROFET
ST
OUT
IS
VST
5
V
IS
7
GND
V
2
R
GND
OUT
I
GND
GND
ESDZD
ESD-Zener diode: 6.1 V typ., max 5 mA;
RST(ON) < 440 Ω at 1.6 mA, The use of ESD zener
diodes as voltage clamp at DC conditions is not
recommended.
Input circuit (ESD protection)
R
IN
Current sense output
I
V
ESD-ZD I
I
IS
I
IS
I
IS
GND
R
ESD-ZD
IS
GND
The use of ESD zener diodes as voltage clamp at DC
conditions is not recommended.
ESD-Zener diode: 6.1 V typ., max 14 mA;
RIS = 1 kΩ nominal
Inductive and overvoltage output clamp
+ V bb
V
Z
VON
OUT
GND
PROFET
VON clamped to 47 V typ.
Semiconductor Group
Page 8
2003-Oct-01
BTS 640 S2
Overvoltage protection of logic part
GND disconnect
+ 5V
+ V bb
R ST
V
RI
IN
V
bb
4
3
Z2
1
ST
Logic
IS
5
RV
V
R IS
Ibb
IN
Vbb
ST
PROFET
6
OUT
7
OUT
IS
GND
2
Z1
V V V
IN ST IS
V
GND
GND
R GND
Any kind of load. In case of Input=high is VOUT ≈ VIN - VIN(T+) .
Signal GND
Due to VGND >0, no VST = low signal available.
VZ1 = 6.1 V typ., VZ2 = 47 V typ., RI= 4 kΩ typ,
RGND= 150 Ω, RST= 15 kΩ, RIS= 1 kΩ, RV= 15 kΩ,
GND disconnect with GND pull up
4
Reverse battery protection
3
+ 5V
IN
Vbb
OUT
1
- Vbb
R ST
5
RI
IN
ST
PROFET
OUT
IS
Logic
6
7
GND
2
ST
VZ1
IS
OUT
V
bb
Power
Inverse
Diode
RV
R IS
V
GND
Any kind of load. If VGND > VIN - VIN(T+) device stays off
Due to VGND >0, no VST = low signal available.
GND
RL
RGND
Vbb disconnect with energized inductive
load
Power GND
Signal GND
V VSTV
IN
IS
The load RL is inverse on, temperature protection is
not active
RGND= 150 Ω, RI= 4 kΩ typ, RST≥ 500 Ω, RIS≥ 200 Ω,
RV≥ 500 Ω,
4
high
3
1
5
Open-load detection
R
ST
PROFET
OUT
OUT
IS
6
7
GND
V
bb
bb
EXT
Vbb
2
OFF-state diagnostic condition: VOUT > 3 V typ.; IN low
V
IN
Normal load current can be handled by the PROFET
itself.
OFF
Out
ST
Logic
R
V
OUT
O
Signal GND
Semiconductor Group
Page 9
2003-Oct-01
BTS 640 S2
Vbb disconnect with charged external
inductive load
4
high
3
1
5
IN
Vbb
ST
PROFET
OUT
OUT
IS
6
D
7
GND
2
RL
L
V
bb
If other external inductive loads L are connected to the PROFET,
additional elements like D are necessary.
Inductive Load switch-off energy
dissipation
E bb
E AS
4
3
1
=
5
Vbb
IN
ST
ELoad
Vbb
OUT
PROFET
OUT
IS
6
7
GND
EL
2
ER
Energy stored in load inductance:
2
EL = 1/2·L·I L
While demagnetizing load inductance, the energy
dissipated in PROFET is
EAS= Ebb + EL - ER= VON(CL)·iL(t) dt,
with an approximate solution for RL > 0 Ω:
EAS=
IL· L
IL·RL
·(V + |VOUT(CL)|)· ln (1+
)
|VOUT(CL)|
2·RL bb
Semiconductor Group
Page 10
2003-Oct-01
BTS 640 S2
Figure 2a: Switching a lamp
Timing diagrams
IN
Figure 1a: Switching a resistive load,
change of load current in on-condition:
ST
IN
ST
t don(ST)
V
t doff(ST)
VOUT
IL
t on
IL
OUT
t off
tslc(IS)
t slc(IS)
I IS
t
Load 1
Load 2
IIS
t son(IS)
t
t soff(IS)
Figure 2b: Switching a lamp with current limit:
IN
The sense signal is not valid during settling time after turn or
change of load current.
ST
Figure 1b: Vbb turn on:
IN
VOUT
Vbb
IL
I
L
IIS
t
I IS
ST
t
proper turn on under all conditions
Semiconductor Group
Page 11
2003-Oct-01
BTS 640 S2
Figure 4a: Overtemperature:
Reset if Tj <Tjt
Figure 2c: Switching an inductive load:
IN
IN
ST
ST
VOUT
IL
IL
I IS
IIS
TJ
t
t
Figure 3a: Short circuit:
shut down by overtempertature, reset by cooling
Figure 5a: Open load: detection in ON-state,
open load occurs in on-state
IN
IL
IN
IL(SCp)
I
ST
L(SCr)
VOUT
I IS
IL
ST
open
normal
t
IIS
Heating up may require several milliseconds, depending on
external conditions
IL(SCp) = 50 A typ. increases with decreasing temperature.
Semiconductor Group
normal
Page 12
t
2003-Oct-01
BTS 640 S2
Figure 6b: Undervoltage restart of charge pump
Figure 5b: Open load: detection in ON- and OFF-state
(with REXT), turn on/off to open load
VON(CL)
V on
IN
on-state
off-state
ST
V
off-state
td(ST OL3)
bb(over)
V
OUT
V
V
bb(u rst)
V
I
L
V
open load
bb(o rst)
bb(u cp)
bb(under)
V bb
I IS
t
charge pump starts at Vbb(ucp) =4.7 V typ.
Figure 7a: Overvoltage:
Figure 6a: Undervoltage:
IN
IN
ST
not defined
ST
Vbb
VON(CL)
V
bb(over)
V
bb(o rst)
V
bb
V
bb(under)
I
Vbb(u cp)
Vbb(u rst)
IL
L
I
IIS
IS
t
t
Semiconductor Group
Page 13
2003-Oct-01
BTS 640 S2
Figure 8b: Current sense ratio21:
Figure 8a: Current sense versus load current:
1.3
[mA]
1.2
15000
k ILIS
I IS
1.1
1
10000
0.9
0.8
0.7
0.6
5000
0.5
0.4
0.3
0.2
0.1
IL
0
0
1
2
3
4
[A] I L
0
0 1 2 3 4 5 6 7 8 9 10 11 12 13
5 [A] 6
Figure 9a: Output voltage drop versus load current:
VON
[V]
0.2
RON
0.1
VON(NL)
IL
0.0
0
21
Semiconductor Group
Page 14
1
2
3
4
5
6
7 [A] 8
This range for the current sense ratio refers to all
devices. The accuracy of the kILIS can be raised at
least by a factor of two by matching the value of
kILIS for every single device.
2003-Oct-01
BTS 640 S2
Package and Ordering Code
All dimensions in mm
Standard (=staggered): P-TO220-7-11
Straight: P-TO220-7-12
Sales code
BTS640S2
Sales Code
BTS640S2 S
Ordering code
Q67060-S6307-A5
Ordering code
Q67060-S6307-A7
10 ±0.2
A
4.4
0...0.15
0.25
M
A C
Ordering code
Q67060-S6307-A6
10 ±0.2
7x0.6 ±0.1
0.5 ±0.1
8˚ max.
0.1
Typical
All metal surfaces tin plated, except area of cut.
Ordering code
2.8 ±0.2
1)
We hereby disclaim any and all warranties, including but not limited
to warranties of non-infringement, regarding circuits, descriptions
and charts stated herein.
Information
For further information on technology, delivery terms and conditions
and prices please contact your nearest Infineon Technologies Office
in Germany or our Infineon Technologies Representatives
worldwide (see address list).
6x1.27
A B
Typical
All metal surfaces tin plated, except area of cut.
Infineon Technologies is an approved CECC manufacturer.
2.7 ±0.3
4.7 ±0.5
1.3 ±0.3
8 1)
1±0.3
9.25 ±0.2
(15)
0.05
0...0.15
1)
A B C
Terms of delivery and rights to technical change reserved.
2.4
M
M
Attention please!
The information herein is given to describe certain components and
shall not be considered as a guarantee of characteristics.
4.4
1.27 ±0.1
B
0.1
A
0.25
2.4
Published by
Infineon Technologies AG,
St.-Martin-Strasse 53,
D-81669 München
© Infineon Technologies AG 2001
All Rights Reserved.
BTS640S2 G
1)
0.5 ±0.1
7x
0.6 ±0.1
1.27
1)
Sales code
9.8 ±0.15
0.05
8.4 ±0.4
SMD: P-TO263-7-2 (tape&reel)
0.25
0...0.15
3.9 ±0.4
Typical
All metal surfaces tin plated, except area of cut.
8.5
13.4
17 ±0.3
15.65 ±0.3
0.5 ±0.1
4.4
1.27 ±0.1
11±0.5
3.7 ±0.3
C
2.4
7x
0.6 ±0.1
1.27
9.25 ±0.2
2.8 ±0.2
8.6 ±0.3
C
0.05
B
8.5
3.7 -0.15
1.27 ±0.1
10.2 ±0.3
13.4
17 ±0.3
15.65 ±0.3
1)
8.5
3.7 -0.15
1)
13 ±0.5
1)
1)
A
9.8 ±0.15
9.25 ±0.2
10 ±0.2
9.8 ±0.15
Warnings
Due to technical requirements components may contain dangerous
substances. For information on the types in question please contact
your nearest Infineon Technologies Office.
Q67060-S6307-A6
Infineon Technologies Components may only be used in life-support
devices or systems with the express written approval of Infineon
Technologies, if a failure of such components can reasonably be
expected to cause the failure of that life-support device or system,
or to affect the safety or effectiveness of that device or system. Life
support devices or systems are intended to be implanted in the
human body, or to support and/or maintain and sustain and/or
protect human life. If they fail, it is reasonable to assume that the
health of the user or other persons may be endangered.
Semiconductor Group
Page 15
2003-Oct-01