TI1 AM26C31IDR Am26c31 quadruple differential line driver Datasheet

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AM26C31
SLLS103O – DECEMBER 1990 – REVISED JUNE 2016
AM26C31 Quadruple Differential Line Driver
1 Features
3 Description
•
The AM26C31 device is a differential line driver with
complementary outputs, designed to meet the
requirements of TIA/EIA-422-B and ITU (formerly
CCITT). The 3-state outputs have high-current
capability for driving balanced lines, such as twistedpair or parallel-wire transmission lines, and they
provide the high-impedance state in the power-off
condition. The enable functions are common to all
four drivers and offer the choice of an active-high (G)
or active-low (G) enable input. BiCMOS circuitry
reduces power consumption without sacrificing
speed.
1
•
•
•
•
•
•
•
•
Meets or Exceeds the Requirements of TIA/EIA422-B and ITU Recommendation V.11
Low Power, ICC = 100 μA Typical
Operates From a Single 5-V Supply
High Speed, tPLH = tPHL = 7 ns Typical
Low Pulse Distortion, tsk(p) = 0.5 ns Typical
High Output Impedance in Power-Off Conditions
Improved Replacement for AM26LS31 Device
Available in Q-Temp Automotive
– High-Reliability Automotive Applications
– Configuration Control and Print Support
– Qualification to Automotive Standards
On Products Compliant to MIL-PRF-38535, All
Parameters Are Tested Unless Otherwise Noted.
On All Other Products, Production Processing
Does Not Necessarily Include Testing of All
Parameters.
The AM26C31C device is characterized for operation
from 0°C to 70°C, the AM26C31I device is
characterized for operation from –40°C to 85°C, the
AM26C31Q device is characterized for operation over
the automotive temperature range of –40°C to 125°C,
and the AM26C31M device is characterized for
operation over the full military temperature range of
–55°C to 125°C.
Device Information(1)
2 Applications
•
•
•
•
•
•
PART NUMBER
Chemical and Gas Sensors
Field Transmitters: Temperature Sensors and
Pressure Sensors
Military: Radars and Sonars
Motor Control: Brushless DC and Brushed DC
Military and Avionics Imaging
Temperature Sensors and Controllers Using
Modbus
PACKAGE
BODY SIZE (NOM)
AM26C31J
CDIP (16)
19.56 mm × 6.92 mm
AM26C31N
PDIP (16)
19.30 mm × 6.35 mm
AM26C31NS
SO (16)
10.30 mm × 5.30 mm
AM26C31W
CFP (16)
10.30 mm × 6.73 mm
AM26C31D
SOIC (16)
9.90 mm × 3.91 mm
AM26C31DB
SSOP (16)
6.20 mm × 5.30 mm
AM26C31PW
TSSOP (16)
5.00 mm × 4.40 mm
AM26C31FK
LCCC (20)
8.89 mm × 8.89 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Common Application Diagram
VCC
VCC
0.1 PF
Input 1 Signal
1A
1Y
Output 1
Differential Pair
1Z
G
2Z
Output 2
Differential Pair
Input 2 Signal
2Y
2A
16
1
15
2
14
3
13
4
12
5
11
6
10
7
9
4A
Input 4 Signal
4Y
4Z
G
Output 4
Differential Pair
Active Low Enable Signal
3Z
3Y
3A
Output 3
Differential Pair
Input 3 Signal
8
GND
Copyright © 2016, Texas Instruments Incorporated
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
AM26C31
SLLS103O – DECEMBER 1990 – REVISED JUNE 2016
www.ti.com
Table of Contents
1
2
3
4
5
6
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
3
4
6.1
6.2
6.3
6.4
6.5
4
4
4
5
10 Power Supply Recommendations ..................... 13
11 Layout................................................................... 14
5
11.1 Layout Guidelines ................................................. 14
11.2 Layout Example .................................................... 14
6.6
6.7
6.8
6.9
7
Absolute Maximum Ratings .....................................
ESD Ratings..............................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Electrical Characteristics: AM26C31C and
AM26C31I ..................................................................
Electrical Characteristics: AM26C31Q and
AM26C31M ................................................................
Switching Characteristics: AM26C31C and
AM26C31I ..................................................................
Switching Characteristics: AM26C31Q and
AM26C31M ................................................................
Typical Characteristics ..............................................
8
Detailed Description ............................................ 10
8.1
8.2
8.3
8.4
9
Overview .................................................................
Functional Block Diagrams .....................................
Feature Description.................................................
Device Functional Modes........................................
10
10
11
11
Application and Implementation ........................ 12
9.1 Application Information............................................ 12
9.2 Typical Application ................................................. 12
12 Device and Documentation Support ................. 15
6
6
7
7
Parameter Measurement Information .................. 8
12.1
12.2
12.3
12.4
12.5
Receiving Notification of Documentation Updates
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
15
15
15
15
15
13 Mechanical, Packaging, and Orderable
Information ........................................................... 15
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision N (October 2011) to Revision O
Page
•
Updated the Features section and added the Applications section, the Device Information table, ESD Ratings table,
Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply
Recommendations section, Layout section, Device and Documentation Support section, and Mechanical,
Packaging, and Orderable Information section. ..................................................................................................................... 1
•
Deleted Ordering Information table, see POA at the end of the data sheet........................................................................... 1
•
Changed Thermal Information table ....................................................................................................................................... 5
Changes from Revision M (June 2008) to Revision N
•
2
Page
Changed units to mA from µA to fix units typo....................................................................................................................... 4
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SLLS103O – DECEMBER 1990 – REVISED JUNE 2016
5 Pin Configuration and Functions
J, W, D, DB, NS, N, or PW Package
16-Pin CDIP, CFP, SOIC, SSOP, SO, PDIP, or TSSOP
Top View
13
4Z
5
12
G
2Y
6
11
3Z
2A
7
10
3Y
GND
8
9
3A
NC
VCC
4A
19
1Z
4
18
4Y
G
5
17
4Z
NC
6
16
NC
2Z
7
15
G
2Y
8
14
3Z
13
4
9
G
2Z
1
4Y
20
4A
14
12
15
3
11
2
1Z
1A
1Y
2
VCC
10
16
1Y
1
3
1A
FK Package
20-Pin LCCC
Top View
3Y
3A
NC
GND
2A
Not to scale
Not to scale
Pin Functions
PIN
CDIP, CFP, SOIC,
SSOP, SO, PDIP,
TSSOP
LCCC
1A
1
2
I
Driver 1 input
1Y
2
3
O
Driver 1 output
1Z
3
4
O
Driver 1 inverted output
2A
7
9
I
Driver 2 input
2Y
6
8
O
Driver 2 output
2Z
5
7
O
Driver 2 inverted output
3A
9
12
I
Driver 3 input
3Y
10
13
O
Driver 3 output
3Z
11
14
O
Driver 3 inverted output
4A
15
19
I
Driver 3 input
4Y
14
18
O
Driver 3 output
4Z
13
17
O
Driver 3 inverted output
G
4
5
I
Active high enable
G
12
15
I
Active low enable
GND
8
10
—
Ground pin
NC (1)
—
1, 6, 11, 16
—
No internal connection
VCC
16
20
—
Power pin
NAME
(1)
I/O
DESCRIPTION
NC – No connection
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SLLS103O – DECEMBER 1990 – REVISED JUNE 2016
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6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1)
MIN
MAX
UNIT
VCC
Supply voltage (2)
–0.5
7
V
VI
Input voltage
–0.5
VCC + 0.5
V
VID
Differential input voltage
–14
14
V
VO
Output voltage
–0.5
7
IIK
IOK
Input or output clamp current
±20
mA
IO
Output current
±150
mA
200
mA
VCC current
GND current
–200
TJ
Operating virtual junction temperature
Tstg
Storage temperature
(1)
(2)
mA
–65
150
°C
150
°C
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltage values, except differential voltages, are with respect to the network ground terminal.
6.2 ESD Ratings
VALUE
V(ESD)
(1)
(2)
Electrostatic
discharge
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001
(1)
UNIT
±2000
Charged-device model (CDM), per JEDEC specification JESD22-C101 (2)
V
±1000
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
MIN
NOM
MAX
4.5
5
5.5
UNIT
VCC
Supply voltage
VID
Differential input voltage
VIH
High-level input voltage
VIL
Low-level input voltage
0.8
V
IOH
High-level output current
–20
mA
IOL
Low-level output current
20
mA
±7
TA
4
Operating free-air temperature
V
2
AM26C31C
V
0
70
AM26C31I
–40
85
AM26C31Q
–40
125
AM26C31M
–55
125
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V
°C
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6.4 Thermal Information
AM26C31
THERMAL METRIC (1)
D
(SOIC)
DB
(SSOP)
PW
(TSSOP)
NS
(SO)
N
(PDIP)
J
(CDIP)
W
(CFP)
FK
(LCCC)
UNIT
16 PINS
16 PINS
16 PINS
16 PINS
16 PINS
16 PINS
16 PINS
16 PINS
RθJA
Junction-to-ambient
thermal resistance (2) (3)
75.3
93.1
102.1
75.6
44.5
—
—
—
°C/W
RθJC(top)
Junction-to-case (top)
thermal resistance
35.6
43.8
37.2
32.6
31.1
39.3 (4)
58.9 (4)
37.1 (4)
°C/W
RθJB
Junction-to-board
thermal resistance
32.5
43.6
47.0
36.4
24.5
56.4 (4)
109.3 (4)
36.2 (4)
°C/W
ψJT
Junction-to-top
characterization
parameter
7.1
9.6
2.8
5.7
15.4
—
—
—
°C/W
ψJB
Junction-to-board
characterization
parameter
32.3
43.1
46.4
36.0
24.4
—
—
—
°C/W
RθJC(bot)
Junction-to-case
(bottom) thermal
resistance
n/a
n/a
n/a
n/a
n/a
12.0 (4)
5.7 (4)
4.3 (4)
°C/W
(1)
(2)
(3)
(4)
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
Maximum power dissipation is a function of TJ(max), RθJA, and TA. The maximum allowable power dissipation at any allowable ambient
temperature is PD = (TJ(max) – TA) / RθJA. Operating at the absolute maximum TJ of 150°C can affect reliability.
The package thermal impedance is calculated in accordance with JESD 51-7.
Modelling assumption: MIL-STD-883 for RθJC(top) and RθJC(bot) JESD51 for RθJB.
6.5 Electrical Characteristics: AM26C31C and AM26C31I
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER
VOH
High-level output voltage
IO = –20 mA
VOL
Low-level output voltage
IO = 20 mA
VOD
Differential output voltage magnitude
RL = 100 Ω, see Figure 2
Δ|VOD|
Change in magnitude of differential output voltage (2)
RL = 100 Ω, see Figure 2
VOC
Common-mode output voltage
Δ|VOC|
II
Input current
VI = VCC or GND
IO(off)
Driver output current with power off
VCC = 0
IOS
Driver output short-circuit current
VO = 0
0.2
2
MAX
3.4
UNIT
V
0.4
3.1
V
V
V
RL = 100 Ω, see Figure 2
3
V
Change in magnitude of common-mode output voltage (2) RL = 100 Ω, see Figure 2
±0.4
V
±1
μA
High-impedance off-state output current
ICC
Quiescent supply current
Ci
Input capacitance
(3)
2.4
±0.4
IOZ
(1)
(2)
MIN TYP (1)
TEST CONDITIONS
VO = 6 V
100
VO = –0.25 V
–100
–30
–150
VO = 2.5 V
20
VO = 0.5 V
–20
IO = 0
VI = 0 or 5 V
VI = 2.4 V or 0.5 V (3)
1.5
μA
mA
μA
100
μA
3
mA
6
pF
All typical values are at VCC = 5 V and TA = 25°C.
Δ|VOD| and Δ|VOC| are the changes in magnitude of VOD and VOC, respectively, that occur when the input is changed from a high level to
a low level.
This parameter is measured per input. All other inputs are at 0 or 5 V.
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6.6 Electrical Characteristics: AM26C31Q and AM26C31M
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER
VOH
High-level output voltage
IO = –20 mA
VOL
Low-level output voltage
IO = 20 mA
VOD
Differential output voltage magnitude
RL = 100 Ω, see Figure 2
Δ|VOD|
Change in magnitude of differential output voltage (2)
RL = 100 Ω, see Figure 2
VOC
Common-mode output voltage
Δ|VOC|
Change in magnitude of common-mode output voltage (2)
II
Input current
VI = VCC or GND
IO(off)
Driver output current with power off
VCC = 0
IOS
Driver output short-circuit current
VO = 0
IOZ
High-impedance off-state output current
ICC
Quiescent supply current
Ci
Input capacitance
(1)
(2)
(3)
MIN TYP (1)
TEST CONDITIONS
2.2
MAX
3.4
0.2
2
UNIT
V
0.4
3.1
V
V
±0.4
V
RL = 100 Ω, see Figure 2
3
V
RL = 100 Ω, see Figure 2
±0.4
V
±1
μA
VO = 6 V
100
VO = –0.25 V
–100
–170
VO = 2.5 V
20
VO = 0.5 V
–20
IO = 0
μA
mA
μA
VI = 0 or 5 V
100
μA
VI = 2.4 V or 0.5 V (3)
3.2
mA
6
pF
All typical values are at VCC = 5 V and TA = 25°C.
Δ|VOD| and Δ|VOC| are the changes in magnitude of VOD and VOC, respectively, that occur when the input is changed from a high level to
a low level.
This parameter is measured per input. All other inputs are at 0 or 5 V.
6.7 Switching Characteristics: AM26C31C and AM26C31I
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP (1)
MAX
3
7
12
3
7
12
UNIT
tPLH
Propagation delay time, low-to-high-level output
tPHL
Propagation delay time, high-to-low-level output
tsk(p)
Pulse skew time (|tPLH – tPHL|)
S1 is open, see Figure 3
0.5
4
ns
tr(OD), tf(OD)
Differential output rise and fall times
S1 is open, see Figure 4
5
10
ns
tPZH
Output enable time to high level
10
19
tPZL
Output enable time to low level
10
19
tPHZ
Output disable time from high level
7
16
tPLZ
Output disable time from low level
7
16
Cpd
Power dissipation capacitance (each driver) (2)
(1)
(2)
6
S1 is open, see Figure 3
S1 is closed, see Figure 5
S1 is closed, see Figure 5
S1 is open, see Figure 3
170
ns
ns
ns
pF
All typical values are at VCC = 5 V and TA = 25°C.
Cpd is used to estimate the switching losses according to PD = Cpd × VCC 2 × f, where f is the switching frequency.
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6.8 Switching Characteristics: AM26C31Q and AM26C31M
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER
TEST CONDITIONS
Propagation delay time, low-to-high-level
output
tPLH
MIN
TYP (1)
MAX
7
12
6.5
12
S1 is open, see Figure 3
UNIT
ns
tPHL
Propagation delay time, high-to-low-level
output
tsk(p)
Pulse skew time (|tPLH – tPHL|)
S1 is open, see Figure 3
0.5
4
ns
tr(OD), tf(OD)
Differential output rise and fall times
S1 is open, see Figure 4
5
12
ns
tPZH
Output enable time to high level
10
19
tPZL
Output enable time to low level
10
19
tPHZ
Output disable time from high level
7
16
tPLZ
Output disable time from low level
7
16
Cpd
Power dissipation capacitance (each
driver) (2)
(1)
(2)
S1 is closed, see Figure 5
S1 is closed, see Figure 5
S1 is open, see Figure 3
100
ns
ns
pF
All typical values are at VCC = 5 V and TA = 25°C.
Cpd is used to estimate the switching losses according to PD = Cpd × VCC 2 × f, where f is the switching frequency.
6.9 Typical Characteristics
Figure 1. Supply Current vs Switching Frequency
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7 Parameter Measurement Information
Figure 2. Differential and Common-Mode Output Voltages
A.
C1, C2, and C3 include probe and jig capacitance.
B.
All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, duty cycle ≤ 50%, and
tr, tf ≤ 6 ns.
C2 = 40 pF
Input
RL/2
500 Ω
C1 =
40 pF
1.5 V
S1
C3 = 40 pF
RL/2
See Note A
TEST CIRCUIT
3V
1.3 V
0V
Input A
(see Note B)
tPLH
Output Y
50%
tPHL
50%
1.3 V
tsk(p)
Output Z
50%
tsk(p)
50%
1.3 V
tPHL
tPLH
Figure 3. Propagation Delay Time and Skew Waveforms and Test Circuit
8
A.
C1, C2, and C3 include probe and jig capacitance.
B.
All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, duty cycle ≤ 50%, and
tr, tf ≤ 6 ns.
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Parameter Measurement Information (continued)
Figure 4. Differential-Output Rise- and Fall-Time Waveforms and Test Circuit
A.
C1, C2, and C3 include probe and jig capacitance.
B.
All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, duty cycle ≤ 50%, and
tr, tf ≤ 6 ns.
C.
Each enable is tested separately.
Output
C2 =
40 pF
0V
3V
Enable Inputs
(see Note B)
Input A
C1 =
40 pF
C3 =
40 pF
G
G
50 Ω
500 Ω
1.5 V
S1
50 Ω
Output
See Note A
TEST CIRCUIT
Enable G Input
(see Note C)
3V
1.3 V1.3 V
Enable G Input
Output WIth
0 V to A Input
0V
1.5 V
VOL + 0.3 V
VOL
tPLZ
Output WIth
3 V to A Input
0.8 V
VOH - 0.3 V
tPZL
VOH
2V
1.5 V
tPHZ
tPZH
VOLTAGE WAVEFORMS
Figure 5. Output Enable and Disable Time Waveforms and Test Circuit
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8 Detailed Description
8.1 Overview
The AM26C31 is a quadruple differential line driver with complementary outputs. The device is designed to meet
the requirements of TIA/EIA-422-B and ITU (formerly CCITT), and it is generally used to communicate over
relatively long wires in noisy environments.
8.2 Functional Block Diagrams
4
G
G
12
2
1
1A
3
6
7
2A
5
10
3A
9
11
14
4A
15
13
1Y
1Z
2Y
2Z
3Y
3Z
4Y
4Z
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Pin numbers shown are for the D, DB, J, N, NS, PW, and W packages.
Figure 6. Logic Diagram (Positive Logic)
10
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Functional Block Diagrams (continued)
TYPICAL OF ALL OUTPUTS
EQUIVALENT OF EACH INPUT
VCC
VCC
Input
Output
GND
GND
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Figure 7. Schematics of Inputs and Outputs
8.3 Feature Description
8.3.1 Active-High and Active-Low
The device can be configured using the G and G logic inputs to select transmitter output. A logic high on the G
pin or a logic low on the G pin enables the device to operate. These pins are simply a way to configure the logic
to match that of the receiving or transmitting controller or microprocessor.
8.3.2 Operates from a Single 5-V Supply
Both the logic and transmitters operate from a single 5-V rail, making designs much more simple. The line drivers
and receivers can operate off the same rail as the host controller or a similar low voltage supply, thus simplifying
power structure.
8.4 Device Functional Modes
Table 1 lists the functional modes of the AM26C31.
Table 1. Function Table (Each Driver) (1)
INPUT
A
(1)
ENABLES
OUTPUTS
G
G
Y
Z
H
H
X
H
L
H
L
H
X
L
H
X
L
H
L
L
X
L
L
H
X
L
H
Z
Z
H = High level,
L = Low level,
X = Irrelevant,
Z = High impedance (off)
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9 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
9.1 Application Information
When designing a system that uses drivers, receivers, and transceivers that comply with RS-422, proper cable
termination is essential for highly reliable applications with reduced reflections in the transmission line. Because
RS-422 allows only one driver on the bus, if termination is used, it is placed only at the end of the cable near the
last receiver. Factors to consider when determining the type of termination usually are performance requirements
of the application and the ever-present factor, cost. The different types of termination techniques discussed are
unterminated lines, parallel termination, AC termination, and multipoint termination. For laboratory experiments,
100 feet of 100-Ω, 24-AWG, twisted-pair cable (Bertek) was used. A single driver and receiver, TI AM26C31C
and AM26C32C, respectively, were tested at room temperature with a 5-V supply voltage. To show voltage
waveforms related to transmission-line reflections, the first plot shows output waveforms from the driver at the
start of the cable (A/B); the second plot shows input waveforms to the receiver at the far end of the cable (Y).
9.2 Typical Application
VCC
VCC
0.1 PF
Input 1 Signal
1A
1Y
Output 1
Differential Pair
1Z
G
2Z
Output 2
Differential Pair
Input 2 Signal
2Y
2A
16
1
15
2
14
3
13
4
12
5
11
6
10
7
9
4A
Input 4 Signal
4Y
4Z
G
Output 4
Differential Pair
Active Low Enable Signal
3Z
3Y
3A
Output 3
Differential Pair
Input 3 Signal
8
GND
Copyright © 2016, Texas Instruments Incorporated
Figure 8. Differential Terminated Configuration With All Channels and Active Low Enable Used
9.2.1 Design Requirements
Resistor and capacitor (if used) termination values are shown for each laboratory experiment, but vary from
system to system. For example, the termination resistor, RT, must be within 20% of the characteristic impedance,
Zo, of the cable and can vary from about 80 Ω to 120 Ω.
12
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Copyright © 1990–2016, Texas Instruments Incorporated
Product Folder Links: AM26C31
AM26C31
www.ti.com
SLLS103O – DECEMBER 1990 – REVISED JUNE 2016
Typical Application (continued)
9.2.2 Detailed Design Procedure
Ensure values in Absolute Maximum Ratings are not exceeded.
Supply voltage, VIH, and VIL must comply with Recommended Operating Conditions.
9.2.3 Application Curve
5
4
Voltage (V)
3
2
1
0
±1
±2
Y
A/B
±3
0
0.1
0.2
0.3
Time ( s)
0.4
0.5
C001
Figure 9. Differential 120-Ω Terminated Output Waveforms (Cat 5E Cable)
10 Power Supply Recommendations
Place 0.1-µF bypass capacitors close to the power-supply pins to reduce errors coupling in from noisy or high
impedance power supplies.
Submit Documentation Feedback
Copyright © 1990–2016, Texas Instruments Incorporated
Product Folder Links: AM26C31
13
AM26C31
SLLS103O – DECEMBER 1990 – REVISED JUNE 2016
www.ti.com
11 Layout
11.1 Layout Guidelines
For best operational performance of the device, use good PCB layout practices, including:
• Noise can propagate into analog circuitry through the power pins of the circuit as a whole, as well as the
operational amplifier. Bypass capacitors are used to reduce the coupled noise by providing low impedance
power sources local to the analog circuitry.
– Connect low-ESR, 0.1-µF ceramic bypass capacitors between each supply pin and ground, placed as
close to the device as possible. A single bypass capacitor from V+ to ground is applicable for singlesupply applications.
• Separate grounding for analog and digital portions of circuitry is one of the simplest and most effective
methods of noise suppression. One or more layers on multilayer PCBs are usually devoted to ground planes.
A ground plane helps distribute heat and reduces EMI noise pickup. Make sure to physically separate digital
and analog grounds, paying attention to the flow of the ground current.
• To reduce parasitic coupling, run the input traces as far away from the supply or output traces as possible. If
it is not possible to keep them separate, it is much better to cross the sensitive trace perpendicular as
opposed to in parallel with the noisy trace.
• Place the external components as close to the device as possible. Keeping RF and RG close to the inverting
input minimizes parasitic capacitance.
• Keep the length of input traces as short as possible. Always remember that the input traces are the most
sensitive part of the circuit.
• Consider a driven, low-impedance guard ring around the critical traces. A guard ring can significantly reduce
leakage currents from nearby traces that are at different potentials.
11.2 Layout Example
Differential
Output 1
0.1 PF
Input 1
VCC
1
1A
VCC 16
2
1Y
4A 15
3
1Z
4Y 14
4
G
4Z 13
AM26C31
Differential
Output 2
Input 2
5
2Z
G 12
6
2Y
3Z 11
7
2A
3Y 10
8
GND
3A
Active Low
Enable
9
Figure 10. Trace Layout on PCB and Recommendations
14
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Copyright © 1990–2016, Texas Instruments Incorporated
Product Folder Links: AM26C31
AM26C31
www.ti.com
SLLS103O – DECEMBER 1990 – REVISED JUNE 2016
12 Device and Documentation Support
12.1 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper
right corner, click on Alert me to register and receive a weekly digest of any product information that has
changed. For change details, review the revision history included in any revised document.
12.2 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
12.3 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
12.4 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
12.5 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
13 Mechanical, Packaging, and Orderable Information
The following pages include mechanical packaging and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser based versions of this data sheet, refer to the left hand navigation.
Submit Documentation Feedback
Copyright © 1990–2016, Texas Instruments Incorporated
Product Folder Links: AM26C31
15
PACKAGE OPTION ADDENDUM
www.ti.com
4-Mar-2016
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
5962-9163901M2A
ACTIVE
LCCC
FK
20
1
TBD
POST-PLATE
N / A for Pkg Type
-55 to 125
59629163901M2A
AM26C31M
5962-9163901MEA
ACTIVE
CDIP
J
16
1
TBD
A42
N / A for Pkg Type
-55 to 125
5962-9163901ME
A
AM26C31M
5962-9163901MFA
ACTIVE
CFP
W
16
1
TBD
A42
N / A for Pkg Type
-55 to 125
5962-9163901MF
A
AM26C31M
5962-9163901Q2A
ACTIVE
LCCC
FK
20
1
TBD
POST-PLATE
N / A for Pkg Type
-55 to 125
59629163901Q2A
AM26C31
MFKB
5962-9163901QEA
ACTIVE
CDIP
J
16
1
TBD
A42
N / A for Pkg Type
-55 to 125
5962-9163901QE
A
AM26C31MJB
5962-9163901QFA
ACTIVE
CFP
W
16
1
TBD
A42
N / A for Pkg Type
-55 to 125
5962-9163901QF
A
AM26C31MWB
AM26C31CD
ACTIVE
SOIC
D
16
40
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
AM26C31CDBLE
OBSOLETE
SSOP
DB
16
TBD
Call TI
Call TI
0 to 70
AM26C31CDBR
ACTIVE
SSOP
DB
16
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
26C31
AM26C31CDBRG4
ACTIVE
SSOP
DB
16
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
26C31
AM26C31CDE4
ACTIVE
SOIC
D
16
40
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
AM26C31C
AM26C31CDG4
ACTIVE
SOIC
D
16
40
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
AM26C31C
AM26C31CDR
ACTIVE
SOIC
D
16
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
AM26C31C
AM26C31CDRE4
ACTIVE
SOIC
D
16
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
AM26C31C
Addendum-Page 1
AM26C31C
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
4-Mar-2016
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
AM26C31CDRG4
ACTIVE
SOIC
D
16
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
AM26C31C
AM26C31CN
ACTIVE
PDIP
N
16
25
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
0 to 70
AM26C31CN
AM26C31CNE4
ACTIVE
PDIP
N
16
25
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
0 to 70
AM26C31CN
AM26C31CNSR
ACTIVE
SO
NS
16
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
26C31
AM26C31CNSRG4
ACTIVE
SO
NS
16
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
26C31
AM26C31ID
ACTIVE
SOIC
D
16
40
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
AM26C31IDBLE
OBSOLETE
SSOP
DB
16
TBD
Call TI
Call TI
-40 to 85
AM26C31IDBR
ACTIVE
SSOP
DB
16
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
26C31I
AM26C31IDBRE4
ACTIVE
SSOP
DB
16
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
26C31I
AM26C31IDBRG4
ACTIVE
SSOP
DB
16
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
26C31I
AM26C31IDE4
ACTIVE
SOIC
D
16
40
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
AM26C31I
AM26C31IDG4
ACTIVE
SOIC
D
16
40
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
AM26C31I
AM26C31IDR
ACTIVE
SOIC
D
16
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU | CU SN
Level-1-260C-UNLIM
-40 to 85
AM26C31I
AM26C31IDRE4
ACTIVE
SOIC
D
16
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
AM26C31I
AM26C31IDRG4
ACTIVE
SOIC
D
16
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
AM26C31I
AM26C31IN
ACTIVE
PDIP
N
16
25
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
-40 to 85
AM26C31IN
AM26C31INE4
ACTIVE
PDIP
N
16
25
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
-40 to 85
AM26C31IN
AM26C31INSR
ACTIVE
SO
NS
16
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
26C31I
Addendum-Page 2
AM26C31I
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
4-Mar-2016
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
AM26C31IPW
ACTIVE
TSSOP
PW
16
90
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
26C31I
AM26C31IPWG4
ACTIVE
TSSOP
PW
16
90
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
26C31I
AM26C31IPWR
ACTIVE
TSSOP
PW
16
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU | CU SN
Level-1-260C-UNLIM
-40 to 85
26C31I
AM26C31IPWRG4
ACTIVE
TSSOP
PW
16
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
26C31I
AM26C31MFKB
ACTIVE
LCCC
FK
20
1
TBD
POST-PLATE
N / A for Pkg Type
-55 to 125
59629163901Q2A
AM26C31
MFKB
AM26C31MJB
ACTIVE
CDIP
J
16
1
TBD
A42
N / A for Pkg Type
-55 to 125
5962-9163901QE
A
AM26C31MJB
AM26C31MWB
ACTIVE
CFP
W
16
1
TBD
A42
N / A for Pkg Type
-55 to 125
5962-9163901QF
A
AM26C31MWB
AM26C31QD
ACTIVE
SOIC
D
16
40
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
AM26C31Q
AM26C31QDG4
ACTIVE
SOIC
D
16
40
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
26C31Q
AM26C31QDR
ACTIVE
SOIC
D
16
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
AM26C31Q
AM26C31QDRG4
ACTIVE
SOIC
D
16
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
26C31Q
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Addendum-Page 3
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
4-Mar-2016
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF AM26C31, AM26C31M :
• Catalog: AM26C31
• Enhanced Product: AM26C31-EP, AM26C31-EP
• Military: AM26C31M
NOTE: Qualified Version Definitions:
• Catalog - TI's standard catalog product
• Enhanced Product - Supports Defense, Aerospace and Medical Applications
Addendum-Page 4
PACKAGE OPTION ADDENDUM
www.ti.com
4-Mar-2016
• Military - QML certified for Military and Defense Applications
Addendum-Page 5
PACKAGE MATERIALS INFORMATION
www.ti.com
14-Mar-2016
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
AM26C31CDBR
Package Package Pins
Type Drawing
SSOP
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
12.0
16.0
Q1
DB
16
2000
330.0
16.4
8.2
6.6
2.5
AM26C31CDR
SOIC
D
16
2500
330.0
16.4
6.5
10.3
2.1
8.0
16.0
Q1
AM26C31IDBR
SSOP
DB
16
2000
330.0
16.4
8.2
6.6
2.5
12.0
16.0
Q1
AM26C31IDR
SOIC
D
16
2500
330.0
16.4
6.5
10.3
2.1
8.0
16.0
Q1
AM26C31IDR
SOIC
D
16
2500
330.0
16.8
6.5
10.3
2.1
8.0
16.0
Q1
AM26C31IDRG4
SOIC
D
16
2500
330.0
16.4
6.5
10.3
2.1
8.0
16.0
Q1
AM26C31IPWR
TSSOP
PW
16
2000
330.0
12.4
6.9
5.6
1.6
8.0
12.0
Q1
AM26C31IPWR
TSSOP
PW
16
2000
330.0
12.4
6.9
5.6
1.6
8.0
12.0
Q1
AM26C31IPWRG4
TSSOP
PW
16
2000
330.0
12.4
6.9
5.6
1.6
8.0
12.0
Q1
AM26C31QDR
SOIC
D
16
2500
330.0
16.4
6.5
10.3
2.1
8.0
16.0
Q1
AM26C31QDRG4
SOIC
D
16
2500
330.0
16.4
6.5
10.3
2.1
8.0
16.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
14-Mar-2016
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
AM26C31CDBR
SSOP
DB
16
2000
367.0
367.0
38.0
AM26C31CDR
SOIC
D
16
2500
333.2
345.9
28.6
AM26C31IDBR
SSOP
DB
16
2000
367.0
367.0
38.0
AM26C31IDR
SOIC
D
16
2500
333.2
345.9
28.6
AM26C31IDR
SOIC
D
16
2500
364.0
364.0
27.0
AM26C31IDRG4
SOIC
D
16
2500
333.2
345.9
28.6
AM26C31IPWR
TSSOP
PW
16
2000
364.0
364.0
27.0
AM26C31IPWR
TSSOP
PW
16
2000
367.0
367.0
35.0
AM26C31IPWRG4
TSSOP
PW
16
2000
367.0
367.0
35.0
AM26C31QDR
SOIC
D
16
2500
367.0
367.0
38.0
AM26C31QDRG4
SOIC
D
16
2500
333.2
345.9
28.6
Pack Materials-Page 2
MECHANICAL DATA
MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001
DB (R-PDSO-G**)
PLASTIC SMALL-OUTLINE
28 PINS SHOWN
0,38
0,22
0,65
28
0,15 M
15
0,25
0,09
8,20
7,40
5,60
5,00
Gage Plane
1
14
0,25
A
0°–ā8°
0,95
0,55
Seating Plane
2,00 MAX
0,10
0,05 MIN
PINS **
14
16
20
24
28
30
38
A MAX
6,50
6,50
7,50
8,50
10,50
10,50
12,90
A MIN
5,90
5,90
6,90
7,90
9,90
9,90
12,30
DIM
4040065 /E 12/01
NOTES: A.
B.
C.
D.
All linear dimensions are in millimeters.
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion not to exceed 0,15.
Falls within JEDEC MO-150
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other
changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest
issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and
complete. All semiconductor products (also referred to herein as “components”) are sold subject to TI’s terms and conditions of sale
supplied at the time of order acknowledgment.
TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms
and conditions of sale of semiconductor products. Testing and other quality control techniques are used to the extent TI deems necessary
to support this warranty. Except where mandated by applicable law, testing of all parameters of each component is not necessarily
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