TI1 BQ25046 Wireless power application Datasheet

bq25046
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SLUSA83 – SEPTEMBER 2010
1.1A, Single-Input 5-V Power Supply IC for Wireless Power Applications
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FEATURES
1
•
•
•
•
•
•
•
•
30V Input Rating, with 15V Over-Voltage
Protection (OVP) Threshold
Integrated Charge Current Sense for Wireless
Power Transfer Efficiency Monitoring
3.3V, 15mA integrated Low Dropout Linear
Regulator (VDD3.3) Supplies Power to
MSP430BQ1010 Directly
2% Output Voltage Regulation
Pin Selectable 100mA and 400mA Current
Limit Enables Robust Communication in
Wireless Power Systems at any Output
Current Level
Soft-Start Feature to Reduce Inrush Current
Status Indication – Power Good (PG) and
Output Enabled (CHG)
Available in Small 2mm × 3mm DFN-10
Package
APPLICATIONS
•
•
•
•
•
DESCRIPTION
The bq25046 is a highly integrated linear power
supply IC targeted at both wired and wireless power
applications. With an accurate 5-V regulated output
and integrated 3.3-V LDO, the bq25046 is an ideal
solution for wireless power supply solutions up to 5
W.
The bq25046 integrates several functions which
enable a wireless charging solution within a small
area and low component count. These include a
3.3-V LDO which drives an MSP430BQ1010 wireless
controller, high-accuracy current sense for calculating
receiver-side power usage, 100mA/400mA current
limits enable robust communication at all load current
levels, and integrated pass FET acts as load
disconnect switch and 5-V regulator to protect
downstream circuitry. In addition, the bq25046 has an
absolute maximum input voltage of 30 V and an OVP
threshold of 15 V, which enables safe and robust
operation in inductive power transfer systems that
use either resistive or capacitive load modulation.
Wireless Power Applications
Smart Phones
PDAs
MP3 Players
Low-Power Handheld Devices
APPLICATION SCHEMATIC
RX
Coil
Resonant
Caps
Discrete Rectifier
20 mF
IN
OUT
ISET
EN1
VDD3.3
EN2
5-V
Output
BQ25046
EN1
ISET_SCALE
EN2
VIN_DIV
DISABLE_
COMM_ILIM
HI
LO
COMM
MSP430BQ1010
Communication
Modulator
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2010, Texas Instruments Incorporated
bq25046
SLUSA83 – SEPTEMBER 2010
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These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
ORDERING INFORMATION
PART NUMBER
(1)
(1)
VOUT(REG)
VOVP
VVDD3.3
MARKING
bq25046DQCR
5.0 V
15 V
3.3 V
OFS
bq25046DQCT
5.0 V
15 V
3.3 V
OFS
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
Web site at www.ti.com.
ABSOLUTE MAXIMUM RATINGS (1)
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
Input Voltage
IN (with respect to VSS)
–0.3 V
30 V
Output Voltage
OUT, VDD3.3, CHG, PG (with respect to VSS)
–0.3 V
7V
Input voltage
EN1, EN2, ISET (with respect to VSS)
–0.3 V
7V
Input Current
IN
1.5 A
Output Current
(Continuous)
OUT
1.5 A
Output Sink Current
CHG, PG
VDD3.3
100 mA
15 mA
Junction temperature, TJ
Storage temperature, TSTG
ESD protection
(1)
–40 °C
150 °C
–65 °C
150 °C
HBM
2 kV
CDM
500 V
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltage
values are with respect to the network ground terminal unless otherwise noted.
THERMAL INFORMATION
bq25046
THERMAL METRIC
(1)
DFN
UNITS
10 PINS
qJA
Junction-to-ambient thermal resistance
71.9
qJCtop
Junction-to-case (top) thermal resistance
65.2
qJB
Junction-to-board thermal resistance
85.2
yJT
Junction-to-top characterization parameter
0.6
yJB
Junction-to-board characterization parameter
29.6
qJCbot
Junction-to-case (bottom) thermal resistance
5.1
(1)
°C/W
For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
RECOMMENDED OPERATING CONDITIONS
VIN
MIN
MAX
IN voltage range
3.3
26
IN operating voltage range
3.3
9
UNIT
V
IIN
Input current, IN pin
1.5
IOUT
Current, OUT pin
1.5
A
TJ
Junction Temperature
–40
125
ºC
RISET
Current limit programming resistor
470
5360
Ω
2
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ELECTRICAL CHARACTERISTICS
Over junction temperature range 0°C ≤ TJ ≤ 125°C and recommended supply voltage (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
INPUT
VUVLO
Under-voltage lock-out
VIN: 0V → 4 V
3.15
3.30
3.45
V
VHYS-UVLO
Hysteresis on UVLO
VIN: 4V → 0 V
200
260
320
mV
VOVP
Input over-voltage protection threshold
VIN: 13V → 17 V
14.5
15.0
15.5
VHYS-OVP
Hysteresis on OVP
VIN: 17V → 13 V
tBLK(OVP)
Input over-voltage blanking time
tREC(OVP)
mV
115
ms
500
ms
Input over-voltage recovery time
Time measured from VIN: 17V → 13V 1ms
fall-time to CHG = LO, VOUT = 3.5 V
USB input I-Limit 100mA
USB100 programmed by EN1/EN2,
RISET < 1.1 kΩ
85
91
96
USB input I-Limit 400mA
USB500 programmed by EN1/EN2,
RISET < 1.1 kΩ
360
400
440
RISET: 500 ≥ 200, IC latches off after
tDGL-SHORT
300
IIN-USB-CL
V
150
mA
ISET SHORT CIRCUIT TEST
RISET
Continuous Monitor
tDGL-SHORT
Deglitch time transition from ISET to IC latched
off
ILIM-ISET-SHRT
Current limit with ISET shorted
460
1.5
ISET = 0V, IC latches off after tDGL-SHORT
1.5
Ω
ms
1.9
2.2
A
1
mA
QUIESCENT CURRENT
IOUT(PDWN)
Quiescent current into OUT
IIN(STDBY)
Standby current into IN pin
ICC
Active supply current, IN pin
VIN = 0V
VIN ≤ 10V, EN1=EN2=Hi
400
VIN < 16V, EN1=EN2=Hi
800
VIN = 6V, no load on OUT pin,
VOUT > VOUT(REG), IC enabled
3
mA
mA
OUT
VOUT(REG)
Output voltage
4.9
5.0
5.1
IOUT
Programmed Output current limit range
VOUT(REG) > VOUT > VLOWV, VIN = 5V,
RISET = 470 to 7.5 kΩ,
User Programmable set by EN1/EN2
VDO(IN-OUT)
VIN – VOUT
VIN = 4.9V and IOUT = 1 A
IOUT
Output current limit formula
VOUT(REG) > VOUT > VLOWV, VIN = 5V,
User Programmable set by EN1/EN2
KISET
Current limit factor
480
530
580
VVDD3.3
VDD3.3 Output Voltage
3.2
3.3
3.4
IVDD3.3(Max)
VDD3.3 Maximum Output Current
15
100
280
V
1100
mA
512
mV
KISET/RI SET
A
AΩ
VDD3.3
V
mA
THERMAL REGULATION
TJ(REG)
Temperature Regulation Limit
TJ(OFF)
Thermal shutdown temperature
TJ(OFF-HYS)
Thermal shutdown hysteresis
115
125
135
°C
155
°C
20
°C
LOGIC LEVELS ON EN1, EN2
VIL
Logic LOW input voltage
VIH
Logic HIGH input voltage
RPULLDOWN
Pulldown resistor for EN1 and EN2
0.4
1.4
V
V
260
kΩ
LOGIC LEVELS ON CHG AND PG
VOL
Output LOW voltage
ISINK = 5 mA
IIH
Leakage current
V/CHG = V/PG =5 V
0.4
5
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V
mA
3
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PIN CONFIGURATION
IN
1
10
BAT
ISET
2
9
PG
VSS
3
8
CHG
bq25046
VDD3.3
4
7
EN2
VSS
5
6
EN1
10-pin 3mm x 3mm DFN
PIN FUNCTIONS
PIN
NAME
NO.
I/O
DESCRIPTION
IN
1
I
Input power supply. IN is connected to the external DC supply (AC adapter or USB port) or wireless rectifier.
Bypass IN to VSS with at least a 1mF ceramic capacitor for wired applications and 10 mF typical for wireless
power applications.
ISET
2
I
Current programming input. Connect a resistor from ISET to VSS to program the current limit when the user
programmable mode is selected by EN1 and EN2. The resistor range is between 470Ω and 5360Ω to set the
current between 100mA and 1.1A.
VSS
3, 5
–
Ground terminal. Connect to the thermal pad and the ground plane of the circuit.
VDD3.3
4
O
3.3V output. VDD3.3 is regulated to 3.3V and drives up to 15mA. Bypass VDD3.3 to VSS with at least a 0.1mF
ceramic capacitor. VDD3.3 is enabled when VIN is above the UVLO voltage.
EN1
6
I
EN2
7
I
Current Limit Selection inputs. EN1 and EN2 are used to select the current limit and enable/disable the device.
See Table 1 for current limit settings.
CHG
8
O
IC Enabled output. CHG is pulled to VSS when the bq25046 is enabled. CHG is high impedance when the IC is
disabled.
PG
9
O
Power good output. PG is an open-drain output that pulls to VSS when the input power is above the UVLO and
below the OVP threshold. PG is high impedance when outside this range.
OUT
10
O
5V LDO output. Connect OUT to the system input. OUT regulates to 5.0V. Bypass OUT to VSS with at least a
1mF ceramic capacitor.
–
There is an internal electrical connection between the exposed thermal pad and the VSS pin of the device. The
thermal pad must be connected to the same potential as the VSS pin on the printed circuit board. Do not use the
thermal pad as the primary ground input for the device. VSS pin must be connected to ground at all times.
Thermal Pad
Table 1. EN1 and EN2 Input Table
EN1
4
EN2
CURRENT LIMIT
Low
Low
100 mA
Low
High
400 mA
High
Low
ISET
High
High
IC Off
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BLOCK DIAGRAM
Q1
Q2
OUT
VIN
Charge
Pump
TJ(REG)
+
TJ
ISET
USB
Enable
Min
Current
Selector
+
2V
USB
Sense
Element
+
VOUT(REG)
Charge
Pump
VOVP
+
VIN
CHG
EN1
260k
DIGITAL
CONTROL
Q3
PG
EN2
260k
Q4
Q5
VDD3.3
VIN
VSS
+
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TYPICAL APPLICATION CIRCUIT
1
IN
C1
20µF
9
8
CHG
Rectified
Wireless
Power Input
PG
R4
1 kW
R3
1 kW
OUT
C2
1µF
VSS
ISET
bq25046
2
To Mobile
Device
10
EN1
6
EN2
6
VDD3.3
Wireless Power
Control Including
MSP430BQ1010
4
3,5
R1
470 W
C3
1µF
DETAILED FUNCTIONAL DESCRIPTION
INPUT OVER VOLTAGE PROTECTION
The bq25046 contains an input over voltage protection circuit that disables the OUT output when the input
voltage rises above VOVP. This prevents damage from faulty adapters or open loop rectifiers. The OVP circuitry
contains a 150 ms deglitch that prevents ringing on the input from line transients from tripping the OVP circuitry
falsely. If an adapter with an output greater than VOVP is plugged in, the IC completes powers up and but does
not enable the output. The VDD3.3 output remains on to maintain power and protect the MSP430BQ1010 circuit.
The OUT LDO remains disabled until the input voltage falls below VOVP.
CURRENT LIMIT (ISET, EN1, EN2)
The current limit is programmed using the EN1, EN2 and ISET inputs. The EN1 and EN2 inputs allow the user to
select USB100 mode, USB400 mode, or the user programmable current limit set by ISET. The user
programmable current is set by connecting a resistor from ISET to VSS. The value of the resistor is determined
by:
K
RISET1 = ISET
ILIMIT
(1)
Where KISET = 375 and the current limit (ILIMIT) must be programmed between 100mA and 1.1A.
15mA LDO (VDD3.3)
The VDD3.3 output of the bq25046 is a low dropout linear regulator (VDD3.3) that supplies up to 15mA while
regulating to VVDD3.3. The VDD3.3 is active whenever the input voltage is above VUVLO. It is not affected by the
EN1 and EN2 inputs or OVP. The VDD3.3 output is used to power circuitry such as MSP430BQ1010.
6
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OUT STATUS (/CHG)
The bq25046 contains an open drain CHG output that indicates when the bq25046 device in enabled. CHG
output is pulled to ground when the input voltage is above UVLO and less than OVP and the device is enabled.
CHG goes high impedance to signal that the OUT output is not available.
Connect CHG to the required logic level voltage through a 1kΩ to 100kΩ resistor to use the signal with a
microprocessor. Additionally, CHG may be used to drive an LED for a visual charging status signal. I/CHG must be
below 15mA.
UNDER VOLTAGE LOCKOUT
The bq25046 remains in power down mode when the input voltage is below the undervoltage lockout threshold
(VUVLO). During this mode, the control inputs (EN1 and EN2) are ignored. The FET connected between IN and
OUT is off, VDD3.3 is off and the status outputs (CHG and PG) are high impedance. Once the input voltage rises
above VUVLO, the internal circuitry is turned on and the normal operating procedures are followed.
Power Good (/PG)
The bq25046 contains a PG signal that indicates when a valid input source is connected. The PG output goes
low when an input source between VUVLO and VOVP is connected. PG transitions after the deglitch times out. The
deglitch depends on the state of the bq25046 and the condition. Table 2 shows the deglitch for different
conditions.
Table 2. Deglitch for Different Conditions
CONDITION
PG Deglitch (Measured from Event to PG High or Low)
bq25046 ENABLED
bq25046 DISABLED
(EN1=EN2=0)
Entering OVP (VIN = 5.5 V→11 V)
100 µs
0
Leaving OVP (VIN = 11 V→5.5 V)
450 µs
500 µs
Entering UVLO (VIN = 5.5 V→2.5 V)
0
0
Leaving UVLO (VIN = 2.5 V→5.5 V)
230 µs
230 µs
PG may be pulled up to any voltage rail less than the maximum rating on the PG output. Another option is to pull
up PG to the LDO output.
THERMAL REGULATION AND THERMAL SHUTDOWN
The bq25046 contains a thermal regulation loop that monitors the die temperature continuously. If the
temperature exceeds TJ(REG), the device automatically reduces the input current limit to prevent the die
temperature from increasing further. In some cases, the die temperature continues to rise despite the operation
of the thermal loop, particularly under high VIN conditions. If the die temperature increases to TJ(OFF), the IC is
turned off. Once the device die temperature cools by TJ(OFF-HYS), the device turns on and returns to thermal
regulation. Continuous over-temperature conditions result in the pulsing of the load current. If the junction
temperature of the device exceeds TJ(OFF), the FET is turned off. The FET is turned back on when the junction
temperature falls below TJ(OFF) – TJ(OFF-HYS).
Note that these features monitor the die temperature of the bq25046. This is not synonymous with ambient
temperature. Self heating exists due to the power dissipated in the IC because of the linear nature of the
regulation algorithm.
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APPLICATION INFORMATION
Figure 1. Wireless Power System
GENERAL OVERVIEW OF A WIRELESS POWER SYSTEM
Figure 1 presents a block diagram of a wireless power system, which consists of a transmitter and receiver. The
transmitter consists of an AC-DC power stage, followed by a transmitter coil driver, coil voltage and coil current
sensing block, and a wireless power controller (BQ500110). The receiver consists of a receiver coil, rectifier,
BQ25046 voltage regulation circuit, and MSP430BQ1010 wireless power controller. The output of the system is
the BQ25046 5-V regulated output voltage which is used as a power supply to the charger in a cellular phone or
other mobile device. The system shown in Figure 2 implements wireless power transfer via inductive coupling
between the transmitter and receiver. In this system the transmitter drives a transmit coil with a frequency
between 100 and 200 kHz and the receiver coil, which is in close proximity to the transmitter coil, rectifies the
received voltage to power the BQ25046. In addition, the receiver continuously monitors its operating point (coil
voltage and coil current) and communicates correction packets to the transmitter via backscatter modulation.
Utilizing BQ25046 in a Wireless Power System
Figure 2 shows the BQ25046 used in a wireless power receiver solution. In this application a receiver coil
connects to a half-synchronous rectifier which includes a rectifier filter capacitor. The rectifier voltage is
connected directly to the IN pin of the BQ25046 and the BQ25046 generates a 3.3 V LDO output that is used to
power an MSP430BQ1010 wireless power supply controller. The MSP430BQ1010 monitors the rectifier voltage
and output current and communicates to the transmitter via the communication modulator to optimize the power
delivered to a mobile device. The OUT pin of the BQ25046 delivers 5-V to a mobile device at power levels up to
5W.
8
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Figure 2. bq25046 Used in a Contactless Power Receiver
When used in conjunction with the MSP430BQ1010 wireless power controller, the BQ25046 is an ideal solution
for wireless power systems. The key features of the BQ25046 for wireless power include 30-V input protection
and 15-V OVP to enable safe operation in the case of a load dump or parasitic magnetic field, 3.3-V LDO that
can be connected directly to the MSP430BQ1010, 5-V output regulation voltage can interface to a wide array of
mobile devices, integrated current sensing can be used to monitor power usage, and EN1/EN2 control interface
provides a simple means to enable and disable BQ25046 and also implement current limiting.
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Figure 3 shows typical waveforms for BQ25046 used in the wireless power system shown in Figure 2. In this plot
the BQ25046 IN voltage is blue, OUT voltage is red, PG voltage is green, and CHG voltage is magenta. As you
can see at the initial ping (i.e., beginning of power transfer) the IN voltage rises to 5 V and then the
MSP430BQ1010 begins to communicate to the transmitter via load modulation. After sending several messages
to establish communication with the transmitter, the BQ25046 OUT voltage is enabled and then the CHG pin is
pulled low. From this point forward the MSP430BQ1010 periodically communicates with the transmitter, and a
5-V regulated DC output voltage is present at the BQ25046 OUT pin.
Figure 3. Power-Up In a Wireless Power Application
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Figure 4 shows how the internal current limits on BQ25046 can be used in a wireless power application. If the
Disable_Comm_Ilimit pin on the MSP430BQ1010 is pulled low, then the USB current limit on the BQ25046 will
be enabled during communication. In Figure 4 it can be seen that during every communication packet the
BQ25046 EN1 pin is pulled low, which will limit the BQ25046 OUT current to 100mA during communication. In
some applications this will improve the robustness of the communication by limiting load modulation due to
dynamic loading.
Figure 4. Utilizing Internal bq25046 Current Limit In a Wireless Power Application
If load modulation during communication is not a concern then Disable_Comm_llim can be pulled high and the
BQ25046 will always deliver full rated current based on the ISET programming resistor. Figure 5 presents an
example of a wireless power application where EN1 is always high so that the ISET current limit is always used.
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Figure 5. Wireless Power Application in ISET Mode
SELECTION OF INPUT/OUTPUT CAPACITORS
For wireless power applications a rectifier filter capacitor is required between the IN pin and ground to minimize
ripple at the BQ25046 input. For applications with output current greater than 500 mA, a ceramic capacitor of at
least 20 mF is required to minimize ripple. In addition, board trace resistance between the IN pin, rectifier
capacitor, and ground should be minimized. For wired applications a 1mF capacitor placed in close proximity
between the IN pin and GND is generally sufficient
The linear regulator in the bq25046 requires a capacitor from OUT to GND for loop stability. Connect a 1mF
ceramic capacitor from OUT to GND close to the pins for best results. More output capacitance may be required
to minimize the output droop during large load transients.
The VDD3.3 also requires an output capacitor for loop stability. Connect at least a 1mF ceramic capacitor from
VDD3.3 to GND close to the pins. For improved transient response, this capacitor may be increased.
THERMAL CONSIDERATIONS
The bq25046 is packaged in a thermally enhanced QFN package. The package includes a thermal pad to
provide an effective thermal contact between the IC and the printed circuit board (PCB). Full PCB design
guidelines for this package are provided in the application note entitled: QFN/SON PCB Attachment Application
Note (SLUA271).
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The most common measure of package thermal performance is thermal impedance (qJA) measured (or modeled)
from the chip junction to the air surrounding the package surface (ambient). The mathematical expression for qJA
is:
T - TA
JJA = J
PD
(2)
Where:
TJ = chip junction temperature
TA = ambient temperature
PD = device power dissipation
Factors that can greatly influence the measurement and calculation of qJA include:
• Whether or not the device is board mounted
• Trace size, composition, thickness, and geometry
• Orientation of the device (horizontal or vertical)
• Volume of the ambient air surrounding the device under test and airflow
• Whether other surfaces are in close proximity to the device being tested
The device power dissipation, PD, is a function of the current and the voltage drop across the internal PowerFET.
It can be calculated from Equation 3:
PD = (VIN - VOUT ) ´ IOUT
(3)
If the board thermal design is not adequate the programmed current limit may not be achieved under maximum
input voltage, as the thermal loop can be active, effectively reducing the current limit to avoid excessive IC
junction temperature
PCB LAYOUT CONSIDERATIONS
It is important to pay special attention to the PCB layout. The following provides some guidelines:
• To obtain optimal performance, the decoupling capacitor from IN to GND (thermal pad) and the output filter
capacitors from OUT to GND (thermal pad) should be placed as close as possible to the bq25046, with short
trace runs to both IN, OUT and GND (thermal pad).
• All low-current GND connections should be kept separate from the high-current paths.
• Use a single-point ground technique incorporating both the small signal ground path and the power ground
path.
• The high current paths into IN pin and from the OUT pin must be sized appropriately for the maximum current
in order to avoid voltage drops in these traces.
• The bq25046 is packaged in a thermally enhanced QFN package. The package includes a thermal pad to
provide an effective thermal contact between the IC and the printed circuit board (PCB); this thermal pad is
also the main ground connection for the device. Connect the thermal pad to the PCB ground connection. Full
PCB design guidelines for this package are provided in the application note entitled: QFN/SON PCB
Attachment Application Note (SLUA271).
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PACKAGE OPTION ADDENDUM
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11-Apr-2013
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
(2)
MSL Peak Temp
Op Temp (°C)
Top-Side Markings
(3)
(4)
BQ25046DQCR
NRND
WSON
DQC
10
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
OFS
BQ25046DQCT
NRND
WSON
DQC
10
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
OFS
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a
continuation of the previous line and the two combined represent the entire Top-Side Marking for that device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
Samples
PACKAGE MATERIALS INFORMATION
www.ti.com
26-Jan-2013
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
BQ25046DQCR
WSON
DQC
10
3000
179.0
8.4
2.3
3.2
1.0
4.0
8.0
Q1
BQ25046DQCT
WSON
DQC
10
250
179.0
8.4
2.3
3.2
1.0
4.0
8.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
26-Jan-2013
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
BQ25046DQCR
WSON
DQC
10
3000
195.0
200.0
45.0
BQ25046DQCT
WSON
DQC
10
250
195.0
200.0
45.0
Pack Materials-Page 2
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