AD AD8350AR15-REEL7 Low distortion 1.0 ghz differential amplifier Datasheet

a
FEATURES
High Dynamic Range
Output IP3: +28 dBm: Re 50 @ 250 MHz
Low Noise Figure: 5.9 dB @ 250 MHz
Two Gain Versions:
AD8350-15: 15 dB
AD8350-20: 20 dB
–3 dB Bandwidth: 1.0 GHz
Single Supply Operation: 5 V to 10 V
Supply Current: 28 mA
Input/Output Impedance: 200 Single-Ended or Differential Input Drive
8-Lead SOIC Package and 8-Lead microSOIC Package
Low Distortion
1.0 GHz Differential Amplifier
AD8350
FUNCTIONAL BLOCK DIAGRAM
8-Lead SOIC and SOIC Packages (with Enable)
IN+ 1
ENBL
2
+
–
VCC 3
OUT+
4
8
IN–
7
GND
6
GND
5
OUT–
AD8350
APPLICATIONS
Cellular Base Stations
Communications Receivers
RF/IF Gain Block
Differential A-to-D Driver
SAW Filter Interface
Single-Ended-to-Differential Conversion
High Performance Video
High Speed Data Transmission
PRODUCT DESCRIPTION
The AD8350 series are high performance fully-differential
amplifiers useful in RF and IF circuits up to 1000 MHz. The
amplifier has excellent noise figure of 5.9 dB at 250 MHz. It
offers a high output third order intercept (OIP3) of +28 dBm
at 250 MHz. Gain versions of 15 dB and 20 dB are offered.
The amplifier can be operated down to 5 V with an OIP3 of
+28 dBm at 250 MHz and slightly reduced distortion performance. The wide bandwidth, high dynamic range and temperature
stability make this product ideal for the various RF and IF
frequencies required in cellular, CATV, broadband, instrumentation and other applications.
The AD8350 is designed to meet the demanding performance
requirements of communications transceiver applications. It
enables a high dynamic range differential signal chain, with
exceptional linearity and increased common-mode rejection.
The device can be used as a general purpose gain block, an
A-to-D driver, and high speed data interface driver, among
other functions. The AD8350 input can also be used as a singleended-to-differential converter.
The AD8350 is offered in an 8-lead single SOIC package and
µSOIC package. It operates from 5 V and 10 V power supplies,
drawing 28 mA typical. The AD8350 offers a power enable function for power-sensitive applications. The AD8350 is fabricated
using Analog Devices’ proprietary high speed complementary
bipolar process. The device is available in the industrial (–40°C to
+85°C) temperature range.
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 2001
(@ 25C, VS = 5 V, G = 15 dB, unless otherwise noted. All specifications refer to
AD8350–SPECIFICATIONS differential inputs and differential outputs unless noted.)
Parameter
DYNAMIC PERFORMANCE
–3 dB Bandwidth
Bandwidth for 0.1 dB Flatness
Slew Rate
Settling Time
Gain (S21)1
Gain Supply Sensitivity
Gain Temperature Sensitivity
Isolation (S12)1
NOISE/HARMONIC PERFORMANCE
50 MHz Signal
Second Harmonic
Third Harmonic
Output Second Order Intercept2
Output Third Order Intercept2
250 MHz Signal
Second Harmonic
Third Harmonic
Output Second Order Intercept2
Output Third Order Intercept2
1 dB Compression Point (RTI)2
Voltage Noise (RTI)
Noise Figure
INPUT/OUTPUT CHARACTERISTICS
Differential Offset Voltage (RTI)
Differential Offset Drift
Input Bias Current
Input Resistance
CMRR
Output Resistance
POWER SUPPLY
Operating Range
Quiescent Current
Power-Up/Down Switching
Power Supply Rejection Ratio
Conditions
Min
VS = 5 V, VOUT = 1 V p-p
VS = 10 V, VOUT = 1 V p-p
VS = 5 V, VOUT = 1 V p-p
VS = 10 V, VOUT = 1 V p-p
VOUT = 1 V p-p
0.1%, VOUT = 1 V p-p
VS = 5 V, f = 50 MHz
VS = 5 V to 10 V, f = 50 MHz
TMIN to TMAX
f = 50 MHz
14
Typ
0.9
1.1
90
90
2000
10
15
0.003
–0.002
–18
Max
16
Unit
GHz
GHz
MHz
MHz
V/µs
ns
dB
dB/V
dB/°C
dB
VS = 5 V, VOUT = 1 V p-p
VS = 10 V, VOUT = 1 V p-p
VS = 5 V, VOUT = 1 V p-p
VS = 10 V, VOUT = 1 V p-p
VS = 5 V
VS = 10 V
VS = 5 V
VS = 10 V
–66
–67
–65
–70
58
58
28
29
dBc
dBc
dBc
dBc
dBm
dBm
dBm
dBm
VS = 5 V, VOUT = 1 V p-p
VS = 10 V, VOUT = 1 V p-p
VS = 5 V, VOUT = 1 V p-p
VS = 10 V, VOUT = 1 V p-p
VS = 5 V
VS = 10 V
VS = 5 V
VS = 10 V
VS = 5 V
VS = 10 V
f = 150 MHz
f = 150 MHz
–48
–49
–52
–61
39
40
24
28
2
5
1.7
6.8
dBc
dBc
dBc
dBc
dBm
dBm
dBm
dBm
dBm
dBm
nV/√Hz
dB
VOUT+ – VOUT–
TMIN to TMAX
±1
0.02
15
200
–67
200
mV
mV/°C
µA
Ω
dB
Ω
Real
f = 50 MHz
Real
Powered Up, VS = 5 V
Powered Down, VS = 5 V
Powered Up, VS = 10 V
Powered Down, VS = 10 V
4
25
3
27
3
f = 50 MHz, VS ∆ = 1 V p-p
OPERATING TEMPERATURE RANGE
–40
28
3.8
30
4
15
–58
11.0
32
5.5
34
6.5
V
mA
mA
mA
mA
ns
dB
+85
°C
NOTES
1
See Tables II–III for complete list of S-Parameters.
2
Re: 50 Ω.
Specifications subject to change without notice.
–2–
REV. A
AD8350
AD8350-20–SPECIFICATIONS (@ 25C, V = 5 V, G = 20 dB, unless otherwise noted. All specifications refer to
S
differential inputs and differential outputs unless noted.)
Parameter
DYNAMIC PERFORMANCE
–3 dB Bandwidth
Bandwidth for 0.1 dB Flatness
Slew Rate
Settling Time
Gain (S21)1
Gain Supply Sensitivity
Gain Temperature Sensitivity
Isolation (S12)1
NOISE/HARMONIC PERFORMANCE
50 MHz Signal
Second Harmonic
Third Harmonic
Output Second Order Intercept2
Output Third Order Intercept2
250 MHz Signal
Second Harmonic
Third Harmonic
Output Second Order Intercept2
Output Third Order Intercept2
1 dB Compression Point (RTI)2
Voltage Noise (RTI)
Noise Figure
INPUT/OUTPUT CHARACTERISTICS
Differential Offset Voltage (RTI)
Differential Offset Drift
Input Bias Current
Input Resistance
CMRR
Output Resistance
POWER SUPPLY
Operating Range
Quiescent Current
Power-Up/Down Switching
Power Supply Rejection Ratio
Conditions
Min
VS = 5 V, VOUT = 1 V p-p
VS = 10 V, VOUT = 1 V p-p
VS = 5 V, VOUT = 1 V p-p
VS = 10 V, VOUT = 1 V p-p
VOUT = 1 V p-p
0.1%, VOUT = 1 V p-p
VS = 5 V, f = 50 MHz
VS = 5 V to 10 V, f = 50 MHz
TMIN to TMAX
f = 50 MHz
0.7
0.9
90
90
2000
15
20
0.003
–0.002
–22
Max
21
Unit
GHz
GHz
MHz
MHz
V/µs
ns
dB
dB/V
dB/°C
dB
VS = 5 V, VOUT = 1 V p-p
VS = 10 V, VOUT = 1 V p-p
VS = 5 V, VOUT = 1 V p-p
VS = 10 V, VOUT = 1 V p-p
VS = 5 V
VS = 10 V
VS = 5 V
VS = 10 V
–65
–66
–66
–70
56
56
28
29
dBc
dBc
dBc
dBc
dBm
dBm
dBm
dBm
VS = 5 V, VOUT = 1 V p-p
VS = 10 V, VOUT = 1 V p-p
VS = 5 V, VOUT = 1 V p-p
VS = 10 V, VOUT = 1 V p-p
VS = 5 V
VS = 10 V
VS = 5 V
VS = 10 V
VS = 5 V
VS = 10 V
f = 150 MHz
f = 150 MHz
–45
–46
–55
–60
37
38
24
28
–2.6
1.8
1.7
5.6
dBc
dBc
dBc
dBc
dBm
dBm
dBm
dBm
dBm
dBm
nV/√Hz
dB
VOUT+ – VOUT–
TMIN to TMAX
±1
0.02
15
200
–52
200
mV
mV/°C
µA
Ω
dB
Ω
Real
f = 50 MHz
Real
Powered Up, VS = 5 V
Powered Down, VS = 5 V
Powered Up, VS = 10 V
Powered Down, VS = 10 V
4
25
3
27
3
f = 50 MHz, VS ∆ = 1 V p-p
OPERATING TEMPERATURE RANGE
–40
NOTES
1
See Tables II–III for complete list of S-Parameters.
2
Re: 50 Ω.
REV. A
19
Typ
–3–
28
3.8
30
4
15
–45
11.0
32
5.5
34
6.5
V
mA
mA
mA
mA
ns
dB
+85
°C
AD8350
PIN FUNCTION DESCRIPTIONS
ABSOLUTE MAXIMUM RATINGS*
Supply Voltage, VS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 V
Input Power Differential . . . . . . . . . . . . . . . . . . . . . . +8 dBm
Internal Power Dissipation . . . . . . . . . . . . . . . . . . . . 400 mW
θJA SOIC (R) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100°C/W
θJA µSOIC (RM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 133°C/W
Maximum Junction Temperature . . . . . . . . . . . . . . . . . 125°C
Operating Temperature Range . . . . . . . . . . . –40°C to +85°C
Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C
Lead Temperature Range (Soldering 60 sec) . . . . . . . . . 300°C
*Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
PIN CONFIGURATION
IN+ 1
8
AD8350
Pin
Function
Description
1, 8
IN+, IN–
2
ENBL
3
4, 5
VCC
OUT+, OUT–
6, 7
GND
Differential Inputs. IN+ and IN–
should be ac-coupled (pins have a dc
bias of midsupply). Differential input
impedance is 200 Ω.
Power-up Pin. A high level (5 V) enables
the device; a low level (0 V) puts device
in sleep mode.
Positive Supply Voltage. 5 V to 10 V.
Differential Outputs. OUT+ and
OUT– should be ac-coupled (pins have
a dc bias of midsupply). Differential
input impedance is 200 Ω.
Common External Ground Reference.
IN–
GND
TOP VIEW
VCC 3 (Not to Scale) 6 GND
ENBL 2
OUT+ 4
7
5
OUT–
ORDERING GUIDE
Model
Temperature Range
Package Description
Package Option
Brand Code
AD8350AR15
AD8350AR15-REEL
AD8350AR15-REEL7
AD8350ARM15
AD8350ARM15-REEL
AD8350ARM15-REEL7
AD8350AR20
AD8350AR20-REEL
AD8350AR20-REEL7
AD8350ARM20
AD8350ARM20-REEL
AD8350ARM20-REEL7
AD8350-EVAL
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
8-Lead SOIC
8-Lead SOIC 13" Reel
8-Lead SOIC 7" Reel
8-Lead microSOIC
8-Lead microSOIC 13" Reel
8-Lead microSOIC 7" Reel
8-Lead SOIC
8-Lead SOIC 13" Reel
8-Lead SOIC 7" Reel
8-Lead microSOIC
8-Lead microSOIC 13" Reel
8-Lead microSOIC 7" Reel
SOIC Evaluation Board
SO-8
SO-8
SO-8
RM-8
RM-8
RM-8
SO-8
SO-8
SO-8
RM-8
RM-8
RM-8
Standard
Standard
Standard
J2N
J2N
J2N
Standard
Standard
Standard
J2P
J2P
J2P
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the AD8350 features proprietary ESD protection circuitry, permanent damage may occur on
devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.
–4–
WARNING!
ESD SENSITIVE DEVICE
REV. A
Typical Performance Characteristics–AD8350
20
25
VCC = 10V
40
15
30
VCC = 5V
20
10
5
VCC = 5V
15
10
10
VCC = 5V
0
–40
–20
0
20
40
TEMPERATURE – C
0
60
80
1
10
100
1k
FREQUENCY – MHz
5
10k
TPC 2. AD8350-15 Gain (S21) vs.
Frequency
TPC 1. Supply Current vs.
Temperature
500
300
300
400
VCC = 10V
200
VCC = 5V
250
VCC = 10V
200
1
10
100
FREQUENCY – MHz
TPC 4. AD8350-15 Input Impedance vs. Frequency
10
100
FREQUENCY – MHz
1k
TPC 5. AD8350-20 Input Impedance
vs. Frequency
800
10k
␮SOIC
SOIC
100
0
1
1k
100
1k
FREQUENCY – MHz
200
100
100
10
300
VCC = 5V
150
150
IMPEDANCE – 350
250
1
TPC 3. AD8350-20 Gain (S21) vs.
Frequency
350
IMPEDANCE – IMPEDANCE – 20
VCC = 10V
GAIN – dB
VCC = 10V
GAIN – dB
SUPPLY CURRENT – mA
50
0
10
100
FREQUENCY – MHz
1000
TPC 6. AD8350-15 Output Impedance
vs. Frequency
–5
–10
–10
–15
ISOLATION – dB
IMPEDANCE – 400
SOIC
200
0
–15
VCC = 10V
–20
0
100
10
FREQUENCY – MHz
1000
TPC 7. AD8350-20 Output Impedance vs. Frequency
REV. A
ISOLATION – dB
SOIC
600
VCC = 10V
–20
–25
–30
1
10
100
1k
FREQUENCY – MHz
10k
TPC 8. AD8350-15 Isolation (S12)
vs. Frequency
–5–
VCC = 5V
–25
VCC = 5V
1
10
100
1k
FREQUENCY – MHz
10k
TPC 9. AD8350-20 Isolation (S12)
vs. Frequency
AD8350
–40
–45
–40
VOUT = 1V p-p
–45
HD2 (VCC = 5V)
–55
HD3 (VCC = 5V)
–60
–65
HD3 (VCC = 10V)
–50
HD2 (VCC = 10V)
–55
–60
–65
–70
–70
–75
–75
–80
0
50
100
150
200
250
300
FUNDAMENTAL FREQUENCY – MHz
TPC 10. AD8350-15 Harmonic
Distortion vs. Frequency
–45
FO = 50MHz
–80
–65
HD2 (VCC = 10V)
–85
0
HD3 (VCC = 10V)
OIP2 – dBm (Re: 50)
HD2 (VCC = 10V)
–75
50
100
150
200
250
300
FUNDAMENTAL FREQUENCY – MHz
0
0.5
1
1.5
2
2.5
3
OUTPUT VOLTAGE – V p-p
66
66
61
61
VCC = 10V
56
51
VCC = 5V
46
36
3.5
TPC 13. AD8350-20 Harmonic Distortion vs. Differential Output Voltage
50
100
150
200
FREQUENCY – MHz
250
31
26
VCC = 5V
16
100
150
200
FREQUENCY – MHz
250
300
VCC = 10V
31
26
21
TPC 16. AD8350-15 Output Referred
IP3 vs. Frequency
11
VCC = 10V
51
VCC = 5V
46
0
10.0
VCC = 5V
16
50
3.5
0
50
100
150
200
FREQUENCY – MHz
250
300
TPC 17. AD8350-20 Output Referred
IP3 vs. Frequency
–6–
50
100
150
200
FREQUENCY – MHz
250
300
TPC 15. AD8350-20 Output Referred
IP2 vs. Frequency
1dB COMPRESSION – dBm (Re: 50)
VCC = 10V
0
1
1.5
2
2.5
3
OUTPUT VOLTAGE – V p-p
56
36
300
36
OIP3 – dBm (Re: 50)
OIP3 – dBm (Re: 50)
0
41
36
11
0.5
41
TPC 14. AD8350-15 Output Referred
IP2 vs. Frequency
41
21
0
TPC 12. AD8350-15 Harmonic Distortion vs. Differential Output Voltage
41
–85
HD3 (VCC = 10V)
–75
HD3 (VCC = 10V)
HD2 (VCC = 5V)
HD3 (VCC = 5V)
DISTORTION – dBc
HD3 (VCC = 5V)
TPC 11. AD8350-20 Harmonic Distortion vs. Frequency
–55
–65
HD3 (VCC = 5V)
HD2 (VCC = 5V)
–55
OIP2 – dBm (Re: 50)
–50
FO = 50MHz
HD2 (VCC = 5V)
DISTORTION – dBc
HD2 (VCC = 10V)
DISTORTION – dBc
DISTORTION – dBc
–45
VOUT = 1V p-p
INPUT REFERRED
VCC = 10V
7.5
5.0
2.5
0
VCC = 5V
–2.5
–5.0
0
100
200
300
400
FREQUENCY – MHz
500
600
TPC 18. AD8350-15 1 dB Compression vs. Frequency
REV. A
AD8350
10
10
9
9
5.0
VCC = 10V
0
–2.5
–7.5
100
200
300
400
FREQUENCY – MHz
500
VCC = 5V
600
TPC 19. AD8350-20 1 dB Compression vs. Frequency
25
AD8350-20
OUTPUT OFFSET – mV
AD8350-15
5
0
–5
0
2
3
4
5
6
7
VCC – Volts
8
9
10
TPC 22. AD8350 Gain (S21) vs.
Supply Voltage
–20
–20
50
–30
VOUT + (VCC = 5V)
0
VOUT – (VCC = 5V)
–50
–100
VOUT + (VCC = 10V)
–250
–40
VOUT – (VCC = 10V)
0
20
40
TEMPERATURE – C
60
80
VCC = 5V
VOUT
PSRR – dB
–50
AD8350-15
–70
ENBL
–80
5V
30ns
–90
1k
TPC 25. AD8350 CMRR vs. Frequency
REV. A
AD8350-20
–60
AD8350-15
–80
AD8350-20
10
100
FREQUENCY – MHz
50 100 150 200 250 300 350 400 450 500
FREQUENCY – MHz
–90
–20
500mV
–40
–50
–70
–150
TPC 23. AD8350 Output Offset Voltage vs. Temperature
VCC = 5V
1
0
–40
–30
–60
VCC = 5V
TPC 21. AD8350-20 Noise Figure
vs. Frequency
100
–200
–15
1
5
50 100 150 200 250 300 350 400 450 500
FREQUENCY – MHz
–10
–20
VCC = 10V
7
VCC = 5V
15
10
8
6
TPC 20. AD8350-15 Noise Figure
vs. Frequency
20
GAIN – dB
7
5
0
VCC = 10V
6
VCC = 5V
–5.0
8
PSRR – dB
2.5
NOISE FIGURE – dB
INPUT REFERRED
NOISE FIGURE – dB
1dB COMPRESSION – dBm (Re: 50)
7.5
TPC 26. AD8350 Power-Up/Down
Response Time
–7–
1
10
100
FREQUENCY – MHz
1k
TPC 24. AD8350 PSRR vs. Frequency
AD8350
APPLICATIONS
Using the AD8350
Figure 1 shows the basic connections for operating the AD8350.
A single supply in the range 5 V to 10 V is required. The power
supply pin should be decoupled using a 0.1 µF capacitor. The
ENBL pin is tied to the positive supply or to 5 V (when VCC =
10 V) for normal operation and should be pulled to ground to
put the device in sleep mode. Both the inputs and the outputs
have dc bias levels at midsupply and should be ac-coupled.
8
R S /2
SOURCE
C4
0.001F
6
5
CP
+
RLOAD
R S /2
1
L S /2
2
3
4
CAC
L S /2
CAC
0.1F
ENBL (5V)
+VS (5V TO 10V)
Figure 3. Reactively Matching the Input and Output
LOAD
CAC
LS
7
6
–
CP
Z = 100
8
7
L S /2
AD8350
VS
Also shown in Figure 1 are the impedance balancing requirements,
either resistive or reactive, of the input and output. With an
input and output impedance of 200 Ω, the AD8350 should be
driven by a 200 Ω source and loaded by a 200 Ω impedance. A
reactive match can also be implemented.
C2
0.001F
CAC
CAC
L S /2
CAC
LS
5
AD8350
8
RS
–
7
6
5
AD8350
+
Z = 200
–
CP
CP
RLOAD
+
VS
1
2
3
4
Z = 100
1
C1
0.001F
C3
0.001F
C5
0.1F
ENBL (5V)
+VS (5V TO 10V)
Figure 4. Single-Ended Equivalent Circuit
When the source impedance is smaller than the load impedance,
a step-up matching network is required. A typical step-up network
is shown on the input of the AD8350 in Figure 3. For purely
resistive source and load impedances the resonant approach may
be used. The input and output impedance of the AD8350 can be
modeled as a real 200 Ω resistance for operating frequencies less
than 100 MHz. For signal frequencies exceeding 100 MHz, classical Smith Chart matching techniques should be invoked in order
to deal with the complex impedance relationships. Detailed S
parameter data measured differentially in a 200 Ω system can be
found in Tables II and III.
LOAD
7
6
5
C4
0.001F
AD8350
–
For the input matching network the source resistance is less
than the input resistance of the AD8350. The AD8350 has a
nominal 200 Ω input resistance from Pins 1 to 8. The reactance
of the ac-coupling capacitors, CAC, should be negligible if 100 nF
capacitors are used and the lowest signal frequency is greater
than 1 MHz. If the series reactance of the matching network
inductor is defined to be XS = 2 π f LS, and the shunt reactance
of the matching capacitor to be XP = (2 π f CP)–1, then:
Z = 200
+
1
Z = 200
C1
0.001F
ENBL (5V)
CAC
0.1F
Figure 2 shows how the AD8350 can be driven by a singleended source. The unused input should be ac-coupled to ground.
When driven single-endedly, there will be a slight imbalance in
the differential output voltages. This will cause an increase in
the second order harmonic distortion (at 50 MHz, with VCC =
10 V and VOUT = 1 V p-p, –59 dBc was measured for the second
harmonic on AD8350-15).
SOURCE
4
ENBL (5V)
Figure 1. Basic Connections for Differential Drive
8
3
CAC
+VS (5V TO 10V)
C2
0.001F
2
2
3
4
C3
0.001F
C5
0.1F
+VS (5V TO 10V)
XS =
Figure 2. Basic Connections for Single-Ended Drive
Reactive Matching
RS × RLOAD
where X P = RLOAD ×
XP
RS
RLOAD – RS
(1)
For a 70 MHz application with a 50 Ω source resistance, and
assuming the input impedance is 200 Ω, or RLOAD = RIN = 200 Ω,
then XP = 115.5 Ω and XS = 86.6 Ω, which results in the following component values:
In practical applications, the AD8350 will most likely be matched
using reactive matching components as shown in Figure 3.
Matching components can be calculated using a Smith Chart or
by using a resonant approach to determine the matching network
that results in a complex conjugate match. In either situation,
the circuit can be analyzed as a single-ended equivalent circuit
to ease calculations as shown in Figure 4.
CP = (2 π × 70 × 106 × 115.5)–1 = 19.7 pF and
LS = 86.6 × (2 π × 70 × 106)–1 = 197 nH
–8–
REV. A
AD8350
For the output matching network, if the output source resistance of the AD8350 is greater than the terminating load
resistance, a step-down network should be employed as shown
on the output of Figure 3. For a step-down matching network,
the series and parallel reactances are calculated as:
RS × RLOAD
where X P = RS ×
XP
XS =
RLOAD
RS – RLOAD
(2)
The same results could be found using a Smith Chart as shown
in Figure 7. In this example, a shunt capacitor and a series inductor
are used to match the 200 Ω source to a 50 Ω load. For a frequency of 10 MHz, the same capacitor and inductor values
previously found using the resonant approach will transform the
200 Ω source to match the 50 Ω load. At frequencies exceeding
100 MHz, the S parameters from Tables II and III should be
used to account for the complex impedance relationships.
For a 10 MHz application with the 200 Ω output source resistance
of the AD8350, RS = 200 Ω, and a 50 Ω load termination, RLOAD =
50 Ω, then XP = 115.5 Ω and X S = 86.6 Ω, which results in
the following component values:
CP = (2 π × 10 × 106 × 115.5)–1 = 138 pF and
LS = 86.6 × (2 π × 10 × 106)–1 = 1.38 µH
LOAD
The same results can be obtained using the plots in Figure 5
and Figure 6. Figure 5 shows the normalized shunt reactance
versus the normalized source resistance for a step-up matching
network, RS < RLOAD. By inspection, the appropriate reactance
can be found for a given value of RS/RLOAD. The series reactance
is then calculated using XS = RS RLOAD/XP. The same technique
can be used to design the step-down matching network using
Figure 6.
SOURCE
SHUNT C
SERIES L
NORMALIZED REACTANCE – XP /RLOAD
2
1.8
Figure 7. Smith Chart Representation of Step-Down Network
RSOURCE
XS
0.8
After determining the matching network for the single-ended
equivalent circuit, the matching elements need to be applied in a
differential manner. The series reactance needs to be split such
that the final network is balanced. In the previous examples, this
simply translates to splitting the series inductor into two equal
halves as shown in Figure 3.
0.6
Gain Adjustment
1.6
RLOAD
XP
1.4
1.2
1
0.4
0
0.01
0.05
0.09
0.13
0.17
0.21
0.25
0.29
0.33
0.37
0.41
0.45
0.49
0.53
0.57
0.61
0.65
0.69
0.73
0.77
0.2
NORMALIZED SOURCE RESISTANCE – RSOURCE /R LOAD
Figure 5. Normalized Step-Up Matching Components
3.2
XS
RLOAD
XP
2.8
2.6
2.4
8.8
8
8.4
7.6
7.2
6.8
6
6.4
5.6
5.2
4.8
4
4.4
3.6
3.2
2.8
2
2
2.2
2.4
NORMALIZED REACTANCE – XP/RLOAD
RSOURCE
3
The effective gain of the AD8350 can be reduced using a number of techniques. Obviously a matched attenuator network will
reduce the effective gain, but this requires the addition of a
separate component which can be prohibitive in size and cost.
The attenuator will also increase the effective noise figure resulting
in an SNR degradation. A simple voltage divider can be implemented using the combination of the driving impedance of the
previous stage and a shunt resistor across the inputs of the AD8350
as shown in Figure 8. This provides a compact solution but
suffers from an increased noise spectral density at the input
of the AD8350 due to the thermal noise contribution of the
shunt resistor. The input impedance can be dynamically altered
through the use of feedback resistors as shown in Figure 9. This
will result in a similar attenuation of the input signal by virtue
of the voltage divider established from the driving source impedance and the reduced input impedance of the AD8350. Yet
this technique does not significantly degrade the SNR with
the unnecessary increase in thermal noise that arises from a truly
resistive attenuator network.
NORMALIZED SOURCE RESISTANCE – RSOURCE/R LOAD
Figure 6. Normalized Step-Down Matching Components
REV. A
–9–
AD8350
CAC
RS
The insertion loss and the resultant power gain for multiple
shunt resistor values is summarized in Table I. The source
resistance and input impedance need careful attention when
using Equation 1. The reactance of the input impedance of the
AD8350 and the ac-coupling capacitors need to be considered
before assuming they have negligible contribution. Figure 10
shows the effective power gain for multiple values of RSHUNT for
the AD8350-15 and AD8350-20.
CAC
8
7
RSHUNT
6
5
RL
AD8350
–
+
VS
RS
RL
RSHUNT
1
2
3
4
Table I. Gain Adjustment Using Shunt Resistor,
RS = 100 and RIN = 100 Single-Ended
CAC
CAC
0.1F
ENBL (5V)
+VS (5V TO 10V)
Figure 8. Gain Reduction Using Shunt Resistor
RFEXT
CAC
CAC
8
RS
7
6
5
RSHUNT–
IL–dB
Power Gain–dB
AD8350-15
AD8350-20
50
100
200
300
400
6.02
3.52
1.94
1.34
1.02
8.98
11.48
13.06
13.66
13.98
20
RL
AD8350
18
–
16
AD8350-20
+
VS
13.98
16.48
18.06
18.66
18.98
14
RL
1
CAC
2
3
4
0.1F
ENBL
(5V)
GAIN – dB
RS
CAC
+VS
(5V TO 10V)
12
AD8350-15
10
8
6
4
RFEXT
2
Figure 9. Dynamic Gain Reduction
0
0
Figure 8 shows a typical implementation of the shunt divider
concept. The reduced input impedance that results from the
parallel combination of the shunt resistor and the input impedance
of the AD8350 adds attenuation to the input signal effectively
reducing the gain. For frequencies less than 100 MHz, the input
impedance of the AD8350 can be modeled as a real 200 Ω resistance (differential). Assuming the frequency is low enough to
ignore the shunt reactance of the input, and high enough such
that the reactance of moderately sized ac-coupling capacitors
can be considered negligible, the insertion loss, IL, due to the
shunt divider can be expressed as:


RIN


(
R
IN + RS )

IL ( dB ) = 20 × Log10 
RIN RSHUNT


 ( RIN RSHUNT + RS ) 
where
RIN RSHUNT
100
200
300
400
500
RSHUNT – 600
700
800
Figure 10. Gain for Multiple Values of Shunt Resistance
for Circuit in Figure 8
The gain can be adjusted dynamically by employing external
feedback resistors as shown in Figure 9. The effective attenuation is a result of the lowered input impedance as with the shunt
resistor method, yet there is no additional noise contribution at
the input of the device. It is necessary to use well-matched resistors
to minimize common-mode offset errors. Quality 1% tolerance
resistors should be used along with a symmetric board layout to
help guarantee balanced performance. The effective gain for multiple values of external feedback resistors is shown in Figure 11.
(3)
R × RSHUNT
and RIN = 100 Ω single − ended
= IN
RIN + RSHUNT
–10–
REV. A
AD8350
Driving Lighter Loads
20
It is not necessary to load the output of the AD8350 with a
200 Ω differential load. Often it is desirable to try to achieve a
complex conjugate match between the source and load in order
to minimize reflections and conserve power. But if the AD8350
is driving a voltage responding device, such as an ADC, it is no
longer necessary to maximize power transfer. The harmonic
distortion performance will actually improve when driving
loads greater than 200 Ω. The lighter load requires less current driving capability on the output stages of the AD8350
resulting in improved linearity. Figure 12 shows the improvement in second and third harmonic distortion for increasing
differential load resistance.
18
AD8350-20
16
GAIN – dB
14
12
10
AD8350-15
8
6
4
2
0
0
500
1000
RFEXT – 1500
2000
–66
Figure 11. Power Gain vs. External Feedback Resistors
for the AD8350-15 and AD8350-20 with R S = 100 Ω and
RL = 100 Ω
–68
DISTORTION – dBc
–70
The power gain of any two-port network is dependent on the
source and load impedance. The effective gain will change if the
differential source and load impedance is not 200 Ω. The singleended input and output resistance of the AD8350 can be modeled
using the following equations:
HD3
–72
–74
–76
–78
RIN
RF + RL
=
 RF + RL 

 + 1 + gm × RL
 RINT 
HD2
–80
(4)
–82
200
300
400
500
600
700
800
900
1000
RLOAD – and
1
1
1
+
RS RINT
=


1
1 + gm × 
1
1

+
 RS RINT
Figure 12. Second and Third Harmonic Distortion vs.
Differential Load Resistance for the AD8350-15 with
VS = 5 V, f = 70 MHz, and VOUT = 1 V p-p
RF +
ROUT





≈
RF + RS
for RS ≤ 1 kΩ
1 + gm × RS
(5)
where
= RFEXT//RFINT
RF
R FEXT = R Feedback External
RFINT = 662 Ω for the AD8350-15
= 1100 Ω for the AD8350-20
RINT = 25000 Ω
gm
= 0.066 mhos for the AD8350-15
= 0.110 mhos for the AD8350-20
= R Source (Single-Ended)
RS
RL
= R Load (Single-Ended)
= R Input (Single-Ended)
R IN
R OUT = R Output (Single-Ended)
The resultant single-ended gain can be calculated using the
following equation:
GV =
REV. A
RL × ( gm × RF − 1)
RL + RS + RF + RL × RS × gm
(6)
–11–
AD8350
EVALUATION BOARD
To drive and load the board differentially, transformers T1 and
T2 should be removed and replaced with four 0 Ω resistors
(0805 size); Resistors R1 and R4 (0 Ω) should also be removed.
This yields a circuit with a broadband input and output impedance
of 200 Ω. To match to impedances other than this, matching
components (0805 size) can be placed on pads C1, C2, C3, C4,
L1, and L2.
Figure 13 shows the schematic of the AD8350 evaluation board,
for SOIC, as it is shipped from the factory. The board is configured to allow easy evaluation using single-ended 50 Ω test
equipment. The input and output transformers have a 4-to-1
impedance ratio and transform the AD8350’s 200 Ω input and
output impedances to 50 Ω. In this mode, 0 Ω resistors (R1 and
R4) are required.
To allow compensation for the insertion loss of the transformers, a calibration path is provided at Test In and Test Out. This
consists of two transformers connected back to back.
C3
0.001F
C1
0.001F
IN–
T1: TC4-1W
(MINI CIRCUITS)
6
1
7
8
5
6
AD8350
R2
0
–
L1
(OPEN)
L2
(OPEN)
+
R1
0
R3
0
T2: TC4-1W
(MINI CIRCUITS)
1
IN+
R4
0
OUT–
6
OUT+
1
2
3
4
C2
0.001F
+VS
TEST IN
C4
0.001F
A
3
B
2
C5
0.1F
SW1
1
T3: TC4-1W
(MINI CIRCUITS)
6
1
+VS
T4: TC4-1W
(MINI CIRCUITS)
TEST OUT
1
6
Figure 13. Evaluation Board
–12–
REV. A
AD8350
Table II. Typical Scattering Parameters for the AD8350-15: V CC = 5 V, Differential Input and Output, Z SOURCE(diff) = 200 ,
ZLOAD(diff) = 200 Frequency – MHz
S11
S12
S21
S22
25
50
75
100
125
150
175
200
225
250
275
300
325
350
375
400
425
450
475
500
0.015∠–48.8°
0.028∠–65.7°
0.043∠–75.3°
0.057∠–87.5°
0.073∠–91.8°
0.080∠–95.6°
0.100∠–97.4°
0.111∠–99.1°
0.128∠–103.2°
0.141∠–106.7°
0.151∠–109.7°
0.161∠–111.9°
0.179∠–114.7°
0.187∠–117.4°
0.194∠–121°
0.199∠–121.2°
0.215∠–122.6°
0.225∠–127.0°
0.225∠–127.7°
0.244∠–129.9°
0.119∠176.3°
0.119∠171.1°
0.119∠166.9°
0.120∠163.5°
0.119∠159.8°
0.120∠154.8°
0.117∠151.2°
0.121∠147.3°
0.120∠143.7°
0.120∠140.3°
0.120∠136.6°
0.123∠132.9°
0.121∠130.7°
0.122∠126.6°
0.123∠123.6°
0.124∠120.1°
0.126∠117.2°
0.126∠113.9°
0.126∠112°
0.128∠108.1°
5.60∠–4.3°
5.61∠–8.9°
5.61∠–13.5°
5.61∠–17.9°
5.65∠–22.6°
5.68∠–27.0°
5.73∠–31.8°
5.78∠–36.3°
5.83∠–41.0°
5.90∠–45.6°
6.02∠–50.2°
6.14∠–55.1°
6.19∠–60.2°
6.27∠–65.0°
6.43∠–70.1°
6.61∠–75.8°
6.77∠–81.7°
6.91∠–87.6°
7.06∠–93.8°
7.27∠–99.8°
0.034∠–4.8°
0.032∠–14.3°
0.036∠–30.2°
0.043∠–39.6°
0.053∠–40.6°
0.058∠–37°
0.072∠–45.1°
0.077∠–47.7°
0.091∠–52.5°
0.104∠–55.1°
0.108∠–54.2°
0.122∠–51.5°
0.135∠–55.6°
0.150∠–56.9°
0.162∠–60.9°
0.187∠–60.3°
0.215∠–63.3°
0.242∠–63.9°
0.268∠–65.2°
0.304∠–68.2°
Table III. Typical Scattering Parameters for the AD8350-20: V CC = 5 V, Differential Input and Output, Z SOURCE(diff) = 200 ,
ZLOAD(diff) = 200 Frequency – MHz
S11
S12
S21
S22
25
50
75
100
125
150
175
200
225
250
275
300
325
350
375
400
425
450
475
500
0.017∠–142.9°
0.033∠–114.9°
0.055∠–110.6°
0.073∠–109.4°
0.089∠–112.1°
0.098∠–116.5°
0.124∠–118.1°
0.141∠–119.4°
0.159∠–122.6°
0.170∠–128.5°
0.186∠–131.6°
0.203∠–132.9°
0.215∠–135.0°
0.222∠–136.9°
0.242∠–142.4°
0.240∠–145.2°
0.267∠–146.7°
0.266∠–150.7°
0.267∠–153.7°
0.285∠–161.1°
0.074∠174.9°
0.074∠171.0°
0.075∠167.0°
0.075∠163.1°
0.075∠159.2°
0.076∠153.8°
0.075∠150.2°
0.076∠147.2°
0.077∠142.2°
0.078∠139.5°
0.078∠135.8°
0.080∠132.5°
0.080∠129.3°
0.082∠125.9°
0.082∠123.6°
0.084∠120.3°
0.084∠117.3°
0.086∠115.1°
0.087∠112.8°
0.088∠110.9°
9.96∠–4.27°
9.98∠–8.9°
9.98∠–13.3°
10.00∠–17.7°
10.12∠–22.1°
10.20∠–26.4°
10.34∠–30.9°
10.50∠–35.6°
10.65∠–40.1°
10.80∠–44.7°
11.14∠–49.3°
11.45∠–54.7°
11.70∠–60.3°
11.93∠–65.0°
12.39∠–70.3°
12.99∠–76.8°
13.34∠–84.0°
13.76∠–90.1°
14.34∠–97.5°
14.89∠–105.0°
0.023–16.6°
0.022∠–2.7°
0.023∠–23.5°
0.029∠–22.7°
0.037∠–18.0°
0.045∠–3.2°
0.055∠–15.7°
0.065∠–15.6°
0.080∠–17.7°
0.085∠–22.4°
0.096∠–23.5°
0.116∠–25.9°
0.139∠–29.6°
0.161∠–32.2°
0.173∠–38.6°
0.207∠–37.6°
0.241∠–48.1°
0.265∠–49.7°
0.317∠–53.5°
0.359∠–59.2°
REV. A
–13–
AD8350
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
8-Lead Plastic SOIC
(SO-8)
0.1968 (5.00)
0.1890 (4.80)
0.1574 (4.00)
0.1497 (3.80)
8
5
1
4
0.2440 (6.20)
0.2284 (5.80)
PIN 1
0.0196 (0.50)
45
0.0099 (0.25)
0.0500 (1.27)
BSC
0.0688 (1.75)
0.0532 (1.35)
0.0098 (0.25)
0.0040 (0.10)
8
0.0098 (0.25) 0 0.0500 (1.27)
0.0160 (0.41)
0.0075 (0.19)
0.0192 (0.49)
0.0138 (0.35)
SEATING
PLANE
8-Lead microSOIC Package
(RM-8)
0.122 (3.10)
0.114 (2.90)
8
5
0.199 (5.05)
0.187 (4.75)
0.122 (3.10)
0.114 (2.90)
1
4
PIN 1
0.0256 (0.65) BSC
0.120 (3.05)
0.112 (2.84)
0.006 (0.15)
0.002 (0.05)
0.018 (0.46)
SEATING 0.008 (0.20)
PLANE
0.120 (3.05)
0.112 (2.84)
0.043 (1.09)
0.037 (0.94)
0.011 (0.28)
0.003 (0.08)
–14–
33
27
0.028 (0.71)
0.016 (0.41)
REV. A
–15–
–16–
PRINTED IN U.S.A.
C01014–1.5–6/01(A)