CDB4350
Evaluation Board for CS4350
Features
Description
No High Frequency Master Clock Required
The CDB4350 evaluation board is an excellent platform
for quickly evaluating the CS4350 24-bit, 24-pin, stereo
D/A converter. Evaluation requires an analog signal analyzer, a digital signal source, a PC for controlling the
CS4350 (only required for Control Port Mode), and a
power supply. Analog line-level outputs are provided via
RCA phono jacks.
Stand-Alone or PC GUI Board Control
CS8416 Receives S/PDIF-Compatible Digital
Audio
Headers for External PCM Audio Input
Demonstrates Recommended Layout and
Grounding Arrangements.
Requires Only a Digital Signal Source and
Power Supplies for a Complete Digital-toAnalog Converter System
The CS8416 digital audio receiver IC provides the system timing necessary to operate the digital-to-analog
converter and will accept S/PDIF-compatible audio data. The evaluation board may also be configured to
accept external timing and data signals for operation in
a user application during system development.
ORDERING INFORMATION
CDB4350
Evaluation Board
Hardware or
Software Board
Control
Inputs for PCM
Clocks and Data
Analog Outputs
and Filtering
CS4350
CS8416
Digital Audio
Interface
http://www.cirrus.com
Recovered Master
Clock
Copyright © Cirrus Logic, Inc. 2006
(All Rights Reserved)
APRIL '06
DS691DB1
CDB4350
TABLE OF CONTENTS
1. CDB4350 SYSTEM OVERVIEW ............................................................................................................ 3
2. CS4350 DIGITAL-TO-ANALOG CONVERTER ..................................................................................... 3
3. CS8416 DIGITAL AUDIO RECEIVER .................................................................................................... 3
4. INPUT FOR CLOCKS AND DATA ......................................................................................................... 3
5. INPUT FOR CONTROL DATA ............................................................................................................... 3
6. POWER SUPPLY CIRCUITRY ............................................................................................................... 4
7. GROUNDING AND POWER SUPPLY DECOUPLING .......................................................................... 4
8. ANALOG OUTPUT FILTERING ............................................................................................................. 4
9. BOARD CONNECTIONS AND SETTINGS ............................................................................................ 5
10. SCHEMATICS ...................................................................................................................................... 6
11. LAYOUT ............................................................................................................................................. 13
12. REVISION HISTORY .......................................................................................................................... 16
LIST OF FIGURES
Figure 1.System Block Diagram and Signal Flow ....................................................................................... 6
Figure 2.CS4350 ......................................................................................................................................... 7
Figure 3.Analog Outputs ............................................................................................................................. 8
Figure 4.PCM Input Header and Hardware Control .................................................................................... 9
Figure 5.CS8416 S/PDIF Input ................................................................................................................. 10
Figure 6.Control Port ................................................................................................................................. 11
Figure 7.Power .......................................................................................................................................... 12
Figure 8.Silkscreen Top ............................................................................................................................ 13
Figure 9.Top Side ...................................................................................................................................... 14
Figure 10.Bottom Side .............................................................................................................................. 15
LIST OF TABLES
Table 1. System Connections ..................................................................................................................... 5
Table 2. CDB4350 Jumper Settings ............................................................................................................ 5
Table 3. CDB4350 Switch Settings ............................................................................................................. 5
2
DS691DB1
CDB4350
1. CDB4350 SYSTEM OVERVIEW
The CDB4350 evaluation board is an excellent platform for quickly evaluating the CS4350. The CS8416 digital audio
interface receiver provides an easy interface to digital audio signal sources including the majority of digital audio test
equipment. The evaluation board also allows the user to supply external PCM clocks and data through headers for
system development.
The CDB4350 schematic has been partitioned into 6 pages, shown in Figures 2 through 7. Each schematic page is
represented in the system diagram shown in Figure 1. Notice that the system diagram also includes the interconnections between the partitioned schematics.
2. CS4350 DIGITAL-TO-ANALOG CONVERTER
A description of the CS4350 is included in the CS4350 datasheet, available at www.cirrus.com.
3. CS8416 DIGITAL AUDIO RECEIVER
The system receives and decodes the standard S/PDIF data format using a CS8416 digital audio receiver
(Figure 5). The outputs of the CS8416 include a serial bit clock, serial data, and a left-right clock. The CS8416 data
format is selected through switch S1. The operation of the CS8416 and a discussion of the digital audio interface is
included in the CS8416 datasheet, available at www.cirrus.com.
The CDB4350 has been designed so that the input can be either optical or coaxial (see Figure 6). However, both
inputs cannot be driven simultaneously.
After the CS8416 serial format is changed either through S1 in Stand-Alone Mode, or though the CDB4350 GUI in
PC Mode, a reset is required. The CS8416 can be manually reset using ‘HARDWARE RESET’ (S2) in Stand-Alone
Mode, or through software when operating the CDB4350 in PC Mode.
4. INPUT FOR CLOCKS AND DATA
The evaluation board has been designed to allow external PCM data input through header J10. The schematic for
the clock/data input is shown in Figure 4. In Stand-Alone Mode, switch position 6 of S4 selects the source as either
CS8416 (open) or header J10 (closed). In PC Mode, the PCM source is selected through software.
5. INPUT FOR CONTROL DATA
The evaluation board can be run in either a Stand-Alone Mode or with a PC. Stand-Alone Mode does not require
the use of a PC, and the mode pins are configured using switch positions 1 through 5 of S4 and switch positions 1
and 2 of S1. PC Mode uses software to set up the CS4350 through I²C® or SPI™ using the PC’s serial port or USB
port. When the serial port (RS232) or USB is attached and the CDB4350 software is running, PC Mode is automatically selected.
Header J38 offers the option for external input of RST and SPI/I²C clocks and data. The board is set up from the
factory to use the on-board microcontroller in conjunction with software available at www.cirrus.com. To use an external control source, remove the shunts on J38 and place a ribbon cable so the signal lines are on the center row
and the grounds are on the right side. R89 and R90 should be populated with 2 kΩ resistors when using an external
I²C source which does not already provide pull-ups.
DS691DB1
3
CDB4350
6. POWER SUPPLY CIRCUITRY
Power is supplied to the evaluation board by three binding posts (GND, +12V, and -12V), as shown in Figure 7. The
‘+12V’ and ‘-12V’ terminals supply the active output filters. The +3.3 V and +5.0 V circuitry is powered by regulators
fed by the ‘+12V’ terminal. Headers J3, J4, and J7 allow the user to either select +3.3 V or +5.0 V supplies for the
various CS4350 voltage supply pins. Alternatively, the user can remove the shunts on J3, J4, and J7, and provide
an external power supply.
WARNING: Refer to the CS4350 datasheet for maximum allowable voltage levels. Operation outside of this range
can cause permanent damage to the device.
7. GROUNDING AND POWER SUPPLY DECOUPLING
As with any high-performance converter, the CS4350 requires careful attention to power supply and grounding arrangements in order to optimize performance. Figure 2 details the connections to the CS4350 while Figures 8, 9,
and 10 show the component placement and top and bottom layout. The decoupling capacitors are located as close
to the CS4350 as possible. Extensive use of ground plane fill in the evaluation board yields large reductions in radiated noise.
8. ANALOG OUTPUT FILTERING
The analog output on the CDB4350 has been designed according to the CS4350 datasheet. This output circuit includes an active 2-pole, 50 kHz filter which utilizes the multiple-feedback topology and a passive output filter.
4
DS691DB1
CDB4350
9. BOARD CONNECTIONS AND SETTINGS
Board connections and settings are shown in Table 1, Table 2, and Table 3.
CONNECTOR
INPUT/OUTPUT
SIGNAL PRESENT
GND
Input
Ground connection from power supply
+12V
Input
+12 V positive supply for the on-board filtering
-12V
Input
-12 V negative supply for the on-board filtering
S/PDIF IN - J1
Input
Digital audio interface input via coax
S/PDIF IN - OPT1
Input
Digital audio interface input via optical
PCM INPUT - J10
Input
Input for master, serial, left/right clocks and serial data
AOUTA, AOUTB
Output
RCA line level analog outputs from active output stage
POUTA, POUTB
Output
RCA line level analog outputs from passive output stage
Table 1. System Connections
JUMPER
PURPOSE
POSITION
FUNCTION SELECTED
J6, J21
Selects analog output
*A
P
*CDB4350 outputs from AOUTA and AOUTB
CDB4350 outputs from POUTA and POUTB
J3, J4, J7
Selects Supply Voltage for
CS4350
+5V
*+3.3V
Supplies +5.0 V to associated CS4350 supply
*Supplies +3.3 V to associated CS4350 supply
J38
Selects source of control data
*PC CONTROL
shunts removed
*Control from PC and on-board microcontroller
External control input using center and right columns
J27
C2 micro programming
-
Reserved for factory use only
Table 2. CDB4350 Jumper Settings
*Default Factory Settings.
SWITCH
(Note 1)
PURPOSE
S2
Resets CS8416 and CS4350
S1
CS8416 Format Select
SFSEL[1:0]
1,2
Default: SFSEL[1:0] = 00 (Closed). See CS8416 datasheet
for details.
CS4350 Format Select
DIF[2:0]
1,2, 3
Default: DIF[2:0] = 000 (Closed). See CS4350 datasheet
for details.
CS4350 De-emphasis Select
4
open = De-emphasis enabled
*closed = De-emphasis disabled.
CS4350 Popguard Enable
5
open = Popguard enabled
*closed = Popguard disabled.
Selects PCM source for
CS4350
6
*open = CS8416
closed = PCM Header J10
POSITION
FUNCTION SELECTED
The CS8416 must be reset if switch S1 is changed
S4
Table 3. CDB4350 Switch Settings
*Default Factory Settings.
Note:
1. Switch settings take effect in Stand-Alone Mode only.
DS691DB1
5
6
10.SCHEMATICS
Power
Serial Control Port
Figure 7
PCM source select
Figure 6
I2C/SPI Header
Analog Outputs
PCM HEADER
Figure 4
POUTA
Figure 3
PCM Clocks/Data
2
PCM mux
PCM Clocks/Data
PCM Clocks/Data
CS4350
DIF[2:0]
2
AOUTB
Figure 3
Figure 4
CS8416
S/PDIF
Input
Figure 2
POUTB
Figure 3
PCM source select
CS8416 serial port
format
Figure 5
AOUTA
Figure 3
RMCK Header
Figure 4
Hardware Control
Switches
Figure 4
CDB4350
DS691DB1
Figure 1. System Block Diagram and Signal Flow
DS691DB1
Figure 2. CS4350
CDB4350
7
8
CDB4350
DS691DB1
Figure 3. Analog Outputs
DS691DB1
9
CDB4350
Figure 4. PCM Input Header and Hardware Control
10
CDB4350
DS691DB1
Figure 5. CS8416 S/PDIF Input
DS691DB1
11
CDB4350
Figure 6. Control Port
12
CDB4350
DS691DB1
Figure 7. Power
DS691DB1
11.LAYOUT
13
CDB4350
Figure 8. Silkscreen Top
14
CDB4350
DS691DB1
Figure 9. Top Side
DS691DB1
CDB4350
15
Figure 10. Bottom Side
CDB4350
12.REVISION HISTORY
Release
DB1
Date
April 2006
Changes
Initial Evaluation Board Datasheet Release
Contacting Cirrus Logic Support
For all product questions and inquiries, contact a Cirrus Logic Sales Representative.
To find the one nearest to you, go to www.cirrus.com
IMPORTANT NOTICE
Cirrus Logic, Inc. and its subsidiaries ("Cirrus") believe that the information contained in this document is accurate and reliable. However, the information is subject
to change without notice and is provided "AS IS" without warranty of any kind (express or implied). Customers are advised to obtain the latest version of relevant
information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale
supplied at the time of order acknowledgment, including those pertaining to warranty, indemnification, and limitation of liability. No responsibility is assumed by Cirrus
for the use of this information, including use of this information as the basis for manufacture or sale of any items, or for infringement of patents or other rights of third
parties. This document is the property of Cirrus and by furnishing this information, Cirrus grants no license, express or implied under any patents, mask work rights,
copyrights, trademarks, trade secrets or other intellectual property rights. Cirrus owns the copyrights associated with the information contained herein and gives consent for copies to be made of the information only for use within your organization with respect to Cirrus integrated circuits or other products of Cirrus. This consent
does not extend to other copying such as copying for general distribution, advertising or promotional purposes, or for creating any work for resale.
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL APPLICATIONS”). CIRRUS PRODUCTS ARE NOT DESIGNED, AUTHORIZED OR WARRANTED FOR USE
IN AIRCRAFT SYSTEMS, MILITARY APPLICATIONS, PRODUCTS SURGICALLY IMPLANTED INTO THE BODY, AUTOMOTIVE SAFETY OR SECURITY DEVICES, LIFE SUPPORT PRODUCTS OR OTHER CRITICAL APPLICATIONS. INCLUSION OF CIRRUS PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD
TO BE FULLY AT THE CUSTOMER’S RISK AND CIRRUS DISCLAIMS AND MAKES NO WARRANTY, EXPRESS, STATUTORY OR IMPLIED, INCLUDING THE
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR PARTICULAR PURPOSE, WITH REGARD TO ANY CIRRUS PRODUCT THAT IS USED
IN SUCH A MANNER. IF THE CUSTOMER OR CUSTOMER’S CUSTOMER USES OR PERMITS THE USE OF CIRRUS PRODUCTS IN CRITICAL APPLICATIONS, CUSTOMER AGREES, BY SUCH USE, TO FULLY INDEMNIFY CIRRUS, ITS OFFICERS, DIRECTORS, EMPLOYEES, DISTRIBUTORS AND OTHER
AGENTS FROM ANY AND ALL LIABILITY, INCLUDING ATTORNEYS’ FEES AND COSTS, THAT MAY RESULT FROM OR ARISE IN CONNECTION WITH
THESE USES.
Cirrus Logic, Cirrus, the Cirrus Logic logo designs, and Popguard are trademarks of Cirrus Logic, Inc. All other brand and product names in this document may be
trademarks or service marks of their respective owners.
I²C is a registered trademark of Philips Semiconductor.
SPI is a trademark of Motorola, Inc.
16
DS691DB1