Intersil EL5211IYZ 60mhz rail-to-rail input-output op amp Datasheet

EL5111, EL5211, EL5411
®
Data Sheet
October 29, 2004
FN7119.4
60MHz Rail-to-Rail Input-Output Op Amps
Features
The EL5111, EL5211, and EL5411 are low power, high
voltage rail-to-rail input-output amplifiers. The EL5111
represents a single amplifier, the EL5211 contains two
amplifiers, and the EL5411 contains four amplifiers.
Operating on supplies ranging from 5V to 15V, while
consuming only 2.5mA per amplifier, the EL5111, EL5211,
and EL5411 have a bandwidth of 60MHz (-3dB). They also
provide common mode input ability beyond the supply rails,
as well as rail-to-rail output capability. This enables these
amplifiers to offer maximum dynamic range at any supply
voltage.
• Pb-Free Available (RoHS Compliant)
The EL5111, EL5211, and EL5411 also feature fast slewing
and settling times, as well as a high output drive capability of
65mA (sink and source). These features make these
amplifiers ideal for high speed filtering and signal
conditioning application. Other applications include battery
power, portable devices, and anywhere low power
consumption is important.
• ±180mA output short current
The EL5111 is available in 5-pin TSOT and 8-pin HMSOP
packages. The EL5211 is available in the 8-pin HMSOP
package. The EL5411 is available in space-saving 14-pin
HTSSOP packages. All feature a standard operational
amplifier pinout. These amplifiers operate over a temperature
range of -40°C to +85°C.
• Data acquisition
• 60MHz -3dB bandwidth
• Supply voltage = 4.5V to 16.5V
• Low supply current (per amplifier) = 2.5mA
• High slew rate = 75V/µs
• Unity-gain stable
• Beyond the rails input capability
• Rail-to-rail output swing
Applications
• TFT-LCD panels
• VCOM amplifiers
• Drivers for A-to-D converters
• Video processing
• Audio processing
• Active filters
• Test equipment
• Battery-powered applications
• Portable equipment
Pinouts
EL5111
(8-PIN HMSOP)
TOP VIEW
NC 1
VIN- 2
VIN+ 3
VS- 4
EL5111
(5-PIN TSOT)
TOP VIEW
8 NC
+
VOUT 1
7 VS+
VS- 2
6 VOUT
VIN+ 3
5 NC
EL5211
(8-PIN HMSOP)
TOP VIEW
5 VS+
VOUTA 1
VINA- 2
+ 4 VIN-
VINA+ 3
VS- 4
EL5411
(14-PIN HTSSOP)
TOP VIEW
8 VS+
7 VOUTB
+
+
VOUTA 1
14 VOUTD
VINA- 2
6 VINB-
VINA+ 3
5 VINB+
VS+ 4
13 VIND+
+
11 VS-
VINB+ 5
VINB- 6
VOUTB 7
1
12 VIND+
10 VINC+
+
-
+
-
9 VINC8 VOUTC
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2004. All Rights Reserved. All other trademarks mentioned are the property of their respective owners.
EL5111, EL5211, EL5411
Ordering Information
PACKAGE
TAPE &
REEL
PKG. DWG. #
EL5111IWT-T7
5-Pin TSOT
7” (3K pcs)
MDP0049
EL5111IWT-T7A
5-Pin TSOT
7” (250 pcs)
MDP0049
EL5111IWTZ-T7
(Note)
5-Pin TSOT
(Pb-Free)
7” (3K pcs)
MDP0049
EL5111IWTZ-T7A
(Note)
5-Pin TSOT
(Pb-Free)
7” (250 pcs)
MDP0049
EL5111IYE
8-Pin HMSOP
-
MDP0050
EL5111IYE-T7
8-Pin HMSOP
7”
MDP0050
EL5111IYE-T13
8-Pin HMSOP
13”
MDP0050
EL5111IYEZ
(See Note)
8-Pin HMSOP
(Pb-free)
-
MDP0050
EL5111IYEZ-T7
(See Note)
8-Pin HMSOP
(Pb-free)
7”
MDP0050
EL5111IYEZ-T13
(See Note)
8-Pin HMSOP
(Pb-free)
13”
MDP0050
EL5211IYE
8-Pin HMSOP
-
MDP0050
EL5211IYE-T7
8-Pin HMSOP
7”
MDP0050
EL5211IYE-T13
8-Pin HMSOP
13”
MDP0050
EL5211IYEZ
(Note)
8-Pin HMSOP
(Pb-Free)
-
MDP0050
EL5211IYEZ-T7
(Note)
8-Pin HMSOP
(Pb-Free)
7”
MDP0050
EL5211IYEZ-T13
(Note)
8-Pin HMSOP
(Pb-Free)
13”
MDP0050
EL5411IRE
14-Pin
HTSSOP
-
MDP0048
EL5411IRE-T7
14-Pin
HTSSOP
7”
MDP0048
EL5411IRE-T13
14-Pin
HTSSOP
13”
MDP0048
EL5411IREZ
(Note)
14-Pin
HTSSOP
(Pb-Free)
-
MDP0048
EL5411IREZ-T7
(Note)
14-Pin
HTSSOP
(Pb-Free)
7”
MDP0048
EL5411IREZ-T13
(Note)
14-Pin
HTSSOP
(Pb-Free)
13”
MDP0048
PART NUMBER
NOTE: Intersil Pb-free products employ special Pb-free material sets;
molding compounds/die attach materials and 100% matte tin plate
termination finish, which are RoHS compliant and compatible with
both SnPb and Pb-free soldering operations. Intersil Pb-free products
are MSL classified at Pb-free peak reflow temperatures that meet or
exceed the Pb-free requirements of IPC/JEDEC J STD-020C.
2
FN7119.4
EL5111, EL5211, EL5411
Absolute Maximum Ratings (TA = 25°C)
Supply Voltage between VS+ and VS- . . . . . . . . . . . . . . . . . . . .+18V
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . VS- - 0.5V, VS +0.5V
Maximum Continuous Output Current . . . . . . . . . . . . . . . . . . . 65mA
Maximum Die Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . +125°C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Ambient Operating Temperature . . . . . . . . . . . . . . . .-40°C to +85°C
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Curves
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typ values are for information purposes only. Unless otherwise noted, all tests are
at the specified temperature and are pulsed tests, therefore: TJ = TC = TA
Electrical Specifications
PARAMETER
VS+ = +5V, VS- = -5V, RL = 1kΩ to 0V, TA = 25°C, Unless Otherwise Specified
DESCRIPTION
CONDITIONS
MIN
TYP
MAX
UNIT
3
15
mV
INPUT CHARACTERISTICS
VOS
Input Offset Voltage
VCM = 0V
TCVOS
Average Offset Voltage Drift (Note 1)
IB
Input Bias Current
RIN
Input Impedance
1
GΩ
CIN
Input Capacitance
2
pF
CMIR
Common-Mode Input Range
CMRR
Common-Mode Rejection Ratio
for VIN from -5.5V to 5.5V
50
70
dB
AVOL
Open-Loop Gain
-4.5V ≤ VOUT ≤ 4.5V
62
70
dB
7
VCM = 0V
2
-5.5
µV/°C
60
+5.5
nA
V
OUTPUT CHARACTERISTICS
VOL
Output Swing Low
IL = -5mA
VOH
Output Swing High
IL = 5mA
ISC
IOUT
-4.92
4.85
-4.85
V
4.92
V
Short-Circuit Current
±180
mA
Output Current
±65
mA
80
dB
POWER SUPPLY PERFORMANCE
PSRR
Power Supply Rejection Ratio
VS is moved from ±2.25V to ±7.75V
60
IS
Supply Current
No load (EL5111)
2.5
4.5
mA
No load (EL5211)
5
7.5
mA
No load (EL5411)
10
15
mA
DYNAMIC PERFORMANCE
SR
Slew Rate (Note 2)
-4.0V ≤ VOUT ≤ 4.0V, 20% to 80%
75
V/µs
tS
Settling to +0.1% (AV = +1)
(AV = +1), VO = 2V step
80
ns
BW
-3dB Bandwidth
60
MHz
GBWP
Gain-Bandwidth Product
32
MHz
PM
Phase Margin
50
°
CS
Channel Separation
f = 5MHz (EL5211 & EL5411 only)
110
dB
dG
Differential Gain (Note 3)
RF = RG = 1kΩ and VOUT = 1.4V
0.17
%
dP
Differential Phase (Note 3)
RF = RG = 1kΩ and VOUT = 1.4V
0.24
°
NOTES:
1. Measured over operating temperature range.
2. Slew rate is measured on rising and falling edges.
3. NTSC signal generator used.
3
FN7119.4
Electrical Specifications
PARAMETER
VS+ = +5V, VS- = 0V, RL = 1kΩ to 2.5V, TA = 25°C, Unless Otherwise Specified
DESCRIPTION
CONDITION
MIN
TYP
MAX
UNIT
3
15
mV
INPUT CHARACTERISTICS
VOS
Input Offset Voltage
VCM = 2.5V
TCVOS
Average Offset Voltage Drift (Note 4)
IB
Input Bias Current
RIN
Input Impedance
1
GΩ
CIN
Input Capacitance
2
pF
CMIR
Common-Mode Input Range
CMRR
Common-Mode Rejection Ratio
for VIN from -0.5V to 5.5V
45
66
dB
AVOL
Open-Loop Gain
0.5V ≤ VOUT ≤ 4.5V
62
70
dB
7
VCM = 2.5V
2
-0.5
µV/°C
60
+5.5
nA
V
OUTPUT CHARACTERISTICS
VOL
Output Swing Low
IL = -5mA
VOH
Output Swing High
IL = 5mA
ISC
IOUT
80
4.85
150
mV
4.92
V
Short-circuit Current
±180
mA
Output Current
±65
mA
80
dB
POWER SUPPLY PERFORMANCE
PSRR
Power Supply Rejection Ratio
VS is moved from 4.5V to 15.5V
60
IS
Supply Current
No load (EL5111)
2.5
4.5
mA
No load (EL5211)
5
7.5
mA
No load (EL5411)
10
15
mA
DYNAMIC PERFORMANCE
SR
Slew Rate (Note 5)
1V ≤ VOUT ≤ 4V, 20% to 80%
75
V/µs
tS
Settling to +0.1% (AV = +1)
(AV = +1), VO = 2V step
80
ns
BW
-3dB Bandwidth
60
MHz
GBWP
Gain-Bandwidth Product
32
MHz
PM
Phase Margin
50
°
CS
Channel Separation
f = 5MHz (EL5211 & EL5411 only)
110
dB
dG
Differential Gain (Note 6)
RF = RG = 1kΩ and VOUT = 1.4V
0.17
%
dP
Differential Phase (Note 6)
RF = RG = 1kΩ and VOUT = 1.4V
0.24
°
NOTES:
4. Measured over operating temperature range.
5. Slew rate is measured on rising and falling edges.
6. NTSC signal generator used.
Electrical Specifications
PARAMETER
VS+ = +15V, VS- = 0V, RL = 1kΩ to 7.5V, TA = 25°C, Unless Otherwise Specified
DESCRIPTION
CONDITION
MIN
TYP
MAX
UNIT
3
15
mV
INPUT CHARACTERISTICS
VOS
Input Offset Voltage
TCVOS
Average Offset Voltage Drift (Note 7)
IB
Input Bias Current
RIN
Input Impedance
4
VCM = 7.5V
7
VCM = 7.5V
2
1
µV/°C
60
nA
GΩ
FN7119.4
Electrical Specifications
PARAMETER
VS+ = +15V, VS- = 0V, RL = 1kΩ to 7.5V, TA = 25°C, Unless Otherwise Specified (Continued)
DESCRIPTION
CONDITION
MIN
TYP
MAX
2
UNIT
CIN
Input Capacitance
CMIR
Common-Mode Input Range
CMRR
Common-Mode Rejection Ratio
for VIN from -0.5V to 15.5V
53
72
dB
AVOL
Open-Loop Gain
0.5V ≤ VOUT ≤ 14.5V
62
70
dB
-0.5
pF
+15.5
V
OUTPUT CHARACTERISTICS
VOL
Output Swing Low
IL = -5mA
VOH
Output Swing High
IL = 5mA
ISC
IOUT
80
14.85
150
mV
14.92
V
Short-circuit Current
±180
mA
Output Current
±65
mA
80
dB
POWER SUPPLY PERFORMANCE
PSRR
Power Supply Rejection Ratio
VS is moved from 4.5V to 15.5V
60
IS
Supply Current
No load (EL5111)
2.5
4.5
mA
No load (EL5211)
5
7.5
mA
No load (EL5411)
10
15
mA
DYNAMIC PERFORMANCE
SR
Slew Rate (Note 8)
1V ≤ VOUT ≤ 14V, 20% to 80%
75
V/µs
tS
Settling to +0.1% (AV = +1)
(AV = +1), VO = 2V step
80
ns
BW
-3dB Bandwidth
60
MHz
GBWP
Gain-Bandwidth Product
32
MHz
PM
Phase Margin
50
°
CS
Channel Separation
f = 5MHz (EL5211 & EL5411 only)
110
dB
dG
Differential Gain (Note 9)
RF = RG = 1kΩ and VOUT = 1.4V
0.16
%
dP
Differential Phase (Note 9)
RF = RG = 1kΩ and VOUT = 1.4V
0.22
°
NOTES:
7. Measured over operating temperature range
8. Slew rate is measured on rising and falling edges
9. NTSC signal generator used
5
FN7119.4
Typical Performance Curves
VS=±5V
TA=25°C
400
TYPICAL
PRODUCTION
DISTRIBUTION
300
200
100
25
QUANTITY (AMPLIFIERS)
20
15
10
5
INPUT BIAS CURRENT (µA)
0.008
1.5
1
0.5
0
30
70
110
4.88
70
110
150
TEMPERATURE (°C)
FIGURE 5. OUTPUT HIGH VOLTAGE vs TEMPERATURE
6
21
19
-0.008
-10
30
70
110
150
FIGURE 4. INPUT BIAS CURRENT vs TEMPERATURE
OUTPUT LOW VOLTAGE (V)
4.90
30
17
-0.004
-4.85
VS=±5V
IOUT=5mA
-10
15
0
TEMPERATURE (°C)
4.92
4.86
-50
11
0.004
-0.012
-50
150
FIGURE 3. INPUT OFFSET VOLTAGE vs TEMPERATURE
4.94
13
VS=±5V
TEMPERATURE (°C)
4.96
9
FIGURE 2. INPUT OFFSET VOLTAGE DRIFT
2
-10
7
INPUT OFFSET VOLTAGE DRIFT, TCVOS (µV/°C)
FIGURE 1. INPUT OFFSET VOLTAGE DISTRIBUTION
-0.5
-50
5
1
12
8
10
6
4
2
-0
-2
-4
-6
-8
-10
-12
INPUT OFFSET VOLTAGE (mV)
OUTPUT HIGH VOLTAGE (V)
TYPICAL
PRODUCTION
DISTRIBUTION
0
0
INPUT OFFSET VOLTAGE (mV)
VS=±5V
3
QUANTITY (AMPLIFIERS)
500
-4.87
VS=±5V
IOUT=5mA
-4.89
-4.91
-4.93
-4.95
-50
-10
30
70
110
150
TEMPERATURE (°C)
FIGURE 6. OUTPUT LOW VOLTAGE vs TEMPERATURE
FN7119.4
Typical Performance Curves (Continued)
78
VS=±5V
RL=1kΩ
VS=±5V
77
SLEW RATE (V/µs)
OPEN-LOOP GAIN (dB)
75
70
65
76
75
74
73
60
-50
-10
30
70
110
72
-50
150
-10
FIGURE 7. OPEN-LOOP GAIN vs TEMPERATURE
SUPPLY CURRENT (mA)
SUPPLY CURRENT (mA)
2.7
2.5
2.3
2.1
1.9
1.7
1.5
4
8
12
150
16
VS=±5V
2.65
2.6
2.55
2.5
2.45
2.4
-50
20
-10
30
70
110
150
TEMPERATURE (°C)
SUPPLY VOLTAGE (V)
FIGURE 9. SUPPLY CURRENT PER AMPLIFIER vs SUPPLY
VOLTAGE
FIGURE 10. SUPPLY CURRENT PER AMPLIFIER vs
TEMPERATURE
0
0.3
DIFFERENTIAL PHASE (°)
-0.02
DIFFERENTIAL GAIN (%)
110
FIGURE 8. SLEW RATE vs TEMPERATURE
TA=25°C
2.7
70
TEMPERATURE (°C)
TEMPERATURE (°C)
2.9
30
-0.04
-0.06
-0.08
-0.1
-0.12
VS=±5V
AV=2
RL=1kΩ
-0.14
-0.16
-0.18
0.25
0.2
0.15
0.1
0.05
0
0
100
IRE
FIGURE 11. DIFFERENTIAL GAIN
7
200
0
100
200
IRE
FIGURE 12. DIFFERENTIAL PHASE
FN7119.4
Typical Performance Curves (Continued)
-30
-60
2nd HD
-70
-80
40
PHASE
10
4
6
8
-20
1K
10
10K
VS=±5V
AV=1
CLOAD=0pF
1kΩ
1
-1
560Ω
-3
150Ω
-5
100K
1M
10M
1000pF
15
10pF
5
-5
-15
VS=±5V
AV=1
RL=1kΩ
1M
10M
100M
FIGURE 16. FREQUENCY RESPONSE FOR VARIOUS CL
MAXIMUM OUTPUT SWING (VP-P)
OUTPUT IMPEDANCE (Ω)
350
300
250
200
150
100
50
1M
100pF
FREQUENCY (Hz)
400
10M
100M
FREQUENCY (Hz)
FIGURE 17. CLOSED LOOP OUTPUT IMPEDANCE
8
-50
100M
47pF
-25
100K
100M
FIGURE 15. FREQUENCY RESPONSE FOR VARIOUS RL
100K
10M
25
FREQUENCY (Hz)
0
10K
1M
FIGURE 14. OPEN LOOP GAIN AND PHASE
MAGNITUDE (NORMALIZED) (dB)
MAGNITUDE (NORMALIZED) (dB)
FIGURE 13. HARMONIC DISTORTION vs VOP-P
3
100K
FREQUENCY (Hz)
VOP-P (V)
5
70
0
-90
2
130
20
3rd HD
0
190
GAIN
PHASE (°)
-50
60
GAIN (dB)
-40
DISTORTION (dB)
250
80
VS=±5V
AV=2
RL=1kΩ
FREQ=1MHz
12
10
8
6
4
2
VS=±5V
AV=1
RL=1kΩ
DISTORTION <1%
0
10K
100K
1M
10M
100M
FREQUENCY (kHz)
FIGURE 18. MAXIMUM OUTPUT SWING vs FREQUENCY
FN7119.4
Typical Performance Curves (Continued)
-15
-80
PSRR+
-35
-45
-40
-20
-55
-65
1K
PSRR-
-60
PSRR (dB)
CMRR (dB)
-25
VS=±5V
TA=25°C
10K
100K
1M
10M
0
100
100M
1K
FREQUENCY (Hz)
XTALK (dB)
100
10
DUAL MEASURED CH A TO B
QUAD MEASURED CH A TO D OR B TO C
OTHER COMBINATIONS YIELD
IMPROVED REJECTION
-100
-120
VS=±5V
RL=1kΩ
AV=1
VIN=110mVRMS
-140
1K
10K
100K
1M
10M
-160
1K
100M
10K
FREQUENCY (Hz)
60
1M
10M 30M
FIGURE 22. CHANNEL SEPARATION
5
VS=±5V
AV=1
RL=1kΩ
VIN=±50mV
TA=25°C
4
3
STEP SIZE (V)
80
100K
FREQUENCY (Hz)
FIGURE 21. INPUT VOLTAGE NOISE SPECTRAL DENSITY
100
10M
-60
-80
1
100
1M
FIGURE 20. PSRR
1K
VOLTAGE NOISE (nV/√Hz)
100K
FREQUENCY (Hz)
FIGURE 19. CMRR
OVERSHOOT (%)
10K
40
VS=±5V
AV=1
RL=1kΩ
0.1%
2
1
0
-1
-2
0.1%
-3
20
-4
0
10
100
LOAD CAPACITANCE (pF)
FIGURE 23. SMALL-SIGNAL OVERSHOOT vs LOAD
CAPACITANCE
9
1K
-5
55
65
75
85
95
105
SETTLING TIME (ns)
FIGURE 24. SETTLING TIME vs STEP SIZE
FN7119.4
Typical Performance Curves (Continued)
VS=±5V
TA=25°C
AV=1
RL=1kΩ
VS=±5V
TA=25°C
AV=1
RL=1kΩ
100mV STEP
1V STEP
50ns/DIV
50ns/DIV
FIGURE 25. LARGE SIGNAL TRANSIENT RESPONSE
FIGURE 26. SMALL SIGNAL TRANSIENT RESPONSE
Pin Descriptions
EL5111
(TSOT-5)
EL5111
(HMSOP8)
EL5211
(HMSOP8)
EL5411
( HTSSOP14)
NAME
1
6
1
1
VOUTA
FUNCTION
EQUIVALENT CIRCUIT
Amplifier A output
VS+
GND
VS-
CIRCUIT 1
4
2
2
2
VINA-
Amplifier A inverting input
VS+
VS-
CIRCUIT 2
3
3
3
3
VINA+
5
7
8
4
VS+
5
5
VINB+
Amplifier B non-inverting input
(Reference Circuit 2)
6
6
VINB-
Amplifier B inverting input
(Reference Circuit 2)
7
7
VOUTB
Amplifier B output
(Reference Circuit 1)
8
VOUTC
Amplifier C output
(Reference Circuit 1)
9
VINC-
Amplifier C inverting input
(Reference Circuit 2)
10
VINC+
Amplifier C non-inverting input
(Reference Circuit 2)
11
VS-
12
VIND+
Amplifier D non-inverting input
(Reference Circuit 2)
13
VIND-
Amplifier D inverting input
(Reference Circuit 2)
14
VOUTD
Amplifier D output
(Reference Circuit 1)
2
4
4
1, 5, 8
NC
10
Amplifier A non-inverting input
(Reference Circuit 2)
Positive power supply
Negative power supply
Not connected
FN7119.4
Applications Information
Product Description
The EL5111, EL5211, and EL5411 voltage feedback
amplifiers are fabricated using a high voltage CMOS
process. They exhibit rail-to-rail input and output capability,
are unity gain stable and have low power consumption
(2.5mA per amplifier). These features make the EL5111,
EL5211, and EL5411 ideal for a wide range of generalpurpose applications. Connected in voltage follower mode
and driving a load of 1kΩ, the EL5111, EL5211, and EL5411
have a -3dB bandwidth of 60MHz while maintaining a 75V/µs
slew rate. The EL5111 is a single amplifier, the EL5211 a
dual amplifier, and the EL5411 a quad amplifier.
Operating Voltage, Input, and Output
indefinitely, the power dissipation could easily increase such
that the device may be damaged. Maximum reliability is
maintained if the output continuous current never exceeds
±65mA. This limit is set by the design of the internal metal
interconnects.
Output Phase Reversal
The EL5111, EL5211, and EL5411 are immune to phase
reversal as long as the input voltage is limited from VS- -0.5V
to VS+ +0.5V. Figure 28 shows a photo of the output of the
device with the input voltage driven beyond the supply rails.
Although the device's output will not change phase, the
input's overvoltage should be avoided. If an input voltage
exceeds supply voltage by more than 0.6V, electrostatic
protection diodes placed in the input stage of the device
begin to conduct and overvoltage damage could occur.
The EL5111, EL5211, and EL5411 are specified with a single
nominal supply voltage from 5V to 15V or a split supply with
its total range from 5V to 15V. Correct operation is
guaranteed for a supply range of 4.5V to 16.5V. Most
EL5111, EL5211, and EL5411 specifications are stable over
both the full supply range and operating temperatures of
-40°C to +85°C. Parameter variations with operating voltage
and/or temperature are shown in the typical performance
curves.
The input common-mode voltage range of the EL5111,
EL5211, and EL5411 extends 500mV beyond the supply
rails. The output swings of the EL5111, EL5211, and EL5411
typically extend to within 100mV of positive and negative
supply rails with load currents of 5mA. Decreasing load
currents will extend the output voltage range even closer to
the supply rails. Figure 27 shows the input and output
waveforms for the device in the unity-gain configuration.
Operation is from ±5V supply with a 1kΩ load connected to
GND. The input is a 10VP-P sinusoid. The output voltage is
approximately 9.8VP-P.
VS = ±5V, TA = 25°C, AV = 1, VIN = 10VP-P
5V
10µs
VS = ±2.5V, TA = 25°C, AV = 1, VIN = 6VP-P
1V
10µs
1V
FIGURE 28. OPERATION WITH BEYOND-THE-RAILS INPUT
Power Dissipation
With the high-output drive capability of the EL5111, EL5211,
and EL5411 amplifiers, it is possible to exceed the 125°C
'absolute-maximum junction temperature' under certain load
current conditions. Therefore, it is important to calculate the
maximum junction temperature for the application to
determine if load conditions need to be modified for the
amplifier to remain in the safe operating area.
INPUT
5V
T JMAX – T AMAX
P DMAX = -------------------------------------------Θ JA
OUTPUT
The maximum power dissipation allowed in a package is
determined according to:
where:
FIGURE 27. OPERATION WITH RAIL-TO-RAIL INPUT AND
OUTPUT
Short Circuit Current Limit
• TJMAX = Maximum junction temperature
• TAMAX = Maximum ambient temperature
• ΘJA = Thermal resistance of the package
• PDMAX = Maximum power dissipation in the package
The EL5111, EL5211, and EL5411 will limit the short circuit
current to ±180mA if the output is directly shorted to the
positive or the negative supply. If an output is shorted
11
FN7119.4
The maximum power dissipation actually produced by an IC
is the total quiescent supply current times the total power
supply voltage, plus the power in the IC due to the loads, or:
JEDEC JESD51-7 HIGH EFFECTIVE THERMAL
CONDUCTIVITY (4-LAYER) TEST BOARD HTSSOP EXPOSED DIEPAD SOLDERED TO
PCB PER JESD51-5
3.5
POWER DISSIPATION (W)
P DMAX = Σi [ V S × I SMAX + ( V S + – V OUT i ) × I LOAD i ]
when sourcing, and:
P DMAX = Σi [ V S × I SMAX + ( V OUT i – V S - ) × I LOAD i ]
when sinking,
where:
• i = 1 to 2 for dual and 1 to 4 for quad
3
HTSSOP14
θJA=38°C/W
2
1.5
1
0.5
0
• VS = Total supply voltage
2.632W
2.5
0
25
50
75 85
100
125
AMBIENT TEMPERATURE (°C)
• ISMAX = Maximum supply current per amplifier
• VOUTi = Maximum output voltage of the application
FIGURE 30. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
• ILOADi = Load current
Unused Amplifiers
If we set the two PDMAX equations equal to each other, we
can solve for RLOADi to avoid device overheat. Figures 29,
30, and 31 provide a convenient way to see if the device will
overheat. The maximum safe power dissipation can be
found graphically, based on the package type and the
ambient temperature. By using the previous equation, it is a
simple matter to see if PDMAX exceeds the device's power
derating curves. To ensure proper operation, it is important
to observe the recommended derating curves shown in
Figures 29, 30 & 31.
It is recommended that any unused amplifiers in a dual and
a quad package be configured as a unity gain follower. The
inverting input should be directly connected to the output
and the non-inverting input tied to the ground plane.
0.9
JEDEC JESD51-3 LOW EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD
POWER DISSIPATION (W)
0.8
694mW
0.7
HTSSOP14
θJA=144°C/W
0.6
0.5
0.4
0.3
Power Supply Bypassing and Printed Circuit
Board Layout
The EL5111, EL5211, and EL5411 can provide gain at high
frequency. As with any high-frequency device, good printed
circuit board layout is necessary for optimum performance.
Ground plane construction is highly recommended, lead
lengths should be as short as possible and the power supply
pins must be well bypassed to reduce the risk of oscillation.
For normal single supply operation, where the VS- pin is
connected to ground, a 0.1µF ceramic capacitor should be
placed from VS+ to pin to VS- pin. A 4.7µF tantalum
capacitor should then be connected in parallel, placed in the
region of the amplifier. One 4.7µF capacitor may be used for
multiple devices. This same capacitor combination should be
placed at each supply pin to ground if split supplies are to be
used.
0.2
0.1
0
0
25
50
75 85
100
125
AMBIENT TEMPERATURE (°C)
FIGURE 29. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
12
FN7119.4
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