ALSC ASM708EPAF Low power up supervisor circuit Datasheet

ASM705 / 706 / 707 / 708
ASM813L
February 2005
rev 1.5
Low Power µP Supervisor Circuits
General Description
Features
•
Precision power supply monitor
The ASM705 / 706 / 707 / 708 and AS813L are cost effective
•4.65V threshold (ASM705/707/813L)
CMOS supervisor circuits that monitors power-supply and
•4.40V threshold (ASM706/708)
battery voltage level, and µP/µC operation.
•
Debounced manual reset input
•
Voltage monitor
The family offers several functional options. Each device
•1.25V threshold
generates a reset signal during power-up, power-down and
•Battery monitor / Auxiliary supply monitor
during brownout conditions. A reset is generated when the
•
Watchdog timer (ASM705/706/813L)
supply drops below 4.65V (ASM705/707/813L) or 4.40V
•
200ms reset pulse width
(ASM706/708). For 3V power supply applications, refer to the
•
Active HIGH reset output (ASM707/708/813L)
ASM705P/R/S/T data sheet. In addition, the ASM705/706/813L
•
MicroSO package
feature a 1.6 second watchdog timer. The ASM707/708 have
both active-HIGH and active-LOW reset outputs but no
watchdog function. The ASM813L has the same pin-out and
functions as the ASM705 but has an active-HIGH reset output.
A versatile power-fail circuit has a 1.25V threshold, useful in low
battery detection and for monitoring non-5V supplies. All
devices have a manual reset (MR) input. The watchdog timer
output will trigger a reset if connected to MR.
Applications
•
Computers and embedded controllers
•
Portable/Battery-operated systems
•
Intelligent instruments
•
Wireless communication systems
•
PDAs and hend-held equipment
•
Automative Systems
•
Safety Systems
All devices are available in 8-pin DIP, SO and MicroSO
packages.
Typical Operating Circuit
Unregulated DC
+5V Regulator
VCC
R1
VCC
RESET
(RESET)
PFI
R2
ASM705 WDI
ASM706
(ASM813L) WDO
µP
RESET
(RESET)
I/O LINE
NMI
MR
PFO
INTERRUPT
Alliance Semiconductor
2575 Augustine Drive . Santa Clara, CA 95054 . Tel: 408.855.4900 . Fax: 408.855.4999 . www.alsc.com
Notice: The information in this document is subject to change without notice
ASM705 / 706 / 707 / 708
ASM813L
February 2005
rev 1.5
Block Diagrams
Transition
Detector
WDI
Watchdog
Timer
WDO
RESET
VCC
VCC
Timebase
0.25mA
MR
0.25mA
RESET
Generator
RESET
(RESET) ASM813L
+
VCC
RESET
Generator
+
4.65V (ASM705/813L)
4.40V (ASM706)
PFI
+
PFO
-
1.25V
4.65V (ASM707)
4.40V (ASM708)
PFI
+
ASM705
ASM706
ASM813L
RESET
+
VCC
+
MR
ASM707
ASM708
PFO
-
1.25V
GND
GND
Pin Configuration
MicroSO
DIP/SO
MR
1
8 RESET
VCC
2
ASM707
7 RESET
GND 3
ASM708
6
NC
5
PFO
PFI
4
MR
1
RESET
8
NC
VCC
2
RESET 2
ASM707
7
PFO
MR 3
ASM708
6
PFI
5
GND
8 WDO
ASM705
7 RESET (RESET)
ASM706
GND 3 (ASM813L) 6 WDI
5 PFO
PFI 4
1
VCC 4
RESET (RESET)
Low Power µP Supervisor Circuits
Notice: The information in this document is subject to change without notice
WDO
1
2
ASM705
8
WDI
7
PFO
ASM706
MR 3 (ASM813L) 6
VCC 4
5
PFI
GND
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ASM705 / 706 / 707 / 708
ASM813L
February 2005
rev 1.5
Pin Description
Pin Number
ASM705/706
DIP/
SO
MicroSO
ASM707/708
DIP/
SO
ASM813L
MicroSO
DIP/
SO
Name
Function
MicroSO
1
3
1
3
1
3
MR
Manual reset input. The active LOW input triggers a reset
pulse. A 250 µA pull-up current allows the pin to be
driven by TTL/CMOS logic or shorted to ground with a
switch.
2
4
2
4
2
4
VCC
+5V power supply input.
3
5
3
5
3
5
GND
Ground reference for all signals.
4
6
4
6
4
6
PFI
Power-fail input voltage monitor. With PFI less than
1.25V, PFO goes LOW. Connect PFI to Ground or VCC
when not in use.
5
7
5
7
5
7
PFO
Power-fail output. The output is active LOW and sinks
current when PFI is less than 1.25V.
6
8
-
-
6
8
WDI
Watchdog input. WDI controls the internal watchdog
timer. A HIGH or LOW signal for 1.6sec at WDI allows
the internal timer to run-out, setting WDO LOW. The
watchdog function is disabled by floating WDI or by connecting WDI to a high impedance three-state buffer. The
internal watchdog timer clears when: RESET is asserted;
WDI is three-stated ; or WDI sees a rising or falling edge.
-
-
6
8
-
-
NC
Not Connected
7
1
7
1
-
-
RESET
Active LOW reset output. Pulses LOW for 200ms when
triggered, and stays LOW whenever VCC is below the
reset threshold. RESET remains LOW for 200ms after
VCC rises above the reset threshold or MR goes from
LOW to HIGH. A watchdog timeout will not trigger
RESET unless WDO is connected to MR.
Watchdog output. WDO goes LOW when the 1.6 second
internal watchdog timer times-out and does not go HIGH
until the watchdog is cleared. In addition, when VCC falls
below the reset threshold, WDO goes LOW. Unlike
RESET, WDO does not have a minimum pulse width and
as soon as VCC exceeds the reset threshold, WDO goes
HIGH with no delay.
8
2
-
-
8
2
WDO
-
-
8
2
7
1
RESET
Active HIGH reset output. The inverse of RESET. The
ASM813L only has a RESET output.
Low Power µP Supervisor Circuits
Notice: The information in this document is subject to change without notice
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ASM705 / 706 / 707 / 708
ASM813L
February 2005
rev 1.5
Detailed Description
A
proper
reset
input
VRT
enables
a
microprocessor
/
microcontroller to start in a known state. ASM70X and
5V
VCC
tRS
0V
ASM813L assert reset to prevent code execution errors
tRS
5V
during power-up, power-down and brown-out conditions.
RESET
0V
RESET/RESET Timing
The RESET/RESET signals are designed to start a µP/µC in
a known state or return the system to a known state.
5V
MR
0V
The ASM707/708 have two reset outputs, one active-HIGH
RESET and one active-LOW RESET output. The ASM813L
MR externally
set low
5V
tMD
tMR
WDO
0V
has only an active-HIGH output. RESET is simply the
complement of RESET.
Figure 1: WDI Three-state operation
RESET is guaranteed to be LOW with VCC above 1.2V.
During a power-up sequence, RESET remains low until the
supply rises above the threshold level, either 4.65V or 4.40V.
RESET goes high approximately 200ms after crossing the
threshold.
Manual Reset (MR)
The active-LOW manual reset input is pulled high by a 250µA
pull-up current and can be driven low by CMOS/TTL logic or
a mechanical switch to ground. An external debounce circuit
During power-down, RESET goes LOW as VCC falls below
the threshold level and is guaranteed to be under 0.4V with
VCC above 1.2V.
is unnecessary since the 140ms minimum reset time will
debounce mechanical pushbutton switches.
By connecting the watchdog output (WDO) and MR, a
watchdog timeout forces RESET to be generated. The
In a brownout situation where VCC falls below the threshold
ASM813L should be used when an active-HIGH RESET is
level, RESET pulses low. If a brown-out occurs during an
required.
already initiated reset, the pulse will continue for a minimum
of 140ms.
Watchdog Timer
The watchdog timer available on the ASM705/706/813L
Power Failure Detection With Auxiliary Comparator
monitors µP/µC activity. An output line on the processor is
All devices have an auxiliary comparator with 1.25V trip point
used to toggle the WDI line. If this line is not toggled within
and uncommitted output (PFO) and noninverting input (PFI).
1.6 seconds, the internal timer puts the watchdog output,
This comparator can be used as a supply voltage monitor
WDO, into a LOW state. WDO will remain LOW until a toggle
with an external resistor voltage divider. The attenuated
is detected at WDI.
voltage at PFI should be set just below the 1.25 threshold. As
the supply level falls, PFI is reduced causing the PFO output
If WDI is floated or connected to a three-stated circuit, the
to transit LOW. Normally PFO interrupts the processor so the
watchdog function is disabled, meaning, it is cleared and not
system can be shut down in a controlled manner.
counting. The watchdog timer is also disabled if RESET is
asserted. When RESET becomes inactive and the WDI input
sees a high or low transition as short as 50ns, the watchdog
timer will begin a 1.6 second countdown. Additional
Low Power µP Supervisor Circuits
Notice: The information in this document is subject to change without notice
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ASM705 / 706 / 707 / 708
ASM813L
February 2005
rev 1.5
transitions at WDI will reset the watchdog timer and initiate a
BUF
new countdown sequence.
Buffered
RESET
WDO will also become LOW and remain so, whenever the
VCC
supply voltage, VCC , falls below the device threshold level.
WDO goes HIGH as soon as VCC transitions above the
threshold. There is no minimum pulse width for WDO as
there is for the RESET outputs. If WDI is floated, WDO
Supply Voltage
ASM70x
µC or µP
4.7kΩ
essentially acts as a low-power output indicator.
RESET
Input
RESET
GND
WDI
GND
Bi-directional I/O Pin
Figure 3: Bi-directional Reset Pin Interfacing
Monitoring Voltages Other Than VCC
WDO
The ASM705-708 can monitor voltages other than VCC using
the Power Fail circuitry. If a resistive divider is connected
from the voltage to be monitored to the Power Fail input
RESET
(PFI), the PFO will go LOW if the voltage at PFI goes below
1.25V reference. Should hysteresis be desired, connect a
resistor (equal to approximately 10 times the sum of the two
resistors in the divider) between the PFI and PFO pins. A
RESET
capacitor between PFI and GND will reduce circuit sensitivity
to input high-frequency noise. If it is desired to assert a
Figure 2: Watchdog Timing
RESET for voltages other than VCC then the PFO output is to
be connected to the MR.
Application Information
VIN
Ensuring That RESET is Valid Down to VCC = 0V
+5V
When VCC falls below 1.1V, the ASM705-708 RESET output
no longer pulls down; it becomes indeterminate. To avoid the
possibility that stray charges build up and force RESET to the
VCC
R1
MR
wrong state, a pull-down resistor should be connected to the
ASM70x
RESET pin, thus draining such charges to ground and
PFO
PFI
holding RESET low. The resistor value is not critical. A 100kΩ
resistor will pull RESET to ground without loading it.
R2
GND
To µP
RESET
Bi-directional Reset Pin Interfacing
The ASM705/6/7/8 can interface with µP/µC bi-directional
reset pins by connecting a 4.7kΩ resistor in series with the
RESET output and the µP/µC bi-directional RESET pin.
Figure 4: Monitoring +5V and an additional supply VIN
Low Power µP Supervisor Circuits
Notice: The information in this document is subject to change without notice
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ASM705 / 706 / 707 / 708
ASM813L
February 2005
rev 1.5
Monitoring a Negative Voltage
The Power-Fail circuitry can also monitor a negative supply
rail. When the negative rail is OK, PFO will be LOW, and
VCC
+
when the negative rail is failing (not negative enough), PFO
goes HIGH (the opposite of when positive voltages are
monitored). To trigger a reset, these outputs need to be
R1
R3
VCC
inverted: adding the resistors and transistor as shown
MR
achieves this. The RESET output will then have the same
R4
sense as for positive voltages: good = HIGH, bad = LOW. It
should be noted that this circuit’s accuracy depends on the
VCC line, the PFI threshold tolerance, and the resistors.
ASM70x
2N3904
PFO
PFI
R2
GND
RESET
To µP
VCC - 1.25
Negative Input Voltage
R1
=
1.25 - VTRIP
R2
Figure 5: Monitoring a negative voltage
Low Power µP Supervisor Circuits
Notice: The information in this document is subject to change without notice
6 of 16
ASM705 / 706 / 707 / 708
ASM813L
February 2005
rev 1.5
Absolute Maximum Ratings
Parameter
Min
Max
Unit
VCC
-0.3
6.0
V
All other inputs 1
-0.3
VCC + 0.3
V
20
mA
Output Current: All outputs
20
mA
Rate of Rise at VCC
100
V/µs
Plastic DIP Power Dissipation
(Derate 9mW/°C above 70°C)
700
mV
SO Power Dissipation
(Derate 5.9mW/°C above 70°C)
470
mW‘
MicroSO Power Dissipation
(Derate 4.1mW/°C above 70°C)
330
mW
Pin Terminal Voltage with Respect to Ground
Input Current at VCC and GND
Operating Temperature Range
ASM705E/706E/707E/708E/813LE
-40
+85
°C
ASM705C/706C/707C/708C/813LC
0
70
°C
-65
160
°C
300
°C
2
200
KV
V
Storage Temperature Range
Lead Temperature (Soldering 10sec)
ESD rating
HBM
MM
Note:
1. The input voltage limits of PFI and MR can be exceeded if the input current is less than 10mA.
These are stress ratings only and functional operation is not implied. Exposure to absolute maximum ratings for prolonged time periods may affect device reliability.
Low Power µP Supervisor Circuits
Notice: The information in this document is subject to change without notice
7 of 16
ASM705 / 706 / 707 / 708
ASM813L
February 2005
rev 1.5
Electrical Characteristics
Unless otherwise noted, specifications are over the operating temperature range and VCC supply voltages are 2.7V to 5.5V (ASM706P,
ASM708R), 3.0 V to 5.5V (ASM706/708S), 3.15V to 5.5V (ASM706/708T) and 4.1V to 5.5.V (ASM706/708J)
Parameter
Operating Voltage
Range
Supply Current
RESET Threshold
Symbol
VCC
Conditions
Min
Typ
ASM705/6/7/8C
1.2
5.5
ASM813L
1.1
5.5
ASM705/6/7/8E, ASM813E
1.2
5.5
ASM705/706C/813LC
75
140
ASM705E/706E/813LE
75
140
ASM707C/708C
50
140
ASM707E/708E
50
140
ICC
ASM705/707/813L, Note 1
4.50
4.65
4.75
ASM706/708 Note 1
4.25
4.40
4.50
VRT
RESET Threshold
Hysteresis
Note 1
RESET Pulse Width
tRS
MR Pulse Width
tMR
MR to RESET Out
Delay
tMD
Note 1
140
200
V
µA
V
ms
µs
0.25
Note 1
2.0
0.8
VIL
µs
V
600
µA
ISINK = 3.2mA
0.4
V
ASM705/6/7/8, VCC = 1.2V, ISINK = 100µA
0.3
MR = 0V
ISOURCE = 800µA
RESET Output Voltage
280
0.15
VIH
Unit
mV
40
MR Input Threshold
MR Pullup current
Max
ASM707/8/813L, ISOURCE = 800µA
100
250
VCC - 1.5
VCC-1.5
ASM707/8, ISINK = 1.2mA
0.4
ASM813L, ISINK =3.2mA
0.4
RESET Output Voltage
ASM813L, VCC = 1.2V, ISOURCE = 4µA
V
0.9
Low Power µP Supervisor Circuits
Notice: The information in this document is subject to change without notice
8 of 16
ASM705 / 706 / 707 / 708
ASM813L
February 2005
rev 1.5
Parameter
Symbol
Conditions
Watchdog Timeout
Period
tWD
ASM705/6/813L
WDI Pulse Width
tWP
VIL = 0.4V, VIH=0.8VCC,
VIH
Min
Typ
Max
Unit
1.00
1.60
2.25
s
ns
50
3.5
ASM705/706/813L, VCC = 5V
WDI Input Threshold
0.8
VIL
ASM705/6/813L, WDI = VCC
50
150
WDI Input Current
ASM705/6/813L, WDI = 0V
VOH
ASM705/6/813L, ISOURCE = 800µA
VOL
ASM705/6/813L, ISINK = 1.2mA
-150
VCC = 5V
PFI Input Current
VOH
ISOURCE = 800µA
VOL
ISINK = 3.2mA
µA
-50
VCC - 1.5
WDO Output Voltage
PFI Input Threshold
V
0.4
V
1.2
1.25
1.3
V
-25
0.01
25
nA
VCC - 1.5
PFO Output Voltage
0.4
V
Notes 1: RESET (ASM705/6/7/8), RESET(ASM707/8, ASM813L)
Low Power µP Supervisor Circuits
Notice: The information in this document is subject to change without notice
9 of 16
ASM705 / 706 / 707 / 708
ASM813L
February 2005
rev 1.5
Package Dimensions
8-Pin MicroSO
D
E1
E
S
A2
A
a
C
0.10mm
0.004in
e
Inches
A1
b
L
Millimeteres
Min
Max
Min
Max
A
0.032
0.044
0.81
1.10
A1
0.002
0.006
0.05
0.15
A2
0.030
0.038
0.76
0.97
b
0.012 BSC
0.30 BSC
C
0.004
0.008
0.10
0.20
D
0.114
0.122
2.90
3.10
e
0.0256 BSC
0.65 BSC
E
0.184
0.200
4.67
5.08
E1
0.114
0.122
2.90
3.10
L
0.016
0.026
0.41
0.66
S
a
0.0206 BSC
0°
6°
0.52 BSC
0°
6°
Low Power µP Supervisor Circuits
Notice: The information in this document is subject to change without notice
10 of 16
ASM705 / 706 / 707 / 708
ASM813L
February 2005
rev 1.5
Package Dimensions (contd)
Plastic DIP (8-Pin)
Symbol
Dimensions
Inches
Millimeters
Min
Max
A
Min
Max
0.210
5.33
A1
0.015
A2
0.115
0.195
2.92
4.95
b
0.014
0.022
0.36
0.56
b2
0.045
0.070
1.14
1.78
C
0.008
0.014
0.20
0.36
D
0.355
0.400
9.02
10.16
E
0.300
0.325
7.62
8.26
E1
0.240
0.280
6.10
7.11
e
0.10 BSC
eB
L
0.38
2.54 BSC
0.430
0.115
0.150
10.92
2.92
3.81
Low Power µP Supervisor Circuits
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ASM705 / 706 / 707 / 708
ASM813L
February 2005
rev 1.5
Package Dimensions (contd)
SO (8-Pin)
H
E
D
A2
A
C
A1
D
θ
e
L
B
Symbol
Dimensions
Inches
Millimeters
Min
Max
Min
Max
A1
0.004
0.010
0.10
0.25
A
0.053
0.069
1.35
1.75
A2
0.049
0.059
1.25
1.50
B
0.012
0.020
0.31
0.51
C
0.007
0.010
0.18
0.25
D
0.193 BSC
4.90 BSC
E
0.154 BSC
3.91 BSC
e
0.050 BSC
1.27 BSC
H
0.236 BSC
6.00 BSC
L
0.016
0.050
0.41
1.27
θ
0°
8°
0°
8°
Low Power µP Supervisor Circuits
Notice: The information in this document is subject to change without notice
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ASM705 / 706 / 707 / 708
ASM813L
February 2005
rev 1.5
Ordering Codes
Part Number
Reset Threshold
Temperature
Pins-Package
Package Marking
TIN - LEAD DEVICES
ASM705 Active LOW Reset, Watchdog Output And Manual RESET
ASM705CPA
4.65
0°C to +70 °C
8-Plastic DIP
ASM705CPA
ASM705CSA
4.65
0°C to +70 °C
8-SO
ASM705CSA
ASM705CUA
4.65
0°C to +70 °C
8-MicroSO
ASM705CUA
ASM705EPA
4.65
-40°C to +85°C
8-Plastic DIP
ASM705EPA
ASM705ESA
4.65
-40°C to +85°C
8-SO
ASM705ESA
ASM705EUA
4.65
-40°C to +85°C
8-MicroSO
ASM705EUA
ASM706 Active LOW Reset, Watchdog Output And Manual RESET
ASM706CPA
4.40
0°C to +70 °C
8-Plastic DIP
ASM706CPA
ASM706CSA
4.40
0°C to +70 °C
8-SO
ASM706CSA
ASM706CUA
4.40
0°C to +70 °C
8-MicroSO
ASM706CUA
ASM706EPA
4.40
-40°C to +85°C
8-Plastic DIP
ASM706EPA
ASM706ESA
4.40
-40°C to +85°C
8-SO
ASM706ESA
ASM707 Active LOW & HIGH Reset with Manual RESET
ASM707CPA
4.65
0°C to +70 °C
8-Plastic DIP
ASM707CPA
ASM707CSA
4.65
0°C to +70 °C
8-SO
ASM707CSA
ASM707CUA
4.65
0°C to +70 °C
8-MicroSO
ASM707CUA
ASM707EPA
4.65
-40°C to +85°C
8-Plastic DIP
ASM707EPA
ASM707ESA
4.65
-40°C to +85°C
8-SO
ASM707ESA
ASM708Active LOW & HIGH Reset with Manual RESET
ASM708CPA
4.40
0°C to +70 °C
8-Plastic DIP
ASM708CPA
ASM708CSA
4.40
0°C to +70 °C
8-SO
ASM708CSA
ASM708CUA
4.40
0°C to +70 °C
8-MicroSO
ASM708CUA
ASM708EPA
4.40
-40°C to +85°C
8-Plastic DIP
ASM708EPA
ASM708ESA
4.40
-40°C to +85°C
8-SO
ASM708ESA
ASM813L Active HIGH Reset, Watchdog Output And Manual RESET
ASM813LCPA
4.65
0°C to +70 °C
8-Plastic DIP
ASM813LCPA
ASM813LCSA
4.65
0°C to +70 °C
8-SO
ASM813LCSA
ASM813LCUA
4.65
0°C to +70 °C
8-MicroSO
ASM813LCUA
ASM813LEPA
4.65
-40°C to +85°C
8-Plastic DIP
ASM813LEPA
ASM813LESA
4.65
-40°C to +85°C
8-SO
ASM813LESA
Low Power µP Supervisor Circuits
Notice: The information in this document is subject to change without notice
13 of 16
ASM705 / 706 / 707 / 708
ASM813L
February 2005
rev 1.5
Ordering Codes
Part Number
Reset Threshold
Temperature Range
Pins-Package
Package Marking
LEAD FREE DEVICES
ASM705 Active LOW Reset, Watchdog Output And Manual RESET
ASM705CPAF
4.65
0°C to +70 °C
8-Plastic DIP
ASM705CPAF
ASM705CSAF
4.65
0°C to +70 °C
8-SO
ASM705CSAF
ASM705CUAF
4.65
0°C to +70 °C
8-MicroSO
ASM705CUAF
ASM705EPAF
4.65
-40°C to +85°C
8-Plastic DIP
ASM705EPAF
ASM705ESAF
4.65
-40°C to +85°C
8-SO
ASM705ESAF
ASM705EUAF
4.65
-40°C to +85°C
8-MicroSO
ASM705EUAF
ASM706 Active LOW Reset, Watchdog Output And Manual RESET
ASM706CPAF
4.40
0°C to +70 °C
8-Plastic DIP
ASM706CPAF
ASM706CSAF
4.40
0°C to +70 °C
8-SO
ASM706CSAF
ASM706CUAF
4.40
0°C to +70 °C
8-MicroSO
ASM706CUAF
ASM706EPAF
4.40
-40°C to +85°C
8-Plastic DIP
ASM706EPAF
ASM706ESAF
4.40
-40°C to +85°C
8-SO
ASM706ESAF
ASM707 Active LOW & HIGH Reset with Manual RESET
ASM707CPAF
4.65
0°C to +70 °C
8-Plastic DIP
ASM707CPAF
ASM707CSAF
4.65
0°C to +70 °C
8-SO
ASM707CSAF
ASM707CUAF
4.65
0°C to +70 °C
8-MicroSO
ASM707CUAF
ASM707EPAF
4.65
-40°C to +85°C
8-Plastic DIP
ASM707EPAF
ASM707ESAF
4.65
-40°C to +85°C
8-SO
ASM707ESAF
ASM708Active LOW & HIGH Reset with Manual RESET
ASM708CPAF
4.40
0°C to +70 °C
8-Plastic DIP
ASM708CPAF
ASM708CSAF
4.40
0°C to +70 °C
8-SO
ASM708CSAF
ASM708CUAF
4.40
0°C to +70 °C
8-MicroSO
ASM708CUAF
ASM708EPAF
4.40
-40°C to +85°C
8-Plastic DIP
ASM708EPAF
ASM708ESAF
4.40
-40°C to +85°C
8-SO
ASM708ESAF
ASM813L Active HIGH Reset, Watchdog Output And Manual RESET
ASM813LCPAF
4.65
0°C to +70 °C
8-Plastic DIP
ASM813LCPAF
ASM813LCSAF
4.65
0°C to +70 °C
8-SO
ASM813LCSAF
ASM813LCUAF
4.65
0°C to +70 °C
8-MicroSO
ASM813LCUAF
ASM813LEPAF
4.65
-40°C to +85°C
8-Plastic DIP
ASM813LEPAF
ASM813LESAF
4.65
-40°C to +85°C
8-SO
ASM813LESAF
Note:
For parts to be packed in Tape and Reel, add “-T” at the end of the part number.
Low Power µP Supervisor Circuits
Notice: The information in this document is subject to change without notice
14 of 16
ASM705 / 706 / 707 / 708
ASM813L
February 2005
rev 1.5
Feature Summary
ASM705
ASM706
ASM707
ASM708
ASM813L
Power fail detector
‹
‹
‹
‹
‹
Brownout detection
‹
‹
‹
‹
‹
Manual RESET input
‹
‹
‹
‹
‹
Power-up/down RESET
‹
‹
‹
‹
‹
Watchdog Timer
‹
‹
Active HIGH RESET output
Active LOW RESET output
RESET Threshold (V)
‹
‹
‹
‹
‹
‹
‹
4.65
4.40
4.65
4.40
‹
4.65
Low Power µP Supervisor Circuits
Notice: The information in this document is subject to change without notice
15 of 16
ASM705 / 706 / 707 / 708
ASM813L
Alliance Semiconductor Corporation
2575, Augustine Drive,
Santa Clara, CA 95054
Tel: 408 - 855 - 4900
Fax: 408 - 855 - 4999
www.alsc.com
Copyright © Alliance Semiconductor
All Rights Reserved
Part Number:ASM705 / 706 / 707 / 708
ASM813L
Document Version: 1.5
© Copyright 2003 Alliance Semiconductor Corporation. All rights reserved. Our three-point logo, our name and Intelliwatt are trademarks or
registered trademarks of Alliance. All other brand and product names may be the trademarks of their respective companies. Alliance reserves the
right to make changes to this document and its products at any time without notice. Alliance assumes no responsibility for any errors that may
appear in this document. The data contained herein represents Alliance's best data and/or estimates at the time of issuance. Alliance reserves the
right to change or correct this data at any time, without notice. If the product described herein is under development, significant changes to these
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users, and is not intended to operate as, or provide, any guarantee or warrantee to any user or customer. Alliance does not assume any responsibility
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