AVAGO AFBR-53D3EZ Rohs compliant 850 nm vcsel 1x9 fiber optic transceivers for fibre channel Datasheet

AFBR-53D3Z, AFBR-53D3EZ, AFBR-53D3FZ
RoHS Compliant 850 nm VCSEL 1x9 Fiber Optic Transceivers
for Fibre Channel
Data Sheet
Description
Features
The AFBR-53D3xZ transceiver family from Avago Technologies allows the system designer to implement a range of
solutions for multimode and single mode Fibre Channel
applications. The overall Avago Technologies transceiver
product consists of three sections: the transmitter and
receiver optical subassemblies, an electrical subassembly,
and the package housing which incorporates a duplex SC
connector receptacle.
 AFBR-53D3 is Compliant with ANSI X3.297-1996
Fibre Channel Physical Interface FC-PH-2 Revision 7.4
Proposed Specifications for 100-M5-SN-I and 100-M6SN-I signal interfaces
Transmitter Section
The transmitter section of the AFBR-53D3 consists of an
850 nm Vertical Cavity Surface Emitting Laser (VCSEL) in
an optical subassembly (OSA), which mates to the fiber
cable. The OSA is driven by a custom, silicon bipolar IC
which converts differential PECL logic signals (ECL referenced to a +5 V supply) into an analog laser diode drive
current.
Receiver Section
 AFBR-53D3 Family Fully RoHS Compliant
 Industry Standard Mezzanine Height 1 x 9 Package
Style with Integral Duplex SC Connector
 Performance:
AFBR-53D3:
300 m over 62.5/125 m MMF
500 m over 50/125 m MMF
 IEC 60825-1 Class 1/CDRH Class I Laser Eye Safe
 Single +5 V Power Supply Operation with PECL Logic
Interfaces
 Wave Solderable
Compatible
and
Aqueous
Wash
Process
Applications
The receiver of the AFBR-53D3 includes a silicon PIN
photodiode mounted together with a custom, silicon
bipolar transimpedance preamplifier IC in an OSA. This
OSA is mated to a custom silicon bipolar circuit that
provides postamplification and quantization.
 Mass Storage Systems I/O
The post-amplifier also includes a Signal Detect circuit
which provides a PECL logic-high output upon detection
of a usable input optical signal level. This singleended
PECL output is designed to drive a standard PECL input
through a 50  PECL load.
 Host Adapter I/O
 Computer Systems I/O
 High-speed Peripheral Interface
 High-speed Switching Systems
 RAID Cabinets
Related Products
 Physical Layer ICs Available for optical or Copper
Interface (HDMP-1536A/46A)
 Versions of this Transceiver Module also available for
Gigabit ethernet (AFBR-53D5 Family)
 Gigabit Interface Converters (GBIC) for Fibre Channel
(ZX, SX, LX)
Package and Handling Instructions
Electrostatic Discharge (ESD)
Flammability
There are two design cases in which immunity to ESD
damage is important. The first case is during handling of
the transceiver prior to mounting it on the circuit board.
It is important to use normal ESD handling precautions
for ESD sensitive devices. These precautions include using
grounded wrist straps, work benches, and floor mats
in ESD controlled areas. The transceiver performance
has been shown to provide adequate performance in
typical industry production environments. The second
case to consider is static discharges to the exterior of
the equipment chassis containing the transceiver parts.
To the extent that the duplex SC connector receptacle is
exposed to the outside of the equipment chassis it may
be subject to whatever system-level ESD test criteria that
the equipment is intended to meet. The transceiver performance is more robust than typical industry equipment
requirements of today.
The AFBR-53D3 transceiver family housing is made of
high strength, heat resistant, chemically resistant, and UL
94V-0 flame retardant plastic.
Recommended Solder and Wash Process
The AFBR-53D3 transceiver family is compatible with
industry-standard wave or hand solder processes.
Process plug
This transceiver is supplied with a process plug
(HFBR-5000) for protection of the optical ports within
the duplex SC connector receptacle. This process plug
prevents contamination during wave solder and aqueous
rinse as well as during handling, shipping and storage. It is
made of a hightemperature, molded sealing material that
can withstand +80°C and a rinse pressure of 110 lbs per
square inch.
Recommended Solder fluxes
Solder fluxes used with the AFBR-53D3 should be
water-soluble, organic fluxes. Recommended solder fluxes
include Lonco 3355-11 from London Chemical West, Inc.
of Burbank, CA, and 100 Flux from Alpha-Metals of Jersey
City, NJ.
Recommended Cleaning/Degreasing Chemicals
Alcohols: methyl, isopropyl, isobutyl.
Aliphatics: hexane, heptane. Other: soap solution, naphtha.
Do not use partially halogenated hydrocarbons such
as 1,1.1 trichloroethane, ketones such as MEK, acetone,
chloroform, ethyl acetate, methylene dichloride, phenol,
methylene chloride, or N-methylpyrolldone. Also, Avago
Technologies does not recommend the use of cleaners
that use halogenated hydrocarbons because of their
potential environmental harm.
Regulatory Compliance
(See the Regulatory Compliance Table for transceiver
performance) The overall equipment design will determine
the certification level. The transceiver performance is
offered as a figure of merit to assist the designer in considering their use in equipment designs.
2
Electromagnetic Interference (EMI)
Most equipment designs utilizing these high-speed transceivers from Avago Technologies will be required to meet
the requirements of FCC in the United States, CENELEC
EN55022 (CISPR 22) in Europe and VCCI in Japan. Refer to
EMI section (page 5) for more details.
Immunity
Equipment utilizing these transceivers will be subject to
radio-frequency electromagnetic fields in some environments. These transceivers have good immunity to such
fields due to their shielded design.
Eye Safety
These laser-based transceivers are classified as AEL Class
I (U.S. 21 CFR(J) and AEL Class 1 per EN 60825-1 (+A11).
They are eye safe when used within the data sheet limits
per CDRH. They are also eye safe under normal operating
conditions and under all reasonably foreseeable single
fault conditions per EN60825-1. Avago Technologies has
tested the transceiver design for compliance with the
requirements listed below under normal operating conditions and under single fault conditions where applicable. TUV Rheinland has granted certification to these
transceivers for laser eye safety and use in EN 60950 and
EN 60825-2 applications. Their performance enables the
transceivers to be used without concern for eye safety up
to 7 V transmitter VCC.
CAUTION:
There are no user serviceable parts nor any maintenance
required for the AFBR-53D3. All adjustments are made at
the factory before shipment to our customers. Tampering
with or modifying the performance of the AFBR-53D3
will result in voided product warranty. It may also result
in improper operation of the AFBR-53D3 circuitry, and
possible overstress of the laser source. Device degradation or product failure may result. Connection of the
AFBR-53D3 to a nonapproved optical source, operating
above the recommended absolute maximum conditions
or operating the AFBR-53D3 in a manner inconsistent with
its design and function may result in hazardous radiation
exposure and may be considered an act of modifying or
manufacturing a laser product. The person(s) performing
such an act is required by law to recertify and reidentify
the laser product under the provisions of U.S. 21 CFR (Subchapter J).
Regulatory Compliance
Feature
Test Method
Performance
Electrostatic Discharge (ESD)
to the Electrical Pins
MIL-STD-883CMethod 3015.4
Class 1 (>2000V).
Electrostatic Discharge (ESD)
to the Duplex SC Receptacle
Variation of IEC 801-2
Typically withstand at least 15 kV without damage when
the duplex SC connector receptacle is contacted by a
Human Body Model probe.
Electromagnetic Interference
(EMI)
FCC Class B
CENELEC EN55022 Class B
(CISPR 22A)
VCCI Class I
Margins are dependent on customer board and chassis
designs.
Immunity
Variation of IEC 801-3
Typically show no measurable effect from a 3 V/m field
swept from 27 to 1000 MHz applied to the transceiver
without a chassis enclosure.
Laser Eye Safety and
Equipment Type Testing
US 21 CFR, Subchapter J per
Paragraphs 1002.10 and 1002.12
AEL Class I, FDA/CDRH
AFBR-53D3 Accenssion #9720151-03
EN 60825-1: 1994 +A11
EN 60825-2: 1994
EN 60950: 1992 + A1 + A2 + A3
AEL Class 1, TUV Rheinland of North America
AFBR-53D3 Certificate #E9771047.09
Protection Class III
Underwriters Laboratories and
Canadian Standards Association
Joint Component Recognition for
Information Technology Equipment
Including Electrical Business
Equipment.
UL File E173874
Component Recognition
3
APPLICATION SUPPORT
Optical Power Budget and Link Penalties
The worst-case Optical Power Budget (OPB) in dB for a
fiberoptic link is determined by the difference between
the minimum transmitter output optical power (dBm avg.)
and the lowest receiver sensitivity (dBm avg.). This OPB
provides the necessary optical signal range to establish a
working fiber-optic link. The OPB is allocated for the fiberoptic cable length and the corresponding link penalties.
For proper link performance, all penalties that affect the
link performance must be accounted for within the link
optical power budget.
Data Line Interconnections
Avago Technologies’ AFBR-53D3 fiberoptic transceiver is
designed to directly couple to +5 V PECL signals. The transmitter inputs are internally dc-coupled to the laser driver
circuit from the transmitter input pins (pins 7, 8). There
is no internal, capacitivelycoupled 50 Ohm termination
resistance within the transmitter input section. The transmitter driver circuit for the laser light source is a dc-coupled
circuit. This circuit regulates the output optical power. The
regulated light output will maintain a constant output
optical power provided the data pattern is reasonably
balanced in duty factor. If the data duty factor has long,
continuous state times (low or high data duty factor), then
the output optical power will gradually change its average
output optical power level to its preset value.
As for the receiver section, it is internally AC-coupled
between the preamplifier and the postamplifier stages.
The actual Data and Data-bar outputs of the postamplifier
are DC-coupled to their respective output pins (pins 2, 3).
Signal Detect is a single-ended, +5 V PECL output signal
that is dc-coupled to pin 4 of the module. Signal Detect
should not be accoupled externally to the follow-on
circuits because of its infrequent state changes.
Caution should be taken to account for the proper interconnection between the supporting Physical Layer integrated circuits and this AFBR-53D3 transceiver. Figure 3
illustrates a recommended interface circuit for interconnecting to a +5 V dc PECL fiber-optic transceiver.
4
Some fiber-optic transceiver suppliers’ modules include
internal capacitors, with or without 50  termination, to
couple their Data and Data-bar lines to the I/O pins of
their module. When designing to use these type of transceivers along with Avago Technologies transceivers, it is
important that the interface circuit can accommodate
either internal or external capacitive coupling with 50 
termination components for proper operation of both
transceiver designs. The internal dc-coupled design of
the AFBR-53D3 I/O connections was done to provide the
designer with the most flexibility for interfacing to various
types of circuits.
Eye Safety Circuit
For an optical transmitter device to be eye-safe in the
event of a single fault failure, the transmitter must either
maintain normal, eyesafe operation or be disabled. In the
AFBR-53D3 there are three key elements to the laser driver
safety circuitry: a monitor diode, a window detector circuit
and direct control of the laser bias. The window detection
circuit monitors the average optical power using the
monitor diode. If a fault occurs such that the transmitter
dc regulation circuit cannot maintain the preset bias conditions for the laser emitter within ±20%, the transmitter
will automatically be disabled. Once this has occurred,
only an electrical power reset will allow an attempted
turn-on of the transmitter.
Signal Detect
The Signal Detect circuit provides a deasserted output
signal that implies the link is open or the transmitter is
OFF. The Signal Detect threshold is set to transition from
a high to low state between the minimum receiver input
optional power and -30 dBm avg. input optical power
indicating a definite optical fault (e.g. unplugged connector for the receiver or transmitter, broken fiber, or failed
far-end transmitter or data source). A Signal Detect indicating a working link is functional when receiving encoded
8B/l0B characters. The Signal Detect does not detect
receiver data error or error-rate. Data errors are determined
by Signal processing following the transceiver.
Electromagnetic Interference (EMI)
One of a circuit board designer’s foremost concerns is
the control of electromagnetic emissions from electronic
equipment. Success in controlling generated Electromagnetic Interference (EMI) enables the designer to pass
a governmental agency’s EMI regulatory standard; and
more importantly, it reduces the possibility of interference to neighboring equipment. There are three options
available for the AFBR-53D3 with regard to EMI shielding
which provide the designer with a means to achieve good
EMI performance. The EMI performance of an enclosure
using these transceivers is dependent on the chassis
design. Avago Technologies encourages using standard
RF suppression practices and avoiding poorly EMI-sealed
enclosures.
The first configuration is a standard AFBR-53D3 fiber optic
transceiver that has no external EMI shield. This unit is
for applications where EMI is either not an issue for the
designer, the unit resides completely inside a shielded
enclosure, or the module is used in a low density, extremely
quiet application.
The second configuration, option EZ, is for EMI shielding
applications where the position of the transceiver module
will extend outside the equipment enclosure. The external
metal shield of the transceiver helps locally to terminate
EM fields to the chassis to prevent their emissions outside
the enclosure. This metal shield contacts the panel or
enclosure on the inside of the aperture on all but the
bottom side of the shield and provides a good RF connection to the panel. This option can accommodate various
panel or enclosure thickness, i.e., .04 in. min. to 0.10 in.
max. The reference plane for this panel thickness variation
is from the front surface of the panel or enclosure.
5
The recommended length for protruding the AFBR-53D3
EM transceiver beyond the front surface of the panel or
enclosure is 0.25 in. With this option, there is flexibility
of positioning the module to fit the specific need of the
enclosure design. (See Figure 6 for the mechanical drawing
dimensions of this shield.)
The third configuration, option FZ, is for applications that
are designed to have a flush mounting of the module
with respect to the front of the panel or enclosure. The
flush-mount design accommodates a large variety of
panel thickness, i.e., 0.04 in. min. to 0.10 in. max. Note the
reference plane for the flushmount design is the interior
side of the panel or enclosure. The recommended distance
from the centerline of the transceiver front solder posts to
the inside wall of the panel is 0.55 in. This option contacts
the inside panel or enclosure wall on all four sides of this
metal shield. See Figure 8 for the mechanical drawing
dimensions of this shield.
The two designs are comparable in their shielding
effectiveness. Both design options connect only to the
equipment chassis and not to the signal or logic ground of
the circuit board within the equipment closure. The front
panel aperture dimensions are recommended in Figures 7
and 9. When layout of the printed circuit board is done to
incorporate these metal-shielded transceivers, keep the
area on the printed circuit board directly under the metal
shield free of any components and circuit board traces.
For additional EMI performance advantage, use duplex
SC fiber-optic connectors that have low metal content
inside them. This lowers the ability of the metal fiber-optic
connectors to couple EMI out through the aperture of the
panel or enclosure.
Absolute Maximum Ratings
Stresses in excess of the absolute maximum ratings can cause catastrophic damage to the device. Limits apply to each
parameter in isolation, all other parameters having values within the recommended operating conditions. It should not
be assumed that limiting values of more than one parameter can be applied to the product at the same time. Exposure
to the absolute maximum ratings for extended periods can adversely affect device reliability.
Parameter
Symbol
Min.
Storage Temperature
TS
Supply Voltage
Typ.
Max.
Unit
Reference
-40
100
°C
VCC
-0.5
7.0
V
Data Input Voltage
VI
-0.5
VCC
V
Transmitter Differential Input Village
VD
1.6
V
Output Current
ID
50
mA
Relative Humidity
RH
5
95
%
Parameter
Symbol
Min.
Max.
Unit
Reference
Ambient Operating Temperature
TA
O
70
°C
3
Case Temperature
TC
90
°C
4
Supply Voltage
VCC
5.25
V
Power Supply Rejection
PSR
Transmitter Data Input Voltage - Low
VIL-VCC
-1.810
Transmitter Data Input Voltage - High
VIH-VCC
Transmitter Differential Input Voltage
1
2
Recommended Operating Conditions
Typ.
4.75
mVP-P
5
-1.475
V
6
-1.165
-0.880
V
6
VD
0.3
1.6
V
Data Output Load
RDL
50

7
Signal Detect Output Load
RSDL
50

7
Parameter
Symbol
Min.
Max.
Unit
Reference
Hand Lead Soldering Temperature /Time
TSOLD/tSOLD
260/10
°C/sec.
Wave Soldering and Aqueous Wash
TSOLD/tSOLD
260/10
°C/sec.
50
Process Compatibility
Typ.
8
Notes:
1. The transceiver is class 1 eye safe up to VCC = 7 V.
2. This is the maximum voltage that can be applied across the Differential Transmitter Data Inputs without damaging the input circuit.
3. 2 m/s air flow required.
4. Case temperature measurement referenced to the center-top of the internal metal transmitter shield.
5. Tested with a 50 mVP-P sinusoidal signal in the frequency range from 500 Hz to 1500 kHz on the VCC supply with the recommended power supply
filter in place. Typically less than a 0.25 dB change in sensitivity is experienced.
6. Compatible with 10 K, 10 KH, and 100 K ECL and PECL input signals.
7. The outputs are terminated to VCC -2 V.
8. Aqueous wash pressure <110 psi.
6
AFBR-53D3 Family, 850 nm VCSEL
Transmitter Electrical Characteristics
(TA = 0°C to +70°C, VCC = 4.75 V to 5.25 V)
Parameter
Symbol
Min.
Output Optical Power
50/125 m, NA = 0.20 Fiber
POUT
Output Optical Power
62.5/125 m, NA = 0.275 Fiber
POUT
Optical Extinction Ratio
Typ.
Max.
Unit
-10
-4
dBm avg.
-10
-4
dBm avg.
9
Center Wavelength
C
Spectral Width - rms
Optical Rise / Fall Time
830
dB
850
Reference
1
860
nm

0.85
nm rms
tr/tf
0.45
ns
RIN12
-116
dB/Hz
Deterministic Transmitter Jitter
188
ps
Typ.
Max.
Unit
Reference
2, 3 Fig. 1
Receiver Electrical Characteristics
(TA = 0°C to +70°C, VCC = 4.75 V to 5.25 V)
Parameter
Symbol
Min.
Supply Current
ICCR
105
130
mA
2
Power Dissipation
PDISR
0.53
0.68
W
2
Data Output Voltage - Low
VOL - VCC
-1.950
-1.620
V
3
Data Output Voltage - High
VOH - VCC
-1.045
-0.740
V
3
Data Output Rise Time
tr
0.40
ns
4
Data Output Fall Time
tf
0.40
ns
4
Signal Detect Output Voltage - Low
VOL - VCC
-1.950
-1.620
V
3
Signal Detect Output Voltage - High
VOH - VCC
-1.045
-0.740
V
3
Notes:
1. The Laser Reset Voltage is the voltage level below which the VCCT voltage must be lowered to cause the laser driver circuit to reset from an
electrical/optical shutdown condition to a proper electrical/optical operating condition. The maximum value corresponds to the worst-case
highest VCC voltage necessary to cause a reset condition to occur. The laser safety shutdown circuit will operate properly with transmitter VCC
levels of 3.5 V dc < VCC < 7.0 V dc.
2. Receiver Supply Current and Power Dissipation do not include current and power in external 270 ohm terminating resistors.
3. These outputs are compatible with 10 K, 10 KH, and 100 K ECL and PECL inputs.
4. These are 20-80% values.
7
AFBR-53D3 Family, 850 nm VCSEL
Transmitter Optical Characteristics
(TA = 0°C to +70°C, VCC = 4.75 V to 5.25 V)
Parameter
Symbol
Min.
Output Optical Power
50/125 m, NA = 0.20 Fiber
POUT
Output Optical Power
62.5/125 m, NA = 0.275 Fiber
POUT
Optical Extinction Ratio
Typ.
Max.
Unit
-10
-4
dBm avg.
-10
-4
dBm avg.
9
Center Wavelength
C
Spectral Width - rms
Optical Rise / Fall Time
830
dB
850
Reference
1
860
nm

0.85
nm rms
tr/tf
0.45
ns
RIN12
-116
dB/Hz
Deterministic Transmitter Jitter
188
ps
Max.
Unit
Reference
4
2, 3 Fig. 1
Receiver Optical Characteristics
(TA = 0°C to +70°C, VCC = 4.75 V to 5.25 V)
Parameter
Symbol
Min.
Input Optical Power
PIN
-16
0
dBm avg.
Operating Center Wavelength
C
770
860
nm
Return Loss
Typ.
12
dB
-18
5
dBm avg.
Signal Detect - Asserted
PA
Signal Detect - Deasserted
PD
-30
dBm avg.
Signal Detect - Hysteresis
PA - PD
1.5
dB
Notes:
1. Optical Extinction Ratio is defined as the ratio of the average output optical power of the transmitter in the high (“1”) state to the low (“0”) state.
This Optical Extinction Ratio is expressed in decibels (dB) by the relationship 10log(Phigh avg/Plow avg).
2. These are 20-80% values and include the effect of a fourth order filter.
3. Laser transmitter pulse response characteristics are specified by an eye diagram (Figure 1). The characteristics include rise time, fall time, pulse
overshoot, pulse undershoot, and ringing, all of which are controlled to prevent excessive degradation of the receiver sensitivity.
4. The receive sensitivity is measured using a worst case extinction ratio penalty while sampling at the center of the eye.
5. Return loss is defined as the minimum attenuation (dB) of received optical power for energy reflected back into the optical fiber.
NORMALIZED AMPLITUDE
1.3
1.0
0.8
0.5
0.2
0
-0.2
0
0.15
0.375
0.625
NORMALIZED TIME
Figure 1. Transmitter Optical Eye Diagram Mask
8
0.85
1.0
Table 1. Pinout Table
Pin
Symbol
Functional Description
Mounting Pins
The mounting pins are provided for transceiver mechanical attachment to the circuit board. They are
embedded in the nonconductive plastic housing and are not connected to the transceiver internal
circuit, nor is there a guaranteed connection to the metallized housing in the EZ and FZ versions. They
should be soldered into plated-through holes on the printed circuit board.
1
VEER
Receiver Signal Ground
Directly connect this pin to receiver signal ground plane. (For AFBR-53D3, VEER = VEET )
2
RD+
Receiver Data Out
RD+ is an open-emitter output circuit. Terminate this high-speed differential PECL output with standard
PECL techniques at the follow-on device input pin.
3
RD-
Receiver Data Out Bar
RD- is an open-emitter output circuit. Terminate this high-speed differential PECL output with standard
PECL techniques at the follow-on device input pin.
4
SD
Signal Detect
Normal optical input levels to the receiver result in a logic “1” output, VOH, asserted. Low input optical
levels to the receiver result in a fault condition indicated by a logic “0” output VOH, deasserted.
Signal Detect is a single-ended PECL output. SD can be terminated with standard PECL techniques
via 50  to VCCR - 2V. Alternatively, SD can be loaded with a 270 resistor to VEER to conserve
electrical power with small compromise to signal quality. If Signal Detect output is not used,
leave it open-circuited.
This Signal Detect output can be used to drive a PECL input on an upstream circuit, such as,
Signal Detect input pr Loss of Signal-bar.
5
VCCR
Receiver Power Supply
Provide +5 Vdc via the recommended receiver power supply filter circuit.
Locate the power supply filter circuit as close as possible to the VCCR pin.
6
VCCT
Transmitter Power Supply
Provide +5 Vdc via the recommended transmitter power supply filter circuit.
Locate the power supply filter circuit as close as possible to the VCCT pin.
7
TD-
Transmitter Data In-Bar
Terminate this high-speed differential PECL input with standard PECL techniques at the transmitter
input pin.
8
TD+
Transmitter Data In
Terminate this high-speed differential PECL input with standard PECL techniques at the transmitter
input pin.
9
VEET
Transmitter Signal Ground
Directly connect this pin to the transmitter signal ground plane.
1 = VEER
NIC
2 = RD+
RX
3 = RD–
4 = SD
5 = VCCR
6 = VCCT
7 = TD–
8 = TD+
TX
NIC
9 = VEET
TOP VIEW
NIC = NO INTERNAL CONNECTION (MOUNTING PINS)
Figure 2. Pin-Out
9
3.3 V dc
+
VEET
C5
0.1 µF
9
R3
68
R2
68
VCC2 VEE2
8
C9
0.01 µF
PECL
INPUT
OUTPUT
DRIVER
TD- 7
R4
191
VCCT
AFBR-53D3
FIBER-OPTIC
TRANSCEIVER
0.01 µF
R13
150
R1
191
C2
PARALLEL
TO SERIAL
CIRCUIT
5
C1
+ C8*
L1
C3
+ C4
1 µH
0.1
µF
10
µF
10 µF*
SD 4
TO SIGNAL DETECT (SD)
INPUT AT UPPER-LEVEL-IC
R9
270
RD- 3
HDMP-1536A/-1546A
SERIAL/DE-SERIALIZER
(SERDES - 10 BIT
TRANSCEIVER)
5 V dc
1 µH
0.1
µF
SIGNAL
DETECT
CIRCUIT
R12
150
CLOCK
SYNTHESIS
CIRCUIT
L2
6
0.1 µF
VCCR
TD-
50
C10
PREAMPLIFIER
TD+
50
TD+
LASER
DRIVER
CIRCUIT
GND
5 V dc
50
C12
POSTAMPLIFIER
0.01 µF
100
RD+ 2
VEER 1
C11
R11
270
0.01 µF
R10
270
RD-
R14
50
INPUT
BUFFER
RD+
CLOCK
RECOVERY
CIRCUIT
SERIAL TO
PARALLEL
CIRCUIT
SEE HDMP-1536A/-1546A DATA SHEET FOR
DETAILS ABOUT THIS TRANSCEIVER IC.
NOTES:
*C8 IS AN OPTIONAL BYPASS CAPACITOR FOR ADDITIONAL LOW-FREQUENCY NOISE FILTERING.
USE SURFACE-MOUNT COMPONENTS FOR OPTIMUM HIGH-FREQUENCY PERFORMANCE.
USE 50 MICROSTRIP OR STRIPLINE FOR SIGNAL PATHS.
LOCATE 50 TERMINATIONS AT THE INPUTS OF RECEIVING UNITS.
Figure 3. Recommended Gigabit/sec Ethernet AFBR-53D3 Fiber-Optic Transceiver and HDMP-1536A/1546A SERDES Integrated Circuit Transceiver Interface and
Power Supply Filter Circuits.
1.9 ±0.1
0.075 ±0.004
Ø0.000 M A
(2X) ø
20.32
0.800
0.8 ±0.1
0.032 ±0.004
Ø0.000 M A
(9X) ø
20.32
0.800
(8X) 2.54
0.100
TOP VIEW
Figure 4. Recommended Board Layout Hole Pattern.
10
–A–
AVAGO XXXX-XXXX
ZZZZZ LASER PROD
21CFR(J) CLASS 1
COUNTRY OF ORIGIN YYWW
TX
RX
39.6
(1.56) MAX.
12.7
(0.50)
SLOT DEPTH
(
4.7
(0.185)
AREA
RESERVED
FOR
PROCESS
PLUG
25.4
(1.00) MAX.
+0.1
0.25 -0.05
0.010 +0.004
-0.002
KEY:
YYWW = DATE CODE
FOR MULTIMODE MODULE:
XXXX-XXXX = AFBR-53xx
ZZZZ = 850 nm
2.5
(0.10)
12.7
(0.50)
SLOT WIDTH
2.0 ± 0.1
(0.079 ± 0.004)
)
9.8 MAX.
(0.386)
0.51
(0.020)
3.3 ± 0.38
(0.130 ± 0.015)
+0.25
0.46 -0.05
9X Ø
+0.010
0.018
-0.002
(
20.32
23.8
(0.937) (0.800)
20.32
(0.800)
15.8 ± 0.15
(0.622 ± 0.006)
)
8X 2.54
(0.100)
1.3
2X Ø (0.051)
DIMENSIONS ARE IN MILLIMETERS (INCHES).
ALL DIMENSIONS ARE ±0.025 mm UNLESS OTHERWISE SPECIFIED.
Figure 5. Package Outline Drawing for AFBR-53D3Z.
11
2X Ø
+0.25
1.27 -0.05
0.050 +0.010
-0.002
(
20.32
(0.800)
)
KEY:
YYWW = DATE CODE
FOR MULTIMODE MODULE:
XXXX-XXXX = AFBR-53xx
ZZZZ = 850 nm
XXXX-XXXX
AVAGO ZZZZZ LASER PROD
21CFR(J) CLASS 1
COUNTRY OF ORIGIN YYWW
TX
RX
29.6 UNCOMPRESSED
(1.16)
39.6
(1.56) MAX.
12.7
(0.50)
4.7
(0.185)
AREA
RESERVED
FOR
PROCESS
PLUG
25.4
(1.00)MAX.
12.7
(0.50)
SLOT WIDTH
0.25 +0.1
-0.05
(0.010 +0.004
-0.002 )
2.09 UNCOMPRESSED
(0.08)
10.2 MAX.
(0.40)
9.8
(0.386) MAX.
1.3
(0.05)
3.3 ± 0.38
(0.130 ± 0.015)
0.46 +0.25
-0.05
9X Ø
(0.018 +0.010
-0.002 )
20.32
23.8
(0.937) (0.800)
20.32
(0.80)
15.8 ± 0.15
(0.622 ± 0.006)
8X 2.54
(0.100)
1.3
2X Ø (0.051)
DIMENSIONS ARE IN MILLIMETERS (INCHES).
ALL DIMENSIONS ARE ±0.025 mm UNLESS OTHERWISE SPECIFIED.
Figure 6. Package Outline for AFBR-53D3EZ.
12
2.0 ± 0.1
(0.079 ± 0.004)
2X Ø
1.27 +0.25
-0.05
(0.050 +0.010
-0.002 )
20.32
(0.800)
2X
2X
0.8
(0.032)
0.8
(0.032)
+0.5
10.9 -0.25
+0.02
(0.43 -0.01
9.4
(0.37)
6.35
(0.25)
MODULE
PROTRUSION
27.4 ± 0.50
(1.08 ± 0.02)
PCB BOTTOM VIEW
Figure 7. Suggested Module Positioning and Panel Cut-out for AFBR-53D3EZ.
13
)
KEY:
YYWW = DATE CODE
FOR MULTIMODE MODULE:
XXXX-XXXX = AFBR-53xx
ZZZZ = 1300 nm
AVAGO XXXX-XXXX
ZZZZZ LASER PROD
21CFR(J) CLASS 1
COUNTRY OF ORIGIN YYWW
TX
RX
39.6
MAX.
(1.56)
1.01
(0.40)
9X Ø
+0.25
0.46 -0.05
+0.010
0.018
-0.002
(
20.32
23.8
(0.937) (0.800)
14.4
(0.57)
9.8 MAX.
(0.386)
20.32
(0.800)
22.0
(0.87)
15.8 ± 0.15
(0.622 ± 0.006)
)
8X 2.54
(0.100)
2X Ø
AREA
RESERVED
FOR
PROCESS
PLUG
1.3
2X Ø (0.051)
DIMENSIONS ARE IN MILLIMETERS (INCHES).
ALL DIMENSIONS ARE ± 0.025 mm UNLESS OTHERWISE SPECIFIED.
Figure 8. Package Outline for AFBR-53D3FZ.
14
2.2
(0.09)
SLOT DEPTH
10.2
(0.40) MAX.
)
3.3 ± 0.38
(0.130 ± 0.015)
12.7
(0.50)
29.7
(1.17)
SLOT WIDTH
25.8
(1.02) MAX.
(
4.7
(0.185)
AREA
RESERVED
FOR
PROCESS
PLUG
25.4 MAX.
(1.00)
+0.1
0.25 -0.05
0.010 +0.004
-0.002
12.7
(0.50)
+0.25
1.27 -0.05
+0.010
0.050
-0.002
(
20.32
(0.800)
)
2.0 ± 0.1
(0.079 ± 0.004)
1.98
(0.078)
DIMENSION SHOWN FOR MOUNTING
MODULE
FLUSH TO PANEL. THICKER PANEL WILL
RECESS MODULE. THINNER PANEL WILL
PROTRUDE MODULE.
1.27 OPTIONAL SEPTUM
(0.05)
30.2
(1.19)
0.36
(0.014)
10.82
(0.426)
13.82
(0.544)
BOTTOM SIDE OF PCB
1.82
(0.072)
26.4
(1.04)
12.0
(0.47)
DIMENSIONS ARE IN MILLIMETERS (INCHES).
ALL DIMENSIONS ARE ± 0.025 mm UNLESS OTHERWISE SPECIFIED.
Figure 9. Suggested Module Positioning and Panel Cut-out for AFBR-53D3FZ.
15
KEEP OUT ZONE
14.73
(0.58)
Ordering Information
850 nm VCSEL (Short Wavelength Laser)
AFBR-53D3Z No shield, plastic housing.
AFBR-53D3EZ Extended/protruding shield.
AFBR-53D3FZ Flush shield.
For product information and a complete list of distributors, please go to our web site:
www.avagotech.com
Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies in the United States and other countries.
Data subject to change. Copyright © 2005-2012 Avago Technologies. All rights reserved. Obsoletes 5989-3292EN
AV02-3676EN - June 22, 2012
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