a EMI/EMC Compliant, 615 kV ESD Protected, RS-232 Line Drivers/Receivers ADM202E/ADM1181A FEATURES Complies with 89/336/EEC EMC Directive ESD Protection to IEC1000-4-2 (801.2) 68 kV: Contact Discharge 615 kV: Air-Gap Discharge 615 kV: Human Body Model EFT Fast Transient Burst Immunity (IEC1000-4-4) Low EMI Emissions (EN55022) 230 kbits/s Data Rate Guaranteed TSSOP Package Option Upgrade for MAX202E, 232E, LT1181A APPLICATIONS General Purpose RS-232 Data Link Portable Instruments PDAs FUNCTIONAL BLOCK DIAGRAMS +5V INPUT 0.1µF 10V 0.1µF 10V CMOS INPUTS CMOS OUTPUTS 1 C1+ +5V TO +10V V CC 16 VOLTAGE 3 C1– V+ 2 DOUBLER 4 C2+ 5 C2– +10V TO –10V V– 6 VOLTAGE INVERTER C3 0.1µF 6.3V C5 0.1µF C4 0.1µF 10V T1IN 11 T1 14 T1OUT T2IN 10 T2 7 T2OUT R1OUT 12 R1 13 R1IN R2OUT 9 R2 8 R2IN EIA/TIA-232 OUTPUTS EIA/TIA-232 INPUTS* ADM202E GND 15 GENERAL DESCRIPTION NOTE *INTERNAL 5kΩ PULL-DOWN RESISTOR ON EACH RS-232 INPUT The ADM202E and ADM1181A are robust, high speed, 2channel RS232/V.28 interface devices that operate from a single +5 V power supply. Both products are suitable for operation in harsh electrical environments and are compliant with the EU directive on EMC (89/336/EEC). Both the level of electromagnetic emissions and immunity are in compliance. EM immunity includes ESD protection in excess of ± 15 kV on all I/O lines, Fast Transient burst protection (1000-4-4) and Radiated Immunity (1000-4-3). EM emissions include radiated and conducted emissions as required by Information Technology Equipment EN55022, CISPR22. CMOS INPUTS The ADM202E and ADM1181A conform to the EIA-232E and CCITT V.28 specifications and operate at data rates up to 230 kbps. CMOS OUTPUTS +5V INPUT 0.1µF 10V 0.1µF 10V Four external 0.1 µF charge pump capacitors are used for the voltage doubler/inverter permitting operation from a single +5 V supply. 4 C2+ 5 C2– +10V TO –10V V– 6 VOLTAGE INVERTER C4 0.1µF 10V T1IN 11 T1 14 T1OUT T2IN 10 T2 7 T2OUT R1OUT 12 R1 13 R1IN R2OUT 9 R2 8 R2IN GND C5 0.1µF C3 10V 0.1µF 10V EIA/TIA-232 OUTPUTS EIA/TIA-232 INPUTS* ADM1181A 15 The ADM202E provides a robust pin-compatible upgrade for existing ADM202, ADM232L or MAX202E/MAX232E sockets. It is available in a 16-pin DIP, wide and narrow SO and also a space saving TSSOP package. The TSSOP package gives a 44% space saving over SOIC. The ADM1181A provides a robust pin compatible upgrade for the LTC1181A, and it is available in 16-pin DIP and 16-lead SO packages. 1 C1+ +5V TO +10V V CC 16 VOLTAGE 3 C1– V+ 2 DOUBLER NOTE *INTERNAL 5kΩ PULL-DOWN RESISTOR ON EACH RS-232 INPUT ORDERING GUIDE Model Temperature Range Package Option ADM202EAN ADM202EARW ADM202EARN ADM202EARU –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C N-16 R-16W R-16N RU-16 ADM1181AAN ADM1181AARW –40°C to +85°C –40°C to +85°C N-16 R-16W REV. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. © Analog Devices, Inc., 1996 One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 617/329-4700 Fax: 617/326-8703 = +5.0 V 6 10%, C1–C4 = 0.1 mF. All specifications to TMAX unless otherwise noted.) MIN ADM202E/ADM1181A–SPECIFICATIONS (VT CC Parameter Min Typ Max Units Test Conditions/Comments DC CHARACTERISTICS Operating Voltage Range VCC Power Supply Current 4.5 5.0 2.0 15 5.5 3.0 18 Volts mA mA No Load RL = 3 kΩ to GND 0.8 V V V V µA TIN TIN IOUT = 3.2 mA IOUT = –1 mA TIN = GND to VCC LOGIC Input Logic Threshold Low, VINL Input Logic Threshold High, VINH CMOS Output Voltage Low, VOL CMOS Output Voltage High, VOH Input Leakage Current RS-232 RECEIVER EIA-232 Input Voltage Range EIA-232 Input Threshold Low EIA-232 Input Threshold High EIA-232 Input Hysteresis EIA-232 Input Resistance RS-232 TRANSMITTER Output Voltage Swing Transmitter Output Resistance RS-232 Output Short Circuit Current TIMING CHARACTERISTICS Maximum Data Rate Receiver Propagation Delay TPHL TPLH Transmitter Propagation Delay Transition Region Slew Rate EM IMMUNITTY ESD Protection (I/O pins) EFT Protection (I/O pins) EMI Immunity 2.4 0.4 3.5 0.01 –30 0.4 +30 3 0.8 1.1 0.7 5 ± 5.0 ± 9.0 300 ± 10 ± 15 2.4 7 Volts ± 60 230 3 V V V V kΩ Ω mA kbps 0.3 0.6 1.2 10 1 1 1.5 30 ± 15 ± 15 ± 8 kV ±2 10 µs µs µs V/µs kV kV kV kV V/m All Transmitter Outputs Loaded with 3 kΩ to Ground VCC = 0 V, VOUT = ± 2 V RL = 3 kΩ to 7 kΩ, CL = 50 pF to 2500 pF RL = 3 kΩ, CL = 2500 pF RL = 3 kΩ, CL = 2500 pF Measured from +3 V to –3 V or –3 V to +3 V Human Body Model IEC1000-4-2 Air Discharge IEC1000-4-2 Contact Discharge IEC1000-4-4 IEC1000-4-3 Specifications subject to change without notice. ABSOLUTE MAXIMUM RATINGS* (TA = +25°C unless otherwise noted) VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +6 V V+ . . . . . . . . . . . . . . . . . . . . . . . . . . . . (VCC – 0.3 V) to +14 V V– . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +0.3 V to –14 V Input Voltages TIN . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to (V+, +0.3 V) RIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 30 V Output Voltages TOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 15 V ROUT . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to (VCC + 0.3 V) Short Circuit Duration TOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous Power Dissipation Power Dissipation N-16 . . . . . . . . . . . . . . . . . . . . . . . . 450 mW (Derate 6 mW/°C above +50°C) θJA, Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 117°C/W Power Dissipation R-16 . . . . . . . . . . . . . . . . . . . . . . . . 450 mW (Derate 6 mW/°C above +50°C) θJA, Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 158°C/W Power Dissipation RU-16 . . . . . . . . . . . . . . . . . . . . . . 500 mW (Derate 6 mW/°C above +50°C) θJA, Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 158°C/W Operating Temperature Range Industrial (A Version) . . . . . . . . . . . . . . . . . –40°C to +85°C Storage Temperature Range . . . . . . . . . . . . . –65°C to +150°C Lead Temperature (Soldering, 10 sec) . . . . . . . . . . . . . +300°C ESD Rating (MIL-STD-883B) (I/O Pins) . . . . . . . . . . ± 15 kV ESD Rating MIL-STD-883B (Except I/O) . . . . . . . . . . ± 3 kV ESD Rating (IEC1000-4-2 Air) (I/O Pins) . . . . . . . . . ± 15 kV ESD Rating (IEC1000-4-2 Contact) (I/O Pins) . . . . . . . ± 8 kV EFT Rating (IEC1000-4-4) (I/O Pins) . . . . . . . . . . . . . ± 2 kV *This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operation sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods of time may affect reliability. –2– REV. 0 ADM202E/ADM1181A PIN FUNCTION DESCRIPTION PIN CONNECTIONS Mnemonic Function VCC V+ Power Supply Input: +5 V ± 10%. Internally Generated Positive Supply (+9 V nominal). Internally Generated Negative Supply (–9 V nominal). Ground Pin. Must Be Connected to 0 V. External Capacitor 1 is connected between these pins. 0.1 µF capacitor is recommended but larger capacitors up to 47 µF may be used. External Capacitor 2 is connected between these pins. 0.1 µF capacitor is recommended but larger capacitors up to 47 µF may be used. Transmitter (Driver) Inputs. These inputs accept TTL/CMOS levels. Transmitter (Driver) Outputs. These are RS232 signal levels (typically ± 9 V). Receiver Inputs. These inputs accept RS-232 signal levels. An Internal 5 kΩ pull-down resistor to GND is connected on each input. Receiver Outputs. These are CMOS output logic levels. V– GND C1+, C1– C2+, C2– TIN TOUT RIN ROUT C1+ 1 16 VCC V+ 2 15 GND C1– 3 C2+ 4 ADM202E 14 ADM1181A 13 T1OUT R1IN C2– 5 TOP VIEW 12 R1OUT (Not to Scale) V– 6 11 T1IN 10 T2IN T2OUT 7 9 R2OUT R2IN 8 NC = NO CONNECT +5V INPUT +5V INPUT 0.1µF 10V 0.1µF 10V T1IN CMOS INPUTS CMOS OUTPUTS 1 3 4 5 11 T2IN 10 R1OUT 12 R2OUT C1+ +5V TO +10V VCC 16 VOLTAGE V+ 2 C1– DOUBLER C2+ +10V TO –10V V– 6 VOLTAGE C2– INVERTER T1 14 T2 R1 R2 9 GND C3 0.1µF 6.3V 0.1µF 10V C4 0.1µF 10V T1OUT 7 T2OUT 13 R1IN 8 0.1µF 10V C5 0.1µF R2IN EIA/TIA-232 OUTPUTS CMOS INPUTS EIA/TIA-232 INPUTS* CMOS OUTPUTS ADM202E 4 C2+ 5 C2– +10V TO –10V V– 6 VOLTAGE INVERTER C4 0.1µF 10V T1IN 11 T1 14 T1OUT T2IN 10 T2 7 T2OUT R1OUT 12 R1 13 R1IN R2OUT 9 R2 8 R2IN GND C5 0.1µF C3 10V 0.1µF 10V EIA/TIA-232 OUTPUTS EIA/TIA-232 INPUTS* ADM1181A 15 15 REV. 0 1 C1+ +5V TO +10V VCC 16 VOLTAGE 3 C1– V+ 2 DOUBLER NOTE *INTERNAL 5kΩ PULL-DOWN RESISTOR ON EACH RS-232 INPUT NOTE *INTERNAL 5kΩ PULL-DOWN RESISTOR ON EACH RS-232 INPUT ADM202E Typical Operating Circuit ADM1181A Typical Operating Circuit –3– ADM202E/ADM1181A and VCC, while it is connected between V+ and GND on the ADM1181A. It is acceptable to use either configuration with both the ADM202E and ADM1181A. If desired, larger capacitors (up to 47 µF) can be used for capacitors C1–C4. This facilitates direct substitution with older generation charge pump RS-232 transceivers. GENERAL DESCRIPTION The ADM202E/ADM1181E are ruggedized RS-232 line drivers/ receivers. Step-up voltage converters coupled with level shifting transmitters and receivers allow RS-232 levels to be developed while operating from a single +5 V supply. Features include low power consumption, high transmission rates and compatibility with the EU directive on Electromagnetic compatibility. EM compatibility includes protection against radiated and conducted interference including high levels of Electrostatic Discharge. S1 S3 VCC V+ = 2VCC C3 C1 S2 S4 VCC GND All inputs and outputs contain protection against Electrostatic Discharges up to ± 15 kV and Electrical Fast Transients up to ± 2 kV. This ensures compliance to IE1000-4-2 and IEC1000-4-4 requirements. INTERNAL OSCILLATOR NOTE: C3 CONNECTS BETWEEN V+ AND GND ON THE ADM1181A The devices are ideally suited for operation in electrically harsh environments or where RS-232 cables are frequently being plugged/unplugged. They are also immune to high RF field strengths without special shielding precautions. Figure 1. Charge Pump Voltage Doubler S1 S3 V+ CMOS technology is used to keep the power dissipation to an absolute minimum allowing maximum battery life in portable applications. FROM VOLTAGE DOUBLER GND C4 C2 S2 S4 GND The ADM202E/ADM1181A is a modification, enhancement and improvement to the AD230–AD241 family and its derivatives. It is essentially plug-in compatible and does not have materially different applications. V– = –(V+) INTERNAL OSCILLATOR Figure 2. Charge Pump Voltage Inverter CIRCUIT DESCRIPTION Transmitter (Driver) Section The internal circuitry consists of four main sections. These are: The drivers convert 5 V logic input levels into RS-232 output levels. With VCC = +5 V and driving an RS-232 load, the output voltage swing is typically ± 9 V. 1. A charge pump voltage converter 2. 5 V logic to EIA-232 transmitters 3. EIA-232 to 5 V logic receivers. 4. Transient protection circuit on all I/O lines Receiver Section The receivers are inverting level shifters which accept RS-232 input levels and translate them into 5 V logic output levels. The inputs have internal 5 kΩ pull-down resistors to ground and are also protected against overvoltages of up to ± 30 V. Unconnected inputs are pulled to 0 V by the internal 5 kΩ pulldown resistor. This, therefore, results in a Logic 1 output level for unconnected inputs or for inputs connected to GND. Charge Pump DC-DC Voltage Converter The charge pump voltage converter consists of an 200 kHz oscillator and a switching matrix. The converter generates a ± 10 V supply from the input +5 V level. This is done in two stages using a switched capacitor technique as illustrated below. First, the 5 V input supply is doubled to 10 V using capacitor C1 as the charge storage element. The 10 V level is then inverted to generate –10 V using C2 as the storage element. The receivers have Schmitt trigger inputs with a hysteresis level of 0.5 V. This ensures error-free reception for both noisy inputs and for inputs with slow transition times. Capacitors C3 and C4 are used to reduce the output ripple. Their values are not critical and can be increased if desired. On the ADM202E, capacitor C3 is shown connected between V+ –4– REV. 0 ADM202E/ADM1181A HIGH BAUD RATE The ADM202E/ADM1181A feature high slew rates permitting data transmission at rates well in excess of the EIA/RS-232-E specifications. RS-232 voltage levels are maintained at data rates up to 230 kb/s even under worst case loading conditions. This allows for high speed data links between two terminals or indeed it is suitable for the new generation ISDN modem standards which requires data rates of 230 kbps. The slew rate is internally controlled to less than 30 V/µs in order to minimize EMI interference. The protection structure achieves ESD protection up to ± 15 kV and EFT protection up to ± 2 kV on all RS-232 I/O lines. The methods used to test the protection scheme are discussed later. R1 RECEIVER INPUT RX D1 RIN D2 ESD/EFT TRANSIENT PROTECTION SCHEME. The ADM202E/ADM1181A use protective clamping structures on all inputs and outputs which clamp the voltage to a safe level and dissipate the energy present in ESD (Electrostatic) and EFT (Electrical Fast Transients) discharges. A simplified schematic of the protection structure is shown in Figure 3. Each input and output contains two back-to-back high speed clamping diodes. During normal operation with maximum RS-232 signal levels, the diodes have no effect as one or the other is reverse biased depending on the polarity of the signal. If however the voltage exceeds about 50 V in either direction, reverse breakdown occurs and the voltage is clamped at this level. The diodes are large p-n junctions that are designed to handle the instantaneous current surge which can exceed several amperes. Figure 3a. Receiver Input Protection Scheme TOUT RX TRANSMITTER OUTPUT D1 D2 Figure 3b. Transmitter Output Protection Scheme The transmitter outputs and receiver inputs have a similar protection structure. The receiver inputs can also dissipate some of the energy through the internal 5 kΩ resistor to GND as well as through the protection diodes. 80 80 70 70 60 60 50 50 40 dBµV dBµV Typical Performance Curves LIMIT 30 20 20 10 10 0 START 30.0 MHz STOP 200.0 MHz Figure 4. EMC Radiated Emissions REV. 0 40 30 0 LIMIT 0.3 0.6 1 3 6 LOG FREQUENCY – MHz 10 Figure 5. EMC Conducted Emissions –5– 30 ADM202E/ADM1181A Typical Performance Curves 10 15 VCC = +5V TA = 258C 8 VCC = +5V TA = 258C 10 6 TOUT VOLTAGE – V 4 5 TOUT – V 2 0 0 –5 –2 –4 –10 –6 –8 –15 0 500 1000 1500 CL – pF 2000 2500 0 1 2 3 4 5 6 ILOAD – mA 7 8 9 10 Figure 9. Transmitter Output Voltage Low/High vs. Load Current Figure 6. Transmitter Output Voltage High/Low vs. Load Capacitance @ 230 kbps 12 VCC = +5V TA = 258C TA = 258C 10 TOUT – V+ 8 6 4 2 0 3 3.5 4 4.5 5 5.5 VCC – V Figure 10. 230 kbps Data Transmission Figure 7. Transmitter Output Voltage High vs. VCC 400 10 TA = 258C VCC = +5V TA = 258C 8 350 300 4 IMPEDANCE – Ω CHARGE PUMP VOLTAGE 6 2 0 –2 –4 250 200 150 100 –6 50 –8 –10 0 0 5 10 15 ILOAD – mA 20 25 3 3.5 4 4.5 5 5.5 VCC – V Figure 11. Charge Pump Impedance vs. VCC Figure 8. Charge Pump V+, V– vs. Current –6– REV. 0 ADM202E/ADM1181A ESD TESTING (IEC1000-4-2) 100 IEC1000-4-2 (previously 801-2) specifies compliance testing using two coupling methods, contact discharge and air-gap discharge. Contact discharge calls for a direct connection to the unit being tested. Air-gap discharge uses a higher test voltage but does not make direct contact with the unit under test. With air discharge, the discharge gun is moved towards the unit under test developing an arc across the air gap, hence the term airgap discharge. This method is influenced by humidity, temperature, barometric pressure, distance and rate of closure of the discharge gun. The contact-discharge method while less realistic is more repeatable and is gaining acceptance in preference to the air-gap method. IPEAK – % 90 36.8 10 Although very little energy is contained within an ESD pulse, the extremely fast rise time coupled with high voltages can cause failures in unprotected semiconductors. Catastrophic destruction can occur immediately as a result of arcing or heating. Even if catastrophic failure does not occur immediately, the device may suffer from parametric degradation which may result in degraded performance. The cumulative effects of continuous exposure can eventually lead to complete failure. I/O lines are particularly vulnerable to ESD damage. Simply touching or plugging in an I/O cable can result in a static discharge which can damage or completely destroy the interface product connected to the I/O port. Traditional ESD test methods such as the MIL-STD-883B method 3015.7 do not fully test a product’s susceptibility to this type of discharge. This test was intended to test a product’s susceptibility to ESD damage during handling. Each pin is tested with respect to all other pins. There are some important differences between the traditional test and the IEC test: a. The IEC test is much more stringent in terms of discharge energy. The peak current injected is over four times greater. b. The current rise time is significantly faster in the IEC test. c. The IEC test is carried out while power is applied to the device. It is possible that the ESD discharge could induce latch-up in the device under test. This test therefore is more representative of a real-world I/O discharge where the equipment is operating normally with power applied. For maximum peace of mind, however, both tests should be performed therefore ensuring maximum protection both during handling and later during field service. HIGH VOLTAGE GENERATOR R2 R1 ESD TEST METHOD R2 C1 H. BODY MIL-STD883B 1.5kΩ 100pF IEC1000-4-2 330Ω 150pF 100 IPEAK – % 90 10 0.1 TO 1ns TIME t 30ns 60ns Figure 14. IEC1000-4-2 ESD Current Waveform The ADM202E/ADM1181E products are tested using both the above mentioned test methods. All pins are tested with respect to all other pins as per the MIL-STD-883B specification. In addition all I/O pins are tested as per the IEC test specification. The products were tested under the following conditions: a. Power-On b. Power-Off There are four levels of compliance defined by IEC1000-4-2. The ADM202E/ADM1181A products meet the most stringent compliance level for both contact and for air-gap discharge. This means that the products are able to withstand contact discharges in excess of 8 kV and air-gap discharges in excess of 15 kV. Figure 12. ESD Test Standards REV. 0 TIME t Figure 13. Human Body Model ESD Current Waveform DEVICE UNDER TEST C1 tDL tRL –7– ADM202E/ADM1181A A simplified circuit diagram of the actual EFT generator is illustrated in Figure 16. Table I. IEC1000-4-2 Compliance Levels Level Contact Discharge Air Discharge 1 2 3 4 2 kV 4 kV 6 kV 8 kV 2 kV 4 kV 8 kV 15 kV The transients are coupled onto the signal lines using an EFT coupling clamp. The clamp is 1 m long and it completely surrounds the cable providing maximum coupling capacitance (50 pF to 200 pF typ) between the clamp and the cable. High energy transients are capacitively coupled onto the signal lines. Fast rise times (5 ns) as specified by the standard result in very effective coupling. This test is very severe since high voltages are coupled onto the signal lines. The repetitive transients can often cause problems where single pulses don’t. Destructive latchup may be induced due to the high energy content of the transients. Note that this stress is applied while the interface products are powered up and are transmitting data. The EFT test applies hundreds of pulses with higher energy than ESD. Worst case transient current on an I/O line can be as high as 40 A. Table II. ADM202E/ADM1181A ESD Test Results ESD Test Method I/O Pins Other Pins MIL-STD-883B IEC1000-4-2 Contact Air ± 15 kV ± 3 kV ± 8 kV ± 15 kV FAST TRANSIENT BURST TESTING (IEC1000-4-4) HIGH VOLTAGE SOURCE IEC1000-4-4 (previously 801-4) covers electrical fast-transient/ burst (EFT) immunity. Electrical fast transients occur as a result of arcing contacts in switches and relays. The tests simulate the interference generated when for example a power relay disconnects an inductive load. A spark is generated due to the well known back EMF effect. In fact the spark consists of a burst of sparks as the relay contacts separate. The voltage appearing on the line therefore consists of a bust of extremely fast transient impulses. A similar effect occurs when switching on fluorescent lights. CC CD 50Ω OUTPUT ZS Test results are classified according to the following: 1. Normal performance within specification limits. 2. Temporary degradation or loss of performance that is self-recoverable. 3. Temporary degradation or loss of function or performance that requires operator intervention or system reset. 4. Degradation or loss of function that is not recoverable due to damage. The ADM202E/ADM1181A have been tested under worst case conditions using unshielded cables and meet Classification 2. Data transmission during the transient condition is corrupted, but it may be resumed immediately following the EFT event without user intervention. V t V RM L Figure 16. IEC1000-4-4 Fast Transient Generator The fast transient burst test defined in IEC1000-4-4 simulates this arcing and its waveform is illustrated in Figure 11. It consists of a burst of 2.5 kHz to 5 kHz transients repeating at 300 ms intervals. It is specified for both power and data lines. 300ms RC 15ms 5ns 50ns t 0.2/0.4ms Figure 15. IEC1000-4-4 Fast Transient Waveform –8– REV. 0 ADM202E/ADM1181A IEC1000-4-3 RADIATED IMMUNITY IEC1000-4-3 (previously IEC801-3) describes the measurement method and defines the levels of immunity to radiated electromagnetic fields. It was originally intended to simulate the electromagnetic fields generated by portable radio transceivers or any other device which generates continuous wave radiated electromagnetic energy. Its scope has since been broadened to include spurious EM energy which can be radiated from fluorescent lights, thyristor drives, inductive loads, etc. Testing for immunity involves irradiating the device with an EM field. There are various methods of achieving this including use of anechoic chamber, stripline cell, TEM cell, GTEM cell. A stripline cell consists of two parallel plates with an electric field developed between them. The device under test is placed within the cell and exposed to the electric field. There are three severity levels having field strengths ranging from 1 V to 10 V/m. Results are classified in a similar fashion to those for IEC1000-4-2. current glitch between VCC and GND which results in conducted emissions. It is, therefore, important that the switches in the charge pump guarantee break-before-make switching under all conditions so that instantaneous short circuit conditions do not occur. The ADM202E has been designed to minimize the switching transients and ensure break-before-make switching thereby minimizing conducted emissions. This has resulted in the level of emissions being well below the limits required by the specification. No additional filtering/decoupling other than the recommended 0.1 µF capacitor is required. Conducted emissions are measured by monitoring the mains line. The equipment used consists of a LISN (Line Impedance Stabilizing Network) that essentially presents a fixed impedance at RF, and a spectrum analyzer. The spectrum analyzer scans for emissions up to 30 MHz and a plot for the ADM202E is shown in Figure 19. 1. Normal Operation. 2. Temporary Degradation or loss of function that is selfrecoverable when the interfering signal is removed. 3. Temporary degradation or loss of function that requires operator intervention or system reset when the interfering signal is removed. 4. Degradation or loss of function that is not recoverable due to damage. S1 S3 VCC V+ = 2V C C C3 C1 S2 S4 VCC GND INTERNAL OSCILLATOR The ADM202E/ADM1181A products easily meet Classification 1 at the most stringent (Level 3) requirement. In fact field strengths up to 30 V/m showed no performance degradation, and error-free data transmission continued even during irradiation. Figure 17. Charge Pump Voltage Doubler ø1 Table III. Test Severity Levels (IEC1000-4-3) ø2 Level Field Strength V/m 1 2 3 1 3 10 SWITCHING GLITCHES Figure 18. Switching Glitches EMISSIONS/INTERFERENCE EN55 022, CISPR22 defines the permitted limits of radiated and conducted interference from Information Technology (IT) equipment. The objective of the standard is to minimize the level of emissions both conducted and radiated. 80 70 60 For ease of measurement and analysis, conducted emissions are assumed to predominate below 30 MHz and radiated emissions are assumed to predominate above 30 MHz. LIMIT dBµV 50 CONDUCTED EMISSIONS 40 30 This is a measure of noise that gets conducted onto the mains power supply. Switching transients from the charge pump that are 20 V in magnitude and contain significant energy can lead to conducted emissions. Other sources of conducted emissions can be due to overlap in switch on-times in the charge pump voltage converter. In the voltage doubler shown below, if S2 has not fully turned off before S4 turns on, this results in a transient 20 10 0 0.3 0.6 1 3 6 LOG FREQUENCY – MHz 10 30 Figure 19. ADM202E Conducted Emissions Plot REV. 0 –9– ADM202E/ADM1181A RADIATED NOISE RADIATED EMISSIONS Radiated emissions are measured at frequencies in excess of 30 MHz. RS-232 outputs designed for operation at high baud rates while driving cables can radiate high frequency EM energy. The reasons already discussed that cause conducted emissions can also be responsible for radiated emissions. Fast RS-232 output transitions can radiate interference, especially when lightly loaded and driving unshielded cables. Charge pump devices are also prone to radiating noise due to the high frequency oscillator and high voltages being switched by the charge pump. The move towards smaller capacitors in order to conserve board space has resulted in higher frequency oscillators being employed in the charge pump design. This has resulted in higher levels of emission, both conducted and radiated. DUT TURNTABLE TO RECEIVER Figure 20. Radiated Emissions Test Setup 80 70 The RS-232 outputs on the ADM202E products feature a controlled slew rate in order to minimize the level of radiated emissions, yet are fast enough to support data rates up to 230 kBaud. 60 50 dBµV Figure 21 shows a plot of radiated emissions vs. frequency. This shows that the levels of emissions are well within specifications without the need for any additional shielding or filtering components. The ADM202E was operated at maximum baud rates and configured as in a typical RS-232 interface. ADJUSTABLE ANTENNA LIMIT 40 30 20 10 Testing for radiated emissions was carried out in a shielded anechonic chamber. 0 START 30.0 MHz STOP 200.0 MHz Figure 21. ADM202E Radiated Emissions Plot –10– REV. 0 ADM202E/ADM1181A OUTLINE DIMENSIONS Dimensions shown in inches and (mm). SOIC (Wide) Package (R-16W) TSSOP Package (RU-16) 0.201 (5.10) 0.193 (4.90) 0.4133 (10.50) 0.3977 (10.00) 1 0.1043 (2.65) 0.0926 (2.35) PIN 1 0.0118 (0.30) 0.0040 (0.10) 0.0500 (1.27) BSC 0.256 (6.50) 0.246 (6.25) 8 9 0.177 (4.50) 0.169 (4.30) 1 16 0.4193 (10.65) 0.3937 (10.00) 9 0.2992 (7.60) 0.2914 (7.40) 16 0.0291 (0.74) x 45° 0.0098 (0.25) 8° 0° 0.0192 (0.49) SEATING 0.0125 (0.32) 0.0138 (0.35) PLANE 0.0091 (0.23) 8 PIN 1 0.006 (0.15) 0.002 (0.05) 0.0500 (1.27) 0.0157 (0.40) SEATING PLANE 0.0433 (1.10) MAX 0.0118 (0.30) 0.0075 (0.19) 0.0256 (0.65) BSC SOIC (Narrow) Package (R-16N) 0.1497 (3.80) 9 1 8 16 9 1 8 0.2440 (6.20) 0.2284 (5.80) PIN 1 0.0098 (0.25) 0.0040 (0.10) SEATING PLANE REV. 0 0.0500 (1.27) BSC 0.028 (0.70) 0.020 (0.50) 0.840 (21.33) 0.745 (18.93) 16 PIN 1 8° 0° DIP Package (N-16) 0.3937 (10.00) 0.3859 (9.80) 0.1574 (4.00) 0.0079 (0.20) 0.0035 (0.090) 0.0688 (1.75) 0.0532 (1.35) 0.0192 (0.49) 0.0138 (0.35) 0.0099 (0.25) 0.0075 (0.19) 0.0196 (0.50) x 45° 0.0099 (0.25) 8° 0° 0.060 (1.52) 0.015 (0.38) 0.210 (5.33) MAX 0.130 (3.30) MIN 0.160 (4.06) 0.115 (2.93) 0.022 (0.558) 0.014 (0.356) 0.0500 (1.27) 0.0160 (0.41) –11– 0.280 (7.11) 0.240 (6.10) 0.100 (2.54) BSC 0.070 (1.77) SEATING 0.045 (1.15) PLANE 0.325 (8.25) 0.300 (7.62) 0.195 (4.95) 0.115 (2.93) 0.015 (0.381) 0.008 (0.204) –12– PRINTED IN U.S.A. C2162–18–7/96