Ultralow Noise XFET Voltage References with Current Sink and Source Capability ADR430/ADR431/ADR433/ADR434/ADR435/ADR439 FEATURES PIN CONFIGURATIONS Low noise (0.1 Hz to 10.0 Hz): 3.5 μV p-p @ 2.5 V output No external capacitor required Low temperature coefficient A Grade: 10 ppm/°C maximum B Grade: 3 ppm/°C maximum Load regulation: 15 ppm/mA Line regulation: 20 ppm/V Wide operating range ADR430: 4.1 V to 18 V ADR431: 4.5 V to 18 V ADR433: 5.0 V to 18 V ADR434: 6.1 V to 18 V ADR435: 7.0 V to 18 V ADR439: 6.5 V to 18 V High output source and sink current: +30 mA and −20 mA Wide temperature range: −40°C to +125°C TP 1 VIN 2 8 ADR43x TP COMP TOP VIEW 6 VOUT (Not to Scale) GND 4 5 TRIM 7 NOTES 1. NIC = NO INTERNAL CONNECTION 2. TP = TEST PIN (DO NOT CONNECT) 04500-001 NIC 3 Figure 1. 8-Lead MSOP (RM-8) TP 1 8 ADR43x TP COMP TOP VIEW 6 VOUT (Not to Scale) 5 TRIM GND 4 VIN 2 7 NOTES 1. NIC = NO INTERNAL CONNECTION 2. TP = TEST PIN (DO NOT CONNECT) 04500-041 NIC 3 Figure 2. 8-Lead SOIC_N (R-8) APPLICATIONS Precision data acquisition systems High resolution data converters Medical instruments Industrial process control systems Optical control circuits Precision instruments GENERAL DESCRIPTION The ADR43x series is a family of XFET® voltage references featuring low noise, high accuracy, and low temperature drift performance. Using Analog Devices, Inc., patented temperature drift curvature correction and XFET (eXtra implanted junction FET) technology, voltage change vs. temperature nonlinearity in the ADR43x is minimized. The XFET references operate at lower current (800 μA) and lower supply voltage headroom (2 V) than buried Zener references. Buried Zener references require more than 5 V headroom for operation. The ADR43x XFET references are the only low noise solutions for 5 V systems. The ADR43x family has the capability to source up to 30 mA of output current and sink up to 20 mA. It also comes with a trim terminal to adjust the output voltage over a 0.5% range without compromising performance. Table 1. Selection Guide Model ADR430A ADR430B ADR431A ADR431B ADR433A ADR433B ADR434A ADR434B ADR435A ADR435B ADR439A ADR439B Output Voltage (V) 2.048 2.048 2.500 2.500 3.000 3.000 4.096 4.096 5.000 5.000 4.500 4.500 Accuracy (mV) ±3 ±1 ±3 ±1 ±4 ±1.5 ±5 ±1.5 ±6 ±2 ±5.5 ±2 Temperature Coefficient (ppm/°C) 10 3 10 3 10 3 10 3 10 3 10 3 The ADR43x is available in 8-lead MSOP and 8-lead narrow SOIC packages. All versions are specified over the extended industrial temperature range of −40°C to +125°C. Rev. J Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2003–2011 Analog Devices, Inc. All rights reserved. ADR430/ADR431/ADR433/ADR434/ADR435/ADR439 TABLE OF CONTENTS Features .............................................................................................. 1 Noise Performance ..................................................................... 16 Applications....................................................................................... 1 High Frequency Noise ............................................................... 16 Pin Configurations ........................................................................... 1 Turn-On Time ............................................................................ 17 General Description ......................................................................... 1 Applications Information .............................................................. 18 Revision History ............................................................................... 3 Output Adjustment .................................................................... 18 Specifications..................................................................................... 4 Reference for Converters in Optical Network Control Circuits......................................................................................... 18 ADR430 Electrical Characteristics............................................. 4 ADR431 Electrical Characteristics............................................. 5 ADR433 Electrical Characteristics............................................. 6 ADR434 Electrical Characteristics............................................. 7 ADR435 Electrical Characteristics............................................. 8 ADR439 Electrical Characteristics............................................. 9 Absolute Maximum Ratings.......................................................... 10 Thermal Resistance .................................................................... 10 ESD Caution................................................................................ 10 Typical Performance Characteristics ........................................... 11 High Voltage Floating Current Source .................................... 18 Kelvin Connection ..................................................................... 18 Dual Polarity References ........................................................... 19 Programmable Current Source ................................................ 19 Programmable DAC Reference Voltage .................................. 20 Precision Voltage Reference for Data Converters.................. 20 Precision Boosted Output Regulator ....................................... 21 Outline Dimensions ....................................................................... 22 Ordering Guide .......................................................................... 23 Theory of Operation ...................................................................... 16 Basic Voltage Reference Connections...................................... 16 Rev. J | Page 2 of 24 ADR430/ADR431/ADR433/ADR434/ADR435/ADR439 REVISION HISTORY 7/11—Rev. I to Rev. J Changes to Figure 1 and Figure 2....................................................1 Changes to Ordering Guide...........................................................23 5/11—Rev. H to Rev. I Added Endnote 1 in Table 2.............................................................4 Added Endnote 1 in Table 3.............................................................5 Added Endnote 1 in Table 4.............................................................6 Added Endnote 1 in Table 5.............................................................7 Added Endnote 1 in Table 6.............................................................8 Added Endnote 1 in Table 7.............................................................9 Deleted Negative Precision Reference Without Precision Resistors Section..............................................................................17 Deleted Figure 36; Renumbered Sequentially .............................18 2/11—Rev. G to Rev. H Updated Outline Dimensions........................................................21 Changes to Ordering Guide...........................................................22 7/10—Rev. F to Rev. G Changes to Storage Temperature Range in Table 9.......................9 6/10—Rev. E to Rev. F Updated Pin Name NC to COMP Throughout ............................1 Changes to Figure 1 and Figure 2....................................................1 Changes to Figure 30 and High Frequency Noise Section ........15 Updated Outline Dimensions........................................................21 Changes to Ordering Guide...........................................................22 12/07—Rev. C to Rev. D Changes to Initial Accuracy and Ripple Rejection Ratio Parameters in Table 2 through Table 7...........................................3 Changes to Table 9 ............................................................................9 Changes to Theory of Operation Section ....................................15 Updated Outline Dimensions........................................................20 8/06—Rev. B to Rev. C Updated Format ................................................................. Universal Changes to Table 1 ............................................................................1 Changes to Table 3 ............................................................................4 Changes to Table 4 ............................................................................5 Changes to Table 7 ............................................................................8 Changes to Figure 26 ......................................................................14 Changes to Figure 31 ......................................................................16 Updated Outline Dimensions........................................................20 Changes to Ordering Guide...........................................................21 9/04—Rev. A to Rev. B Added New Grade.............................................................. Universal Changes to Specifications ................................................................3 Replaced Figure 3, Figure 4, Figure 5 ...........................................10 Updated Ordering Guide ...............................................................21 6/04—Rev. 0 to Rev. A Changes to Format............................................................. Universal Changes to the Ordering Guide ....................................................20 12/03—Revision 0: Initial Version 1/09—Rev. D to Rev. E Added High Frequency Noise Section and Equation 3; Renumbered Sequentially ..............................................................15 Inserted Figure 31, Figure 32, and Figure 33; Renumbered Sequentially ......................................................................................16 Changes to the Ordering Guide ....................................................22 Rev. J | Page 3 of 24 ADR430/ADR431/ADR433/ADR434/ADR435/ADR439 SPECIFICATIONS ADR430 ELECTRICAL CHARACTERISTICS VIN = 4.1 V to 18 V, IL = 0 mA, TA = 25°C, unless otherwise noted. Table 2. Parameter OUTPUT VOLTAGE A Grade B Grade INITIAL ACCURACY 1 A Grade Symbol VO Conditions Min Typ Max Unit 2.045 2.047 2.048 2.048 2.051 2.049 V V ±3 ±0.15 ±1 ±0.05 mV % mV % 10 3 20 15 15 800 ppm/°C ppm/°C ppm/V ppm/mA ppm/mA μA μV p-p nV/√Hz μs ppm ppm dB mA 18 V V VOERR B Grade TEMPERATURE COEFFICIENT A Grade B Grade LINE REGULATION LOAD REGULATION QUIESCENT CURRENT VOLTAGE NOISE VOLTAGE NOISE DENSITY TURN-ON SETTLING TIME LONG-TERM STABILITY 2 OUTPUT VOLTAGE HYSTERESIS RIPPLE REJECTION RATIO SHORT CIRCUIT TO GND SUPPLY VOLTAGE OPERATING RANGE SUPPLY VOLTAGE HEADROOM 1 2 TCVO ∆VO/∆VIN ∆VO/∆IL ∆VO/∆IL IIN eN p-p eN tR ∆VO VO_HYS RRR ISC −40°C < TA < +125°C −40°C < TA < +125°C VIN = 4.1 V to 18 V, −40°C < TA < +125°C IL = 0 mA to 10 mA, VIN = 5.0 V, −40°C < TA < +125°C IL = −10 mA to 0 mA, VIN = 5.0 V, −40°C < TA < +125°C No load, −40°C < TA < +125°C 0.1 Hz to 10.0 Hz 1 kHz CL = 0 μF 1000 hours 2 1 5 560 3.5 60 10 40 20 –70 40 fIN = 1 kHz 4.1 2 VIN VIN − VO Initial accuracy does not include shift due to solder heat effect. The long-term stability specification is noncumulative. The drift in subsequent 1000 hour periods is significantly lower than in the first 1000 hour period. Rev. J | Page 4 of 24 ADR430/ADR431/ADR433/ADR434/ADR435/ADR439 ADR431 ELECTRICAL CHARACTERISTICS VIN = 4.5 V to 18 V, IL = 0 mA, TA = 25°C, unless otherwise noted. Table 3. Parameter OUTPUT VOLTAGE A Grade B Grade INITIAL ACCURACY 1 A Grade Symbol VO Conditions Min Typ Max Unit 2.497 2.499 2.500 2.500 2.503 2.501 V V ±3 ±0.12 ±1 ±0.04 mV % mV % 10 3 20 15 15 800 ppm/°C ppm/°C ppm/V ppm/mA ppm/mA μA μV p-p nV/√Hz μs ppm ppm dB mA 18 V V VOERR B Grade TEMPERATURE COEFFICIENT A Grade B Grade LINE REGULATION LOAD REGULATION QUIESCENT CURRENT VOLTAGE NOISE VOLTAGE NOISE DENSITY TURN-ON SETTLING TIME LONG-TERM STABILITY 2 OUTPUT VOLTAGE HYSTERESIS RIPPLE REJECTION RATIO SHORT CIRCUIT TO GND SUPPLY VOLTAGE OPERATING RANGE SUPPLY VOLTAGE HEADROOM 1 2 TCVO ∆VO/∆VIN ∆VO/∆IL ∆VO/∆IL IIN eN p-p eN tR ∆VO VO_HYS RRR ISC −40°C < TA < +125°C −40°C < TA < +125°C VIN = 4.5 V to 18 V, −40°C < TA < +125°C IL = 0 mA to 10 mA, VIN = 5.0 V, −40°C < TA < +125°C IL = −10 mA to 0 mA, VIN = 5.0 V, −40°C < TA < +125°C No load, −40°C < TA < +125°C 0.1 Hz to 10.0 Hz 1 kHz CL = 0 μF 1000 hours 2 1 5 580 3.5 80 10 40 20 −70 40 fIN = 1 kHz 4.5 2 VIN VIN − VO Initial accuracy does not include shift due to solder heat effect. The long-term stability specification is noncumulative. The drift in subsequent 1000 hour periods is significantly lower than in the first 1000 hour period. Rev. J | Page 5 of 24 ADR430/ADR431/ADR433/ADR434/ADR435/ADR439 ADR433 ELECTRICAL CHARACTERISTICS VIN = 5.0 V to 18 V, IL = 0 mA, TA = 25°C, unless otherwise noted. Table 4. Parameter OUTPUT VOLTAGE A Grade B Grade INITIAL ACCURACY 1 A Grade Symbol VO Conditions Min Typ Max Unit 2.996 2.9985 3.000 3.000 3.004 3.0015 V V ±4 ±0.13 ±1.5 ±0.05 mV % mV % 10 3 20 15 15 800 ppm/°C ppm/°C ppm/V ppm/mA ppm/mA μA μV p-p nV/√Hz μs ppm ppm dB mA 18 V V VOERR B Grade TEMPERATURE COEFFICIENT A Grade B Grade LINE REGULATION LOAD REGULATION QUIESCENT CURRENT VOLTAGE NOISE VOLTAGE NOISE DENSITY TURN-ON SETTLING TIME LONG-TERM STABILITY 2 OUTPUT VOLTAGE HYSTERESIS RIPPLE REJECTION RATIO SHORT CIRCUIT TO GND SUPPLY VOLTAGE OPERATING RANGE SUPPLY VOLTAGE HEADROOM 1 2 TCVO ∆VO/∆VIN ∆VO/∆IL ∆VO/∆IL IIN eN p-p eN tR ∆VO VO_HYS RRR ISC −40°C < TA < +125°C −40°C < TA < +125°C VIN = 5 V to 18 V, −40°C < TA < +125°C IL = 0 mA to 10 mA, VIN = 6 V, −40°C < TA < +125°C IL = −10 mA to 0 mA, VIN = 6 V, −40°C < TA < +125°C No load, −40°C < TA < +125°C 0.1 Hz to 10.0 Hz 1 kHz CL = 0 μF 1000 hours 2 1 5 590 3.75 90 10 40 20 −70 40 fIN = 1 kHz 5.0 2 VIN VIN − VO Initial accuracy does not include shift due to solder heat effect. The long-term stability specification is noncumulative. The drift in subsequent 1000 hour periods is significantly lower than in the first 1000 hour period. Rev. J | Page 6 of 24 ADR430/ADR431/ADR433/ADR434/ADR435/ADR439 ADR434 ELECTRICAL CHARACTERISTICS VIN = 6.1 V to 18 V, IL = 0 mA, TA = 25°C, unless otherwise noted. Table 5. Parameter OUTPUT VOLTAGE A Grade B Grade INITIAL ACCURACY 1 A Grade Symbol VO Conditions Min Typ Max Unit 4.091 4.0945 4.096 4.096 4.101 4.0975 V V ±5 ±0.12 ±1.5 ±0.04 mV % mV % 10 3 20 15 15 800 ppm/°C ppm/°C ppm/V ppm/mA ppm/mA μA μV p-p nV/√Hz μs ppm ppm dB mA 18 V V VOERR B Grade TEMPERATURE COEFFICIENT A Grade B Grade LINE REGULATION LOAD REGULATION QUIESCENT CURRENT VOLTAGE NOISE VOLTAGE NOISE DENSITY TURN-ON SETTLING TIME LONG-TERM STABILITY 2 OUTPUT VOLTAGE HYSTERESIS RIPPLE REJECTION RATIO SHORT CIRCUIT TO GND SUPPLY VOLTAGE OPERATING RANGE SUPPLY VOLTAGE HEADROOM 1 2 TCVO ∆VO/∆VIN ∆VO/∆IL ∆VO/∆IL IIN eN p-p eN tR ∆VO VO_HYS RRR ISC −40°C < TA < +125°C −40°C < TA < +125°C VIN = 6.1 V to 18 V, −40°C < TA < +125°C IL = 0 mA to 10 mA, VIN = 7 V, −40°C < TA < +125°C IL = −10 mA to 0 mA, VIN = 7 V, −40°C < TA < +125°C No load, −40°C < TA < +125°C 0.1 Hz to 10.0 Hz 1 kHz CL = 0 μF 1000 hours 2 1 5 595 6.25 100 10 40 20 −70 40 fIN = 1 kHz 6.1 2 VIN VIN − VO Initial accuracy does not include shift due to solder heat effect. The long-term stability specification is noncumulative. The drift in subsequent 1000 hour periods is significantly lower than in the first 1000 hour period. Rev. J | Page 7 of 24 ADR430/ADR431/ADR433/ADR434/ADR435/ADR439 ADR435 ELECTRICAL CHARACTERISTICS VIN = 7.0 V to 18 V, IL = 0 mA, TA = 25°C, unless otherwise noted. Table 6. Parameter OUTPUT VOLTAGE A Grade B Grade INITIAL ACCURACY 1 A Grade Symbol VO Conditions Min Typ Max Unit 4.994 4.998 5.000 5.000 5.006 5.002 V V ±6 ±0.12 ±2 ±0.04 mV % mV % 10 3 20 15 15 800 ppm/°C ppm/°C ppm/V ppm/mA ppm/mA μA μV p-p nV/√Hz μs ppm ppm dB mA V V VOERR B Grade TEMPERATURE COEFFICIENT A Grade B Grade LINE REGULATION LOAD REGULATION QUIESCENT CURRENT VOLTAGE NOISE VOLTAGE NOISE DENSITY TURN-ON SETTLING TIME LONG-TERM STABILITY 2 OUTPUT VOLTAGE HYSTERESIS RIPPLE REJECTION RATIO SHORT CIRCUIT TO GND SUPPLY VOLTAGE OPERATING RANGE SUPPLY VOLTAGE HEADROOM 1 2 TCVO ∆VO/∆VIN ∆VO/∆IL ∆VO/∆IL IIN eN p-p eN tR ∆VO VO_HYS RRR ISC VIN VIN − VO −40°C < TA < +125°C −40°C < TA < +125°C VIN = 7 V to 18 V, −40°C < TA < +125°C IL = 0 mA to 10 mA, VIN = 8 V, −40°C < TA < +125°C IL = −10 mA to 0 mA, VIN = 8 V, −40°C < TA < +125°C No load, −40°C < TA < +125°C 0.1 Hz to 10 Hz 1 kHz CL = 0 μF 1000 hours 2 1 5 620 8 115 10 40 20 −70 40 fIN = 1 kHz 7.0 2 18 Initial accuracy does not include shift due to solder heat effect. The long-term stability specification is noncumulative. The drift in subsequent 1000 hour periods is significantly lower than in the first 1000 hour period. Rev. J | Page 8 of 24 ADR430/ADR431/ADR433/ADR434/ADR435/ADR439 ADR439 ELECTRICAL CHARACTERISTICS VIN = 6.5 V to 18 V, IL = 0 mV, TA = 25°C, unless otherwise noted. Table 7. Parameter OUTPUT VOLTAGE A Grade B Grade INITIAL ACCURACY 1 A Grade Symbol VO Conditions Min Typ Max Unit 4.4946 4.498 4.500 4.500 4.5054 4.502 V V ±5.5 ±0.12 ±2 ±0.04 mV % mV % 10 3 20 15 15 800 ppm/°C ppm/°C ppm/V ppm/mA ppm/mA μA μV p-p nV/√Hz μs ppm ppm dB mA V V VOERR B Grade TEMPERATURE COEFFICIENT A Grade B Grade LINE REGULATION LOAD REGULATION QUIESCENT CURRENT VOLTAGE NOISE VOLTAGE NOISE DENSITY TURN-ON SETTLING TIME LONG-TERM STABILITY 2 OUTPUT VOLTAGE HYSTERESIS RIPPLE REJECTION RATIO SHORT CIRCUIT TO GND SUPPLY VOLTAGE OPERATING RANGE SUPPLY VOLTAGE HEADROOM 1 2 TCVO ∆VO/∆VIN ∆VO/∆IL ∆VO/∆IL IIN eN p-p eN tR ∆VO VO_HYS RRR ISC VIN VIN − VO −40°C < TA < +125°C −40°C < TA < +125°C VIN = 6.5 V to 18 V, −40°C < TA < +125°C IL = 0 mA to 10 mA, VIN = 6.5 V, −40°C < TA < +125°C IL = −10 mA to 0 mA, VIN = 6.5 V, −40°C < TA < +125°C No load, −40°C < TA < +125°C 0.1 Hz to 10.0 Hz 1 kHz CL = 0 μF 1000 hours 2 1 5 600 7.5 110 10 40 20 −70 40 fIN = 1 kHz 6.5 2 18 Initial accuracy does not include shift due to solder heat effect. The long-term stability specification is noncumulative. The drift in subsequent 1000 hour periods is significantly lower than in the first 1000 hour period. Rev. J | Page 9 of 24 ADR430/ADR431/ADR433/ADR434/ADR435/ADR439 ABSOLUTE MAXIMUM RATINGS TA = 25°C, unless otherwise noted. THERMAL RESISTANCE Table 8. θJA is specified for the worst-case conditions, that is, a device soldered in a circuit board for surface-mount packages. Parameter Supply Voltage Output Short-Circuit Duration to GND Storage Temperature Range Operating Temperature Range Junction Temperature Range Lead Temperature, Soldering (60 sec) Rating 20 V Indefinite −65°C to +150°C −40°C to +125°C −65°C to +150°C 300°C Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Table 9. Thermal Resistance Package Type 8-Lead SOIC_N (R) 8-Lead MSOP (RM) ESD CAUTION Rev. J | Page 10 of 24 θJA 130 142 θJC 43 44 Unit °C/W °C/W ADR430/ADR431/ADR433/ADR434/ADR435/ADR439 TYPICAL PERFORMANCE CHARACTERISTICS Default conditions: ±5 V, CL = 5 pF, G = 2, RG = RF = 1 kΩ, RL = 2 kΩ, VO = 2 V p-p, f = 1 MHz, TA = 25°C, unless otherwise noted. 0.8 2.5009 SUPPLY CURRENT (mA) OUTPUT VOLTAGE (V) 2.5007 2.5005 2.5003 2.5001 2.4999 0.7 +125°C 0.6 +25°C –40°C 0.5 0.4 –25 –10 5 20 35 50 65 80 95 110 125 TEMPERATURE (°C) 0.3 04500-015 2.4995 –40 4 8 10 12 14 16 INPUT VOLTAGE (V) Figure 6. ADR435 Supply Current vs. Input Voltage Figure 3. ADR431 Output Voltage vs. Temperature 4.0980 700 4.0975 650 SUPPLY CURRENT (µA) 4.0970 4.0965 4.0960 4.0955 600 550 500 –25 –10 5 20 35 50 65 80 95 110 125 TEMPERATURE (°C) 400 –40 04500-016 4.0950 –40 –25 –10 5 20 35 50 65 80 95 110 125 04500-019 450 18 04500-020 OUTPUT VOLTAGE (V) 6 04500-018 2.4997 TEMPERATURE (°C) Figure 4. ADR434 Output Voltage vs. Temperature Figure 7. ADR435 Supply Current vs. Temperature 0.60 5.0025 +125°C 0.58 5.0020 SUPPLY CURRENT (mA) 5.0010 5.0005 5.0000 0.54 0.52 +25°C 0.50 0.48 0.46 –40°C 0.44 4.9995 4.9990 –40 0.42 0.40 –25 –10 5 20 35 50 65 80 95 110 TEMPERATURE (°C) 125 04500-017 OUTPUT VOLTAGE (V) 0.56 5.0015 Figure 5. ADR435 Output Voltage vs. Temperature 6 8 10 12 14 16 INPUT VOLTAGE (V) Figure 8. ADR431 Supply Current vs. Input Voltage Rev. J | Page 11 of 24 ADR430/ADR431/ADR433/ADR434/ADR435/ADR439 2.5 610 DIFFERENTIAL VOLTAGE (V) SUPPLY CURRENT (µA) 580 550 520 490 460 2.0 –40°C 1.5 +25°C 1.0 +125°C 0.5 –25 –10 5 20 35 50 65 80 95 110 125 TEMPERATURE (°C) 0 –10 04500-021 400 –40 0 5 10 LOAD CURRENT (mA) Figure 9. ADR431 Supply Current vs. Temperature 15 –5 04500-024 430 Figure 12. ADR431 Minimum Input/Output Differential Voltage vs. Load Current 1.9 IL = 0mA to 10mA NO LOAD 12 MINIMUM HEADROOM (V) LOAD REGULATION (ppm/mA) 1.8 9 6 3 1.7 1.6 1.5 1.4 1.3 1.2 5 20 35 50 65 80 95 110 125 TEMPERATURE (°C) 1.0 –40 DIFFERENTIAL VOLTAGE (V) 6 3 5 20 35 50 65 80 95 110 TEMPERATURE (°C) 125 04500-023 LOAD REGULATION (ppm/mA) 9 –10 20 35 50 65 80 95 110 125 2.5 12 –25 5 Figure 13. ADR431 Minimum Headroom vs. Temperature IL = 0mA to 10mA 0 –40 –10 TEMPERATURE (°C) Figure 10. ADR431 Load Regulation vs. Temperature 15 –25 Figure 11. ADR435 Load Regulation vs. Temperature 2.0 –40°C 1.5 +25°C 1.0 +125°C 0.5 0 –10 –5 0 5 LOAD CURRENT (mA) Figure 14. ADR435 Minimum Input/Output Differential Voltage vs. Load Current Rev. J | Page 12 of 24 10 04500-026 –10 04500-022 –25 04500-025 1.1 0 –40 ADR430/ADR431/ADR433/ADR434/ADR435/ADR439 1.9 NO LOAD MINIMUM HEADROOM (V) 1.7 CL = 0.01µF NO INPUT CAPACITOR VO = 1V/DIV 1.5 1.3 1.1 –25 –10 5 20 35 50 65 80 95 110 125 TEMPERATURE (°C) TIME = 4µs/DIV 04500-027 0.9 –40 Figure 15. ADR435 Minimum Headroom vs. Temperature 04500-031 VIN = 2V/DIV Figure 18. ADR431 Turn-On Response, 0.01 μF Load Capacitor 20 VIN = 7V TO 18V VO = 1V/DIV 12 CIN = 0.01µF NO LOAD 8 4 0 –25 –10 5 20 35 50 65 80 95 110 125 TEMPERATURE (°C) 04500-028 Figure 19. ADR431 Turn-Off Response Figure 16. ADR435 Line Regulation vs. Temperature CIN = 0.01µF NO LOAD BYPASS CAPACITOR = 0µF LINE INTERRUPTION VO = 1V/DIV VIN = 500mV/DIV VO = 50mV/DIV VIN = 2V/DIV TIME = 4µs/DIV TIME = 100µs/DIV Figure 20. ADR431 Line Transient Response Figure 17. ADR431 Turn-On Response Rev. J | Page 13 of 24 04500-033 –4 –40 TIME = 4µs/DIV 04500-032 VIN = 2V/DIV 04500-030 LINE REGULATION (ppm/V) 16 ADR430/ADR431/ADR433/ADR434/ADR435/ADR439 BYPASS CAPACITOR = 0.1µF LINE INTERRUPTION VIN = 500mV/DIV VO = 50mV/DIV TIME = 1s/DIV Figure 21. ADR431 Line Transient Response, 0.1 μF Bypass Capacitor 04500-037 TIME = 100µs/DIV 04500-034 2µV/DIV Figure 24. ADR435 0.1 Hz to 10.0 Hz Voltage Noise 1µV/DIV 50µV/DIV 04500-038 TIME = 1s/DIV 04500-035 TIME = 1s/DIV Figure 25. ADR435 10 Hz to 10 kHz Voltage Noise Figure 22. ADR431 0.1 Hz to 10.0 Hz Voltage Noise 14 NUMBER OF PARTS 12 10 8 6 4 50µV/DIV 0 –110 –90 04500-036 TIME = 1s/DIV –70 –50 –30 –10 10 30 50 DEVIATION (PPM) Figure 23. ADR431 10 Hz to 10 kHz Voltage Noise Figure 26. ADR431 Typical Hysteresis Rev. J | Page 14 of 24 70 90 110 04500-029 2 ADR430/ADR431/ADR433/ADR434/ADR435/ADR439 50 10 45 –10 RIPPLE REJECTION (dB) 35 30 ADR435 20 15 ADR433 10 ADR430 5 0 100 1k 10k FREQUENCY (Hz) 100k –30 –50 –70 –90 –110 –130 –150 10 100 1k 10k FREQUENCY (Hz) Figure 27. Output Impedance vs. Frequency Figure 28. Ripple Rejection Rev. J | Page 15 of 24 100k 1M 04500-040 25 04500-039 OUTPUT IMPEDANCE (Ω) 40 ADR430/ADR431/ADR433/ADR434/ADR435/ADR439 THEORY OF OPERATION The intrinsic reference voltage is around 0.5 V with a negative temperature coefficient of about −120 ppm/°C. This slope is essentially constant to the dielectric constant of silicon and can be compensated closely by adding a correction term generated in the same fashion as the proportional-to-temperature (PTAT) term used to compensate band gap references. The primary advantage of an XFET reference is its correction term, which is ~30 times lower and requires less correction than that of a band gap reference. Because most of the noise of a band gap reference comes from the temperature compensation circuitry, the XFET results in much lower noise. The ADR43x family of references is guaranteed to deliver load currents to 10 mA with an input voltage that ranges from 4.1 V to 18 V. When these devices are used in applications at higher currents, use the following equation to account for the temperature effects due to the power dissipation increases: TJ = PD × θJA + TA where: TJ and TA are the junction and ambient temperatures, respectively. PD is the device power dissipation. θJA is the device package thermal resistance. BASIC VOLTAGE REFERENCE CONNECTIONS Voltage references, in general, require a bypass capacitor connected from VOUT to GND. The circuit in Figure 30 illustrates the basic configuration for the ADR43x family of references. Other than a 0.1 μF capacitor at the output to help improve noise suppression, a large output capacitor at the output is not required for circuit stability. TP VIN Figure 29 shows the basic topology of the ADR43x series. The temperature correction term is provided by a current source with a value designed to be proportional to absolute temperature. The general equation is VOUT = G (ΔVP – R1 × IPTAT) ADR43x devices are created by on-chip adjustment of R2 and R3 to achieve 2.048 V or 2.500 V, respectively, at the reference output. I1 VIN I1 ADR43x IPTAT VOUT R2 * R1 *EXTRA CHANNEL IMPLANT VOUT = G(∆VP – R1 × IPTAT) Figure 29. Simplified Schematic Device Power Dissipation Considerations R3 GND 04500-002 ∆VP 10µF + 1 0.1µF NC GND 8 ADR43x TP COMP VOUT TOP VIEW 6 (Not to Scale) 4 5 TRIM 2 7 3 0.1µF NOTES: 1. NC = NO CONNECT 2. TP = TEST PIN (DO NOT CONNECT) (1) where: G is the gain of the reciprocal of the divider ratio. ΔVP is the difference in pinch-off voltage between the two JFETs. IPTAT is the positive temperature coefficient correction current. (2) 04500-044 The ADR43x series of references uses a reference generation technique known as XFET (eXtra implanted junction FET). This technique yields a reference with low supply current, good thermal hysteresis, and exceptionally low noise. The core of the XFET reference consists of two junction field-effect transistors (JFETs), one of which has an extra channel implant to raise its pinch-off voltage. By running the two JFETs at the same drain current, the difference in pinch-off voltage can be amplified and used to form a highly stable voltage reference. Figure 30. Basic Voltage Reference Configuration NOISE PERFORMANCE The noise generated by the ADR43x family of references is typically less than 3.75 μV p-p over the 0.1 Hz to 10.0 Hz band for ADR430, ADR431, and ADR433. Figure 22 shows the 0.1 Hz to 10.0 Hz noise of the ADR431, which is only 3.5 μV p-p. The noise measurement is made with a band-pass filter made of a 2-pole high-pass filter with a corner frequency at 0.1 Hz and a 2-pole low-pass filter with a corner frequency at 10.0 Hz. HIGH FREQUENCY NOISE The total noise generated by the ADR43x family of references is composed of the reference noise and the op amp noise. Figure 31 shows the wideband noise from 10 Hz to 25 kHz. An internal node of the op amp is brought out on Pin 7, and by overcompensating the op amp, the overall noise can be reduced. This is understood by considering that in a closed-loop configuration, the effective output impedance of an op amp is RO = rO 1 + AVO β where: RO is the apparent output impedance. rO is the output resistance of the op amp. AVO is the open-loop gain at the frequency of interest. β is the feedback factor. Rev. J | Page 16 of 24 (3) ADR430/ADR431/ADR433/ADR434/ADR435/ADR439 1000 ADR431 NO COMPENSATION CL = 1µF 10µF + CL = 50µF 1 2 0.1µF NC GND 8 ADR43x 7 TP COMP 82kΩ VOUT TOP VIEW 6 (Not to Scale) 4 5 TRIM 10nF 3 0.1µF NOTES 1. NC = NO CONNECT 2. TP = TEST PIN (DO NOT CONNECT) Figure 32. Compensated Reference The 82 kΩ resistor and 10 nF capacitor can eliminate the noise peaking (see Figure 33). The COMP pin should be left unconnected if unused. 100 CL = 10µF RC 82kΩ AND 10nF CL = 1µF RC 82kΩ AND 10nF CL = 50µF RC 82kΩ AND 10nF 10 10 CL = 0µF 100 1k FREQUENCY (Hz) 10k 04500-043 100 Figure 33. Noise with Compensation Network 10 10 100 1k 10k FREQUENCY (Hz) Figure 31. Noise vs. Capacitive Loading 100k 04500-042 NOISE DENSITY (nV/√Hz) CL = 10µF TP VIN NOISE DENSITY (nV/√Hz) However, references are used increasingly to drive the reference input of an ADC that may present a dynamic, switching capacitive load. Large capacitors, in the microfarad range, are used to reduce the change in reference voltage to less than one-half LSB. Figure 31 shows the ADR431 noise spectrum with various capacitive values to 50 μF. With no capacitive load, the noise spectrum is relatively flat at approximately 60 nV/√Hz to 70 nV/√Hz. With various values of capacitive loading, the predicted noise peaking becomes evident. The op amp within the ADR43x family uses the classic RC compensation technique. Monolithic capacitors in an IC are limited to tens of picofarads. With very large external capacitive loads, such as 50 μF, it is necessary to overcompensate the op amp. The internal compensation node is brought out on Pin 7, and an external series RC network can be added between Pin 7 and the output, Pin 6, as shown in Figure 32. 04500-003 Equation 3 shows that the apparent output impedance is reduced by approximately the excess loop gain; therefore, as the frequency increases, the excess loop gain decreases, and the apparent output impedance increases. A passive element whose impedance increases as its frequency increases is an inductor. When a capacitor is added to the output of an op amp or a reference, it forms a tuned circuit that resonates at a certain frequency and results in gain peaking. This can be observed by using a model of a semiperfect op amp with a single-pole response and some pure resistance in series with the output. Changing capacitive loads results in peaking at different frequencies. For most normal op amp applications with low capacitive loading (<100 pF), this effect is usually not observed. TURN-ON TIME Upon application of power (cold start), the time required for the output voltage to reach its final value within a specified error band is defined as the turn-on settling time. Two components normally associated with this are the time for the active circuits to settle and the time for the thermal gradients on the chip to stabilize. Figure 17 and Figure 18 show the turn-on settling time for the ADR431. Rev. J | Page 17 of 24 ADR430/ADR431/ADR433/ADR434/ADR435/ADR439 APPLICATIONS INFORMATION SOURCE FIBER OUTPUT ADJUSTMENT GIMBAL + SENSOR ACTIVATOR LEFT PREAMP ADR431 ADR431 OUTPUT VO = ±0.5% ADC DAC ADR431 DSP GND Figure 35. All Optical Router Network TRIM GND R2 RP 10kΩ HIGH VOLTAGE FLOATING CURRENT SOURCE 10kΩ (ADR430) 15kΩ (ADR431) The circuit in Figure 36 can be used to generate a floating current source with minimal self heating. This particular configuration can operate on high supply voltages determined by the breakdown voltage of the N-channel JFET. Figure 34. Output Trim Adjustment +VS REFERENCE FOR CONVERTERS IN OPTICAL NETWORK CONTROL CIRCUITS SST111 VISHAY In Figure 35, the high capacity, all optical router network employs arrays of micromirrors to direct and route optical signals from fiber to fiber without first converting them to electrical form, which reduces the communication speed. The tiny micromechanical mirrors are positioned so that each is illuminated by a single wavelength that carries unique information and can be passed to any desired input and output fiber. The mirrors are tilted by the dual-axis actuators, which are controlled by precision ADCs and DACs within the system. Due to the microscopic movement of the mirrors, not only is the precision of the converters important but the noise associated with these controlling converters is also extremely critical. Total noise within the system can be multiplied by the number of converters employed. Therefore, to maintain the stability of the control loop for this application, the ADR43x, with its exceptionally low noise, is necessary. 2 VIN VOUT 6 ADR43x OP90 2N3904 GND 4 RL 2.1kΩ –VS 04500-007 R1 470kΩ 04500-004 ADR43x AMPL CONTROL ELECTRONICS DAC VOUT ACTIVATOR RIGHT MEMS MIRROR AMPL INPUT VIN DESTINATION FIBER LASER BEAM 04500-005 The ADR43x trim terminal can be used to adjust the output voltage over a ±0.5% range. This feature allows the system designer to trim system errors out by setting the reference to a voltage other than the nominal. This is also helpful if the part is used in a system at temperature to trim out any error. Adjustment of the output has negligible effect on the temperature performance of the device. To avoid degrading temperature coefficients, both the trimming potentiometer and the two resistors need to be low temperature coefficient types, preferably <100 ppm/°C. Figure 36. High Voltage Floating Current Source KELVIN CONNECTION In many portable instrumentation applications, where printed circuit board (PCB) cost and area go hand in hand, circuit interconnects are very often of dimensionally minimum width. These narrow lines can cause large voltage drops if the voltage reference is required to provide load currents to various functions. In fact, circuit interconnects can exhibit a typical line resistance of 0.45 mΩ/square (for example, 1 oz. Cu). Force and sense connections, also referred to as Kelvin connections, offer a convenient method of eliminating the effects of voltage drops in circuit wires. Load currents flowing through wiring resistance produce an error (VERROR = R × IL) at the load. However, the Kelvin connection of Figure 37 overcomes the problem by including the wiring resistance within the forcing loop of the operational amplifier. Because the amplifier senses the load voltage, the operational amplifier loop control forces the output to compensate for the wiring error and to produce the correct voltage at the load. Rev. J | Page 18 of 24 ADR430/ADR431/ADR433/ADR434/ADR435/ADR439 VIN PROGRAMMABLE CURRENT SOURCE RLW VOUT SENSE VIN ADR43x RLW A1 OP191 + VOUT 6 Together with a digital potentiometer and a Howland current pump, the ADR435 forms the reference source for a programmable current as VOUT FORCE ⎛ R2 A + R2 B ⎜ R1 IL = ⎜ ⎜ R2 B ⎜ ⎝ RL 04500-008 GND 4 Figure 37. Advantage of Kelvin Connection DUAL POLARITY REFERENCES VIN 0.1µF 2 VOUT 6 VIN +5V R1 10kΩ ADR435 U1 GND R2 10kΩ +10V TRIM 5 V+ 4 OP1177 –5V 04500-009 U2 V– R3 5kΩ (4) and Dual polarity references can easily be made with an operational amplifier and a pair of resistors. To avoid defeating the accuracy obtained by the ADR43x, it is imperative to match the resistance tolerance as well as the temperature coefficient of all the components. 1µF ⎞ ⎟ ⎟ ×V ⎟ W ⎟ ⎠ –10V Figure 38. +5 V and −5 V References Using ADR435 +2.5V +10V VW = D × VREF 2N (5) where: D is the decimal equivalent of the input code. N is the number of bits. In addition, R1' and R2' must be equal to R1 and (R2A + R2B), respectively. In theory, R2B can be made as small as needed to achieve the necessary current within the A2 output current driving capability. In this example, the OP2177 can deliver a maximum output current of 10 mA. Because the current pump employs both positive and negative feedback, C1 and C2 capacitors are needed to ensure that the negative feedback prevails and, therefore, avoids oscillation. This circuit also allows bidirectional current flow if the VA and VB inputs of the digital potentiometer are supplied with the dual polarity references, as shown in Figure 40. C1 10pF 2 VIN VOUT 6 ADR435 U1 GND 4 R1' 50kΩ VDD R1 5.6kΩ 2 TRIM 5 VIN R2 5.6kΩ U1 U2 V– GND 04500-010 –10V VDD TRIM 5 ADR435 V+ OP1177 –2.5V R2' 1kΩ VOUT 6 V+ U2 AD5232 VDD C2 10pF OP2177 R1 50kΩ VSS A2 V– A 4 V+ B W OP2177 R2A 1kΩ A1 V– Figure 39. +2.5 V and −2.5 V References Using ADR435 VSS R2B 10Ω + VL – IL IL Figure 40. Programmable Current Source Rev. J | Page 19 of 24 04500-011 2 ADR430/ADR431/ADR433/ADR434/ADR435/ADR439 PROGRAMMABLE DAC REFERENCE VOLTAGE PRECISION VOLTAGE REFERENCE FOR DATA CONVERTERS By employing a multichannel DAC, such as the AD7398, quad, 12-bit voltage output DAC, one of its internal DACs and an ADR43x voltage reference can be used as a common programmable VREFX for the rest of the DACs. The circuit configuration is shown in Figure 41. VOUTA R1 ± 0.1% R2 ± 0.1% Another example of an ADC for which the ADR431 is well suited is the AD7701. Figure 42 shows the ADR431 used as the precision reference for this converter. The AD7701 is a 16-bit ADC with on-chip digital filtering intended for the measurement of wide dynamic range and low frequency signals, such as those representing chemical, physical, or biological processes. It contains a charge-balancing Σ-Δ ADC, a calibration microcontroller with on-chip static RAM, a clock oscillator, and a serial communications port. VREF VIN VREFB VOUTB DAC B VREFC VOUTC DAC C VREFD VOUTD DAC D ADR43x VOB = VREFX (DB) VOC = VREFX (DC) +5V ANALOG SUPPLY 0.1µF 10µF 2 VIN VOD = VREFX (DD) AD7398 VOUT 6 0.1µF Figure 41. Programmable DAC Reference R2 ⎞ VREF × ⎛⎜1 + ⎟ ⎝ R1 ⎠ = ⎛1 + D × R2 ⎞ ⎜ ⎟ ⎝ 2 N R1 ⎠ (6) where: D is the decimal equivalent of the input code. N is the number of bits. VREF is the applied external reference. VREFX is the reference voltage for DAC A to DAC D. Digital Code 0000 0000 0000 1000 0000 0000 1111 1111 1111 0000 0000 0000 1000 0000 0000 1111 1111 1111 CS CAL ANALOG INPUT AIN ANALOG GROUND AGND AVSS 0.1µF DATA READY READ (TRANSMIT) SCLK SERIAL CLOCK SDATA SERIAL CLOCK CLKIN CLKOUT SC1 SC2 DGND 0.1µF 0.1µF –5V ANALOG SUPPLY 0.1µF MODE DRDY BP/UP CALIBRATE DVSS 10µF Figure 42. Voltage Reference for the AD7701 16-Bit ADC Table 10. VREFX vs. R1 and R2 R1, R2 R1 = R2 R1 = R2 R1 = R2 R1 = 3R2 R1 = 3R2 R1 = 3R2 VREF ADR431 RANGES SELECT DVDD SLEEP GND 4 The relationship of VREFX to VREF depends on the digital code and the ratio of R1 and R2, given by VREFX AD7701 AVDD 04500-012 DAC A VREF 2 VREF 1.3 VREF VREF 4 VREF 1.6 VREF VREF Rev. J | Page 20 of 24 04500-013 VREFA The ADR43x family has a number of features that make it ideal for use with ADCs and DACs. The exceptional low noise, tight temperature coefficient, and high accuracy characteristics make the ADR43x ideal for low noise applications, such as cellular base station applications. ADR430/ADR431/ADR433/ADR434/ADR435/ADR439 N1 A precision voltage output with boosted current capability can be realized with the circuit shown in Figure 43. In this circuit, U2 forces VO to be equal to VREF by regulating the turn-on of N1. Therefore, the load current is furnished by VIN. In this configuration, a 50 mA load is achievable at a VIN of 5 V. Moderate heat is generated on the MOSFET, and higher current can be achieved with a replacement of the larger device. In addition, for a heavy capacitive load with step input, a buffer can be added at the output to enhance the transient response. VIN Rev. J | Page 21 of 24 2 5V VIN U1 VOUT 6 VO 2N7002 ADR431 + U2 V+ AD8601 TRIM 5 GND RL 25Ω – V– 4 04500-014 PRECISION BOOSTED OUTPUT REGULATOR Figure 43. Precision Boosted Output Regulator ADR430/ADR431/ADR433/ADR434/ADR435/ADR439 OUTLINE DIMENSIONS 3.20 3.00 2.80 8 3.20 3.00 2.80 5.15 4.90 4.65 5 1 4 PIN 1 IDENTIFIER 0.65 BSC 0.95 0.85 0.75 15° MAX 1.10 MAX 0.80 0.55 0.40 0.23 0.09 6° 0° 0.40 0.25 10-07-2009-B 0.15 0.05 COPLANARITY 0.10 COMPLIANT TO JEDEC STANDARDS MO-187-AA Figure 44. 8-Lead Mini Small Outline Package [MSOP] (RM-8) Dimensions shown in millimeters 5.00 (0.1968) 4.80 (0.1890) 8 1 5 6.20 (0.2441) 5.80 (0.2284) 4 1.27 (0.0500) BSC 0.25 (0.0098) 0.10 (0.0040) COPLANARITY 0.10 SEATING PLANE 1.75 (0.0688) 1.35 (0.0532) 0.51 (0.0201) 0.31 (0.0122) 0.50 (0.0196) 0.25 (0.0099) 45° 8° 0° 0.25 (0.0098) 0.17 (0.0067) 1.27 (0.0500) 0.40 (0.0157) COMPLIANT TO JEDEC STANDARDS MS-012-AA CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. Figure 45. 8-Lead Standard Small Outline Package [SOIC_N] Narrow Body (R-8) Dimensions shown in millimeters and (inches) Rev. J | Page 22 of 24 012407-A 4.00 (0.1574) 3.80 (0.1497) ADR430/ADR431/ADR433/ADR434/ADR435/ADR439 ORDERING GUIDE Model 1 Output Voltage (V) ADR430ARZ ADR430ARZ-REEL7 ADR430ARMZ ADR430ARMZ-REEL7 ADR430BRZ ADR430BRZ-REEL7 ADR431ARZ ADR431ARZ-REEL7 ADR431ARMZ ADR431ARMZ-REEL7 ADR431BR ADR431BR-REEL7 ADR431BRZ ADR431BRZ-REEL7 ADR433ARZ ADR433ARZ-REEL7 ADR433ARMZ ADR433ARMZ-REEL7 ADR433BRZ ADR433BRZ-REEL7 ADR434ARZ ADR434ARZ-REEL7 ADR434ARMZ ADR434ARMZ-REEL7 ADR434BRZ ADR434BRZ-REEL7 ADR435ARZ ADR435ARZ-REEL7 ADR435ARMZ ADR435ARMZ-REEL7 ADR435BRMZ ADR435BRMZ-R7 ADR435BRZ ADR435BRZ-REEL7 ADR439ARZ-REEL7 ADR439ARMZ-REEL7 ADR439BRZ-REEL7 2.048 2.048 2.048 2.048 2.048 2.048 2.500 2.500 2.500 2.500 2.500 2.500 2.500 2.500 3.000 3.000 3.000 3.000 3.000 3.000 4.096 4.096 4.096 4.096 4.096 4.096 5.000 5.000 5.000 5.000 5.000 5.000 5.000 5.000 4.500 4.500 4.500 1 Initial Accuracy, ± (mV) (%) 3 0.15 3 0.15 3 0.15 3 0.15 1 0.05 1 0.05 3 0.12 3 0.12 3 0.12 3 0.12 1 0.04 1 0.04 1 0.04 1 0.04 4 0.13 4 0.13 4 0.13 4 0.13 1.5 0.05 1.5 0.05 5 0.12 5 0.12 5 0.12 5 0.12 1.5 0.04 1.5 0.04 6 0.12 6 0.12 6 0.12 6 0.12 2 0.04 2 0.04 2 0.04 2 0.04 5.5 0.12 5.5 0.12 2 0.04 Temperature Coefficient Package (ppm/°C) Temperature Range Package Description Package Option Ordering Quantity 10 10 10 10 3 3 10 10 10 10 3 3 3 3 10 10 10 10 3 3 10 10 10 10 3 3 10 10 10 10 3 3 3 3 10 10 3 −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C –40°C to +125°C –40°C to +125°C –40°C to +125°C –40°C to +125°C –40°C to +125°C –40°C to +125°C –40°C to +125°C –40°C to +125°C –40°C to +125°C –40°C to +125°C –40°C to +125°C 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead MSOP 8-Lead MSOP 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead MSOP 8-Lead MSOP 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead MSOP 8-Lead MSOP 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead MSOP 8-Lead MSOP 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead MSOP 8-Lead MSOP 8-Lead MSOP 8-Lead MSOP 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead MSOP 8-Lead SOIC_N R-8 R-8 RM-8 RM-8 R-8 R-8 R-8 R-8 RM-8 RM-8 R-8 R-8 R-8 R-8 R-8 R-8 RM-8 RM-8 R-8 R-8 R-8 R-8 RM-8 RM-8 R-8 R-8 R-8 R-8 RM-8 RM-8 RM-8 RM-8 R-8 R-8 R-8 RM-8 R-8 98 1,000 50 1,000 98 1,000 98 1,000 50 1,000 98 1,000 98 1,000 98 1,000 50 1,000 98 1,000 98 1,000 50 1,000 98 1,000 98 1,000 50 1,000 50 1,000 98 1,000 1,000 1,000 1,000 Z = RoHS Compliant Part. Rev. J | Page 23 of 24 Branding R10 R10 R12 R12 R14 R14 R16 R16 R18 R18 R19 R19 R1C ADR430/ADR431/ADR433/ADR434/ADR435/ADR439 NOTES ©2003–2011 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D04500-0-7/11(J) Rev. J | Page 24 of 24