12MHz 20V/μs G=1,2,4,8 Programmable Gain iCMOS™ Instrumentation Amplifier AD8251 Preliminary Technical Data FEATURES Easy to Use Programmable Gains: 1, 2, 4, 8 Digital or Pin Programmable Gain Setting Temp Range -40°C to 85°C GENERAL DESCRIPTION The AD8251 is a digitally gain programmable instrumentation amplifier that has high GΩ input impedance and low distortion making it suitable for sensor interfacing and driving high sample rate analog to digital converters. It has high bandwidth of 12MHz, low distortion and settle time of 0.5us to 0.01%. Offset drift and gain drift are limited to 1uV/°C and 10ppm/°C respectively. In addition to its wide input common-voltage range, it boasts a high common-mode rejection of 80dB at G=1 from DC to 50kHz. The combination of precision DC performance coupled with high speed capabilities make the AD8251 an excellent candidate for data acquisition and medical applications. Furthermore, this monolithic solution simplifies design, manufacturing and boosts performance of instrumentation by maintaining tight match of internal resistors and amplifiers. EXCELLENT DC PERFORMANCE High CMRR 98dB G=8 Low Gain Drift: 10ppm/°C Low Offset Drift: 1uV/°C Low Offset: 75uV G=8 EXCELLENT AC PERFORMANCE Fast Settle Time: 0.5us to 0.01% High Slew Rate: 20V/μs High CMRR over Frequency: 80dB to 50kHz Low Noise: 13nV√Hz, G=8 Low Power: 3.5 mA (typ) Supply: ±5V to ±12V The AD8251’s user interface comprises of a parallel port that allows users to set the gain in one of three different ways. A two bit word sent to A1 and A2, via a bus may be latched using the WR input. An alternative is to set the gain within 1μs by using the gain port in transparent mode where the state of A0 and A1 directly set the gain. The last method is to strap A1 and A2 to a high or low voltage potential, permanently setting the gain. Applications Data Acquisition Bio-Medical Analysis Test and Measurement High Performance System Monitoring DGD WR A1 A0 Logic -IN OUT +IN The AD8251 is available in a 10 pin MSOP package and specified over -40°C to 85°C, making it an excellent solution for applications where size and packing density are important considerations. AD8251 +VS -VS REF Figure 1. Functional Block Diagram Rev.PrB Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective companies. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. www.analog.com Tel: 781.329.4700 Fax: 781.326.8703 © 2006 Analog Devices, Inc. All rights reserved. AD8251 Preliminary Technical Data TABLE OF CONTENTS AD8251—Specifications.................................................................. 3 Transparent Gain Setting Mode: .................................................5 Timing Diagram ........................................................................... 5 Write Enable Gain Setting Mode:................................................5 Absolute Maximum Ratings............................................................ 5 Outline Dimensions ..........................................................................5 Pin Configurations And Functional Descriptions ....................... 5 ESD Caution...................................................................................5 Preliminary Revision : B REVISION HISTORY Rev. PrB | Page 2 of 8 Preliminary Technical Data AD8251 AD8251—SPECIFICATIONS Table 1. VS = ±12 V, VREF = 0 V (@TA = 25oC, G = +1, RL = 2 kΩ, unless otherwise noted.) Parameter COMMON-MODE REJECTION RATIO (CMRR) CMRR to 60 Hz with 1 kΩ Source Imbalance CMRR to 50kHz NOISE Voltage Noise, 1kHz RTI, 0.1 Hz to 10 Hz Current Noise VOLTAGE OFFSET Offset, VOS Over Temperature Average TC Offset, VOS Over Temperature Average TC Offset, VOS Over Temperature Average TC Offset, VOS Over Temperature Average TC Offset Referred to the Input vs. Supply (PSR) G=1 G=2 G=4 G=8 INPUT CURRENT Input Bias Current Over Temperature Conditions Min VCM = -10 V to +10 V G=1 G=2 G=4 G=8 VCM = -10 V to +10 V G=1 G=2 G=4 G=8 AD8251ARM Typ Max Unit 80 86 92 98 dB dB dB 80 dB dB dB dB dB G=1 G=2 G=4 G=8 G=1 G=2 G=4 G=8 f = 1kHz 32 20 15 13 G=1, VS = ±5 V to ±12 V T = -40°C to +85°C T = -40°C to +85°C G=2, VS = ±5 V to ±12 V T = -40°C to +85°C T = -40°C to +85°C G=4, VS = ±5 V to ±12 V T = -40°C to +85°C T = -40°C to +85°C G=8, VS = ±5 V to ±12 V T = -40°C to +85°C T = -40°C to +85°C 250 nV/√Hz nV/√Hz nV/√Hz nV/√Hz μV p-p μV p-p μV p-p μV p-p fA/√Hz μV μV μV/°C μV 150 μV μV/°C μV 100 μV μV/°C μV 75 μV μV/°C VS = ±8 V to ±12 V 96 115 110 110 110 10 T = -40°C to +85°C Rev. PrB| Page 3 of 8 dB dB dB dB 25 35 nA nA AD8251 Parameter Average TC Input Offset Current Over Temperature Average TC DYNAMIC RESPONSE Small Signal -3dB Bandwidth Settling Time 0.01% Settling Time 0.001% Slew Rate Total Harmonic Distortion + Noise GAIN Gain Range: 1, 2, 4, 8 Gain Error Gain Nonlinearity Gain Nonlinearity Gain vs. Temperature Preliminary Technical Data Conditions Min AD8251ARM Typ Max 5 10 nA nA T = -40°C to +85°C G=1 G=2 G=4 G=8 10 V Step G=1 G=2 G=4 G=8 10 V Step G=1 G=2 G=4 G=8 1.5 pA/°C 17 15 12 5 MHz MHz MHz MHz 0.5 μS μS μS μS 1.5 μS μS μS μS 20 G=1 G=2 G=4 G=8 35 35 35 35 30 30 30 V/μS V/μS V/μS V/μS RL = 100kOhms, G=1 RL = 2kOhms, G=1 % % 1 VOUT= ±10 V G=1 G=2 G=4 G=8 VOUT = –10 V to +10 V G=1, RL = 10 kΩ G=2, RL = 10 kΩ G=4, RL = 10 kΩ G=8, RL = 10 kΩ G=1-8, RL = 2 kΩ All Gains 10 V/V 0.05 % 4 4 4 4 4 ppm ppm ppm ppm ppm 10 INPUT Input Impedance Differential Common Mode Input Operating Voltage Range Over Temperature Unit pA/°C ppm/°C 1|| 2 1|| 2 VS = ±5 V to ±12 V T = -40°C to +85°C -Vs + 1 GΩ|| pF GΩ|| pF +Vs 1.5 V V Rev. PrB | Page 4 of 8 Preliminary Technical Data AD8251 Parameter Conditions Min OUTPUT RL = 10 kΩ, Output Swing Over Temperature Short Circuit Current REFERENCE INPUT RIN IIN Voltage Range Gain to Output Digital Logic Inputs Digital Ground Voltage, DGND Digital Input Voltage Low Digital Input Voltage High Digital Input Leakage Current Gain Switching Time TSU THD TWR_LO TWR_HI POWER SUPPLY Operating Range3 Quiescent Current Over Temperature TEMPERATURE RANGE Specified Performance VS = ±5 V to ±12 V T = -40°C to +85°C AD8251ARM Typ Max –Vs + 1.5 +Vs – 1.5 Unit V V 20 mA 20 kΩ μA VIN+, VIN–, VREF = 0 –Vs +Vs V V/V V V 1 4 Referenced to DGND Referenced to DGND V V pA ns ns ns ns ns ±5 ±12 3.5 mA T = -40°C to +85°C mA –40 TIMING DIAGRAM tWR-HI tWR-LO WR tSU tHD A0, A1 Figure 2.Timing Diagram Rev. PrB| Page 5 of 8 +85 °C AD8251 Preliminary Technical Data ABSOLUTE MAXIMUM RATINGS Board) Table 2. AD8251 Absolute Maximum Ratings Parameter Supply Voltage Power Dissipation Output Short Circuit Current Common-Mode Input Voltage Differential Input Voltage Storage Temperature Operating Temperature Range Lead Temperature Range (Soldering 10 sec) Junction Temperature ΘJA (4 layer JEDEC Standard Rating +/-14V See Figure 2 -Vs – 0.5 V to +Vs + 0.5 V V –65°C to +125°C –40°C to +85°C °C °C °C/W Package Glass Transition Temperature ESD (Human Body Model) ESD (Charge Device Model) ESD (Machine Model) °C kV kV kV Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other condition s above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Rev. PrB | Page 6 of 8 Preliminary Technical Data AD8251 PIN CONFIGURATIONS AND FUNCTIONAL DESCRIPTIONS -IN 1 10 +IN DGND 2 9 VREF AD8251 TRANSPARENT GAIN SETTING MODE: In this mode, the gain is set by toggling A0 and A1 to HIGH or LOW. To enable transparent mode, tie WR to –Vs. This configures the AD8251 to change gains when A0 and A1 are set according to Table 4. -VS 3 8 +VS TOP VIEW A0 4 (Not to Scale) 7 VOUT A1 5 6 WR Table 4. . Transparent Mode Gain Settings NC = NO CONNECT Figure 3. 10-Lead MSOP G WR A1 A0 1 -Vs LO LO 2 -Vs LO HI 4 -Vs HI LO 8 -Vs HI HI WRITE ENABLE GAIN SETTING MODE: In this mode, the gains are changed only during the negative edge of the WR strobe. So for instance, the gain is determined by the two bit value held on A0 and A1 at the time the WR strobe transitions from HIGH to LOW. Table 3. Pin Function Descriptions— 10-Lead MSOP(ARM PACKAGE) Pin No. 1 Name -IN 2 3 4 5 6 DGND -Vs A0 A1 WR 7 8 9 VOUT +Vs VREF 10 +IN Description Inverting Input Terminal (True differential input) Digital Ground. Negative Supply Terminal Gain Setting Pin (LSB) Gain Setting Pin (MSB) Write Enable tWR-HI tWR-LO WR tSU tHD A0, A1 Output Terminal Positive Supply Terminal Reference Voltage Terminal (drive this pin with a low impedance voltage source to level shift the output signal) Non-inverting Input Terminal (True differential input) Table 5. : Write Enable Mode Gain Settings Gain (changes to) WR A1 A0 1 HI -> LO LO LO 2 HI -> LO LO HI 4 HI -> LO HI LO 8 HI -> LO HI HI GAIN SETTING No Change LO->LO X X The AD8251’s gains are set digitally. The A0 and A1 pins must be set either HIGH or LOW with respect to digital ground, DGND. The WR pin is a tri-state switch. It may be set to one of three levels, HIGH, LOW or to –VS. A HIGH signal is typically greater than 4V but less than 6V and a LOW signal is typically less than 1V but higher than DGND, 0V. Gains can be programmed using the following methods: No Change LO->HI X X No Change HI-> HI X X X = don’t care . Rev. PrB| Page 7 of 8 AD8251 Preliminary Technical Data OUTLINE DIMENSIONS 3.10 3.00 2.90 1 6 5.15 4.90 4.65 PR06287-0-8/06(PrB) 10 3.10 3.00 2.90 5 PIN 1 0.50 BSC 0.95 0.85 0.75 0.15 0.05 1.10 MAX 0.33 0.17 SEATING PLANE 0.23 0.08 8° 0° 0.80 0.60 0.40 COPLANARITY 0.10 COMPLIANT TO JEDEC STANDARDS MO-187-BA Figure 4. 10 Lead MSOP (RM) – Dimensions shown in millimeters ESD CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. Table 6. Ordering Guide AD00000 Products AD8251ARZ AD8251ARZ-RL AD8251ARZ-R7 AD8251-EVAL Temperature Package –40°C to +85°C –40°C to +85°C –40°C to +85°C Package Description 10-Lead MSOP 10-Lead MSOP 10-Lead MSOP Evaluation Board Rev. PrB | Page 8 of 8 Package Option RM-10 RM-10 RM-10 Branding