DS26F31MQML www.ti.com SNOSAS4A – MARCH 2006 – REVISED APRIL 2013 DS26F31MQML Quad High Speed Differential Line Drivers Check for Samples: DS26F31MQML FEATURES DESCRIPTION • • • • The DS26F31M is a quad differential line driver designed for digital data transmission over balanced lines. The DS26F31M meets all the requirements of EIA Standard RS-422 and Federal Standard 1020. It is designed to provide unipolar differential drive to twisted-pair or parallel-wire transmission lines. 1 2 • Operation from Single +5.0V Supply Outputs Won't Load Line When VCC = 0V Output Short Circuit Protection Meets the Requirements of EIA Standard RS422 High Output Drive Capability for 100Ω Terminated Transmission Lines The DS26F31M offers improved performance due to the use of state-of-the-art L-FAST bipolar technology. The L-FAST technology allows for higher speeds and lower currents by utilizing extremely short gate delay times. Thus, the DS26F31M features lower power, extended temperature range, and improved specifications. The circuit provides an enable and disable function common to all four drivers. The DS26F31M features TRI-STATE outputs and logical OR-ed complementary enable inputs. The inputs are all LS compatible and are all one unit load. The DS26F31M offers optimum performance when used with the DS26F32 Quad Differential Line Receiver. Connection and Logic Diagrams Figure 1. 16-Lead CDIP Package- Top View See Package Numbers NFE0016A, NAD0016A, NAC0016A 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2006–2013, Texas Instruments Incorporated DS26F31MQML SNOSAS4A – MARCH 2006 – REVISED APRIL 2013 www.ti.com Figure 2. 20-Lead LCCC Package See Package Number NAJ0020A Figure 3. Logic Symbol These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 2 Submit Documentation Feedback Copyright © 2006–2013, Texas Instruments Incorporated Product Folder Links: DS26F31MQML DS26F31MQML www.ti.com SNOSAS4A – MARCH 2006 – REVISED APRIL 2013 Absolute Maximum Ratings (1) −65°C ≤ TA ≤ +175°C Storage Temperature Range Lead Temperature (Soldering, 60 sec.) 300°C Supply Voltage 7.0V Input Voltage 7.0V Output Voltage 5.5V Maximum Power Dissipation at 25°C (2) 450mW Thermal Resistance θJA NFE0016A, derate above +25°C @ 11.4mW/°C 88°C/mW NAD0016A, derate above +25°C @ 6.6 mW/°C 151°C/mW NAJ0020A, derate above +25°C @ 12.3 mW/°C 81°C/mW θJC (1) (2) NFE0016A 14°C/mW NAD0016A 13°C/mW NAJ0020A 15°C/mW Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not verify specific performance limits. For verified specifications and test conditions, see the Electrical Characteristics. The verified specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test conditions. Power dissipation must be externally controlled at elevated temperatures. Recommended Operating Range −55°C ≤ TA ≤ +125°C Temperature Supply Voltage 4.5V to 5.5V Table 1. Radiation Features DS26F31MJFQMLV 300 krads (Si) DS26F31MWFQMLV 300 krads (Si) DS26F31MWGFQMLV 300 krads (Si) Quality Conformance Inspection Table 2. Mil-Std-883, Method 5005 - Group A Subgroup Description Temp °C 1 Static tests at 25 2 Static tests at 125 3 Static tests at -55 4 Dynamic tests at 25 5 Dynamic tests at 125 6 Dynamic tests at -55 7 Functional tests at 25 8A Functional tests at 125 8B Functional tests at -55 9 Switching tests at 25 10 Switching tests at 125 11 Switching tests at -55 12 Settling time at 25 13 Settling time at 125 14 Settling time at -55 Submit Documentation Feedback Copyright © 2006–2013, Texas Instruments Incorporated Product Folder Links: DS26F31MQML 3 DS26F31MQML SNOSAS4A – MARCH 2006 – REVISED APRIL 2013 www.ti.com DS26F31M Electrical Characteristics DC Parameters Parameter (1) Test Conditions Notes Min Units Subgroups V 1, 2, 3 V 1, 2, 3 V 1, 2, 3 0.5 V 1, 2, 3 Max VIH Logical "1" Input Voltage VCC = 4.5V (2) VIL Logical "0" Input Voltage VCC = 5.5V (2) VOH Logical "1" Output Voltage VCC = 4.5V, IOH = -20mA, VIL = 0.8V, VIH = 2V VOL Logical "0" Output Voltage VCC = 4.5V, IOL = 20mA, VIL = 0.8V, VIH = 2V IIH Logical "1" Input Current VCC = 5.5V, VI = 2.7V (3) -2.0 20 µA 1, 2, 3 IIL Logical "0" Input Current VCC = 5.5V, VI = 0.4V (3) 100 -200 µA 1, 2, 3 II Input Reverse Current VCC = 5.5V, VI = 7V (3) -0.01 0.1 mA 1, 2, 3 IOZ TRI-STATE Output Current VCC = 5.5V, VO = 0.5V -20 µA 1, 2, 3 VCC = 5.5V, VO = 2.5V 20 µA 1, 2, 3 -1.5 V 1, 2, 3 VI Input Clamp Voltage VCC = 4.5V, II = -18mA ISC Min Output Short Circuit Current VCC = 5.5V, VO = 0V ISC Max Output Short Circuit Current VCC = 5.5V, VO = 0V ICC Dis Power Supply Current ICC En Power Supply Current (1) (2) (3) 2.0 0.8 2.5 -30 mA 1, 2, 3 -150 mA 1, 2, 3 VCC = 5.5V, VI = 0.8V or 2V, VEn = 0.8V, VEn = 2V 50 mA 1, 2, 3 VCC = 5.5V, VEn = 2V, VEn = 0.8V 40 mA 1, 2, 3 Pre and post irradiation limits are identical to those listed under AC and DC electrical characteristics, except as listed in the Post Radiation Limits Table — if applicable. Radiation end point limits for the noted parameters are specified only for the conditions, as specified. Parameter tested go-no-go only. The minimum limits apply to device Class Q & V. The limits specified for the INPUT LOW CURRENT represents the numerical range in which this parameter will pass. DS26F31M Electrical Characteristics AC Parameters - Propagation Delay Time The following conditions apply, unless otherwise specified. AC: VCC = 5V, CL = 50pF or equivalent impedance provided by diode load Parameter tPLH Test Conditions Input to Output CL = 30pF tPHL Input to Output CL = 30pF tLZ Disable Time CL = 10 pF tHZ Disable Time CL = 10 pF (1) (2) 4 Max Units Subgroups (1) 16 nS 9 (1) 24 nS 10, 11 (2) 15 nS 9 (2) 23 nS 10, 11 (1) 17 nS 9 (1) 25 nS 10, 11 (2) 15 nS 9 (2) 23 nS 10, 11 (1) 38 nS 9 (1) 56 nS 10, 11 (2) 35 nS 9 (2) 53 nS 10, 11 (1) 23 nS 9 (1) 30 nS 10, 11 (2) 20 nS 9 (2) 27 nS 10, 11 Notes Min Tested at 50pF, system capacitance exceed 10 and 30pF. Testing at 50pF specifies limits at 10 and 30pF. Submit Documentation Feedback Copyright © 2006–2013, Texas Instruments Incorporated Product Folder Links: DS26F31MQML DS26F31MQML www.ti.com SNOSAS4A – MARCH 2006 – REVISED APRIL 2013 DS26F31M Electrical Characteristics AC Parameters - Propagation Delay Time (continued) The following conditions apply, unless otherwise specified. AC: VCC = 5V, CL = 50pF or equivalent impedance provided by diode load Parameter tZL Test Conditions Enable Time CL = 30pF tZH Enable Time CL = 30 pF Skew Output to Output CL = 30pF Notes Min Subgroups Max Units (1) 28 nS 9 (1) 40 nS 10, 11 (2) 25 nS 9 (2) 37 nS 10, 11 (1) 32 nS 9 (1) 52 nS 10, 11 (2) 30 nS 9 (2) 50 nS 10, 11 (1) 6.0 nS 9 (1) 9.0 nS 10, 11 (2) 4.5 nS 9 (2) 7.0 nS 10, 11 DS26F31M Electrical Characteristics DC Drift Parameters This section applies to -QMLV devices only and shall be read & recorded at TA = +25°C before and after each burn-in & Subgroup B5, and shall not change by more than the limits indicated. The delta rejects shall be included in the PDA calculations. Parameter Test Conditions Notes Min Max Units Subgroups VOH Logical "1" Output Voltage VCC = 4.5V, IOH = -20mA, VIL = 0.8V, VIH = 2V. -250 250 mV 1 VOL Logical "0" Output Voltage VCC = 4.5V, IOL = 20mA, VIL = 0.8V, VIH = 2V. -50 50 mV 1 ICC En Power Supply Current VCC = 5.5V, VI = 0.8V or 2V, VEn = 2V, VEn = 0.8V. -8.0 8.0 mA 1 ICC Dis Power Supply Current VCC = 5.5V, VI = 0.8V or 2V, VEn = 0.8V, VEn = 2V. -8.0 8.0 mA 1 TEST CIRCUIT AND TIMING WAVEFORMS (A) A. Parameter tested go-no-go only. S1 and S2 of Load Circuit are closed except where shown. CL includes probe and jig capacitance. Figure 4. AC Load Test Circuit for TRI-STATE Outputs Submit Documentation Feedback Copyright © 2006–2013, Texas Instruments Incorporated Product Folder Links: DS26F31MQML 5 DS26F31MQML SNOSAS4A – MARCH 2006 – REVISED APRIL 2013 www.ti.com Pulse Generator for all Pulses: Rate ≤ 1.0 MHz, ZO = 50Ω, tr ≤ 6.0 ns, tf ≤ 6.0 ns. Figure 5. Propagation Delay (1) (2) Pulse Generator for all Pulses: Rate ≤ 1.0 MHz, ZO = 50Ω, tr ≤ 6.0 ns, tf ≤ 6.0 ns. Diagram shown for Enable Low. Switches S1 and S2 open. Figure 6. Enable and Disable Times (1) (2) (2) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not verify specific performance limits. For verified specifications and test conditions, see the Electrical Characteristics. The verified specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test conditions. All currents into the device pins are positive; all currents out of the device pins are negative. All voltages are referenced to ground unless otherwise specified. TYPICAL APPLICATION Figure 7. Typical Application 6 Submit Documentation Feedback Copyright © 2006–2013, Texas Instruments Incorporated Product Folder Links: DS26F31MQML DS26F31MQML www.ti.com SNOSAS4A – MARCH 2006 – REVISED APRIL 2013 REVISION HISTORY Released Revision 3/01/06 * 4/15/2013 A Section New Release, Corporate format Originator L. Lytle Changes 1 MDS data sheet converted into one Corp. data sheet format. MNDS26F31M-X-RH Rev 0B0 will be archived. Changed layout of National Data Sheet to TI format Submit Documentation Feedback Copyright © 2006–2013, Texas Instruments Incorporated Product Folder Links: DS26F31MQML 7 PACKAGE OPTION ADDENDUM www.ti.com 15-Apr-2013 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish (2) MSL Peak Temp Op Temp (°C) (3) Top-Side Markings (4) 5962-7802302M2A ACTIVE LCCC NAJ 20 50 TBD Call TI Call TI -55 to 125 DS26F31ME/ 883 Q 5962-78023 02M2A ACO 02M2A >T 5962-7802302MFA ACTIVE CFP NAD 16 19 TBD Call TI Call TI -55 to 125 DS26F31MW /883 Q 5962-78023 02MFA ACO 02MFA >T 5962F7802302VFA ACTIVE CFP NAD 16 19 TBD Call TI Call TI -55 to 125 DS26F31MWF QMLV Q 5962F78023 02VFA ACO 02VFA >T DS26F31ME/883 ACTIVE LCCC NAJ 20 50 TBD Call TI Call TI -55 to 125 DS26F31ME/ 883 Q 5962-78023 02M2A ACO 02M2A >T DS26F31MW/883 ACTIVE CFP NAD 16 19 TBD Call TI Call TI -55 to 125 DS26F31MW /883 Q 5962-78023 02MFA ACO 02MFA >T DS26F31MWFQMLV ACTIVE CFP NAD 16 19 TBD Call TI Call TI -55 to 125 DS26F31MWF QMLV Q 5962F78023 02VFA ACO 02VFA >T (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 15-Apr-2013 (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Top-Side Marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. 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OTHER QUALIFIED VERSIONS OF DS26F31MQML, DS26F31MQML-SP : • Military: DS26F31MQML • Space: DS26F31MQML-SP NOTE: Qualified Version Definitions: • Military - QML certified for Military and Defense Applications • Space - Radiation tolerant, ceramic packaging and qualified for use in Space-based application Addendum-Page 2 MECHANICAL DATA NAJ0020A E20A (Rev F) www.ti.com MECHANICAL DATA NAD0016A W16A (Rev T) www.ti.com IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. 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