ALD ALD110908 Quad/dual n-channel enhancement mode epad matched pair mosfet array Datasheet

e
ADVANCED
LINEAR
DEVICES, INC.
EN
APPLICATIONS
ALD110808A/ALD110808/ALD110908A/ALD110908 are monolithic quad/
dual N-Channel MOSFETs matched at the factory using ALD’s proven
EPAD® CMOS technology. These devices are intended for low voltage,
small signal applications.
• Precision current mirrors
• Precision current sources
• Voltage choppers
• Differential amplifier input stage
• Voltage comparator
• Voltage bias circuits
• Sample and Hold
• Analog inverter
• Level shifters
• Source followers and buffers
• Current multipliers
• Analog switches / multiplexers
These MOSFET devices are built on the same monolithic chip, so they
exhibit excellent temperature tracking characteristics. They are versatile
as circuit elements and are useful design component for a broad range of
analog applications. They are basic building blocks for current sources,
differential amplifier input stages, transmission gates, and multiplexer
applications. For most applications, connect V- and N/C pins to the most
negative voltage potential in the system and V+ pin to the most positive
voltage potential (or left open unused). All other pins must have voltages
within these voltage limits.
ALD110808/ALD110908 devices are built for minimum offset voltage and
differential thermal response, and they are suited for switching and amplifying applications in +1.0V to +10V (+/- 5 V) systems where low input bias
current, low input capacitance and fast switching speed are desired. As
these are MOSFET devices, they feature very large (almost infinite) current gain in a low frequency, or near DC, operating environment.
These devices are suitable for use in precision applications which require
very high current gain, beta, such as current mirrors and current sources.
The high input impedance and the high DC current gain of the Field Effect
Transistors result from extremely low current loss through the control gate.
The DC current gain is limited by the gate input leakage current, which is
specified at 30pA at room temperature. For example, DC beta of the
device at a drain current of 3mA and input leakage current of 30pA at
25°C is = 3mA/30pA = 100,000,000.
PIN CONFIGURATION
ALD110808
N/C*
1
GN1
2
DN1
3
S12
4
V-
5
DN4
6
FEATURES
GN4
7
• Enhancement-mode (normally off)
• Standard Gate Threshold Voltages: +0.8V
• Matched MOSFET to MOSFET characteristics
• Tight lot to lot parametric control
• Low input capacitance
• VGS(th) match to 2mV and 10mV
• High input impedance — 1012Ω typical
• Positive,zero, and negative VGS(th) temperature coefficient
• DC current gain >108
• Low input and output leakage currents
N/C*
8
N/C*
1
ORDERING INFORMATION
GN1
2
Operating Temperature Range*
0°C to +70°C
0°C to +70°C
ALD110808APC
ALD110808 PC
AB
LE
D
VGS(th)= +0.8V
GENERAL DESCRIPTION
16-Pin
SOIC
Package
®
ALD110808/ALD110808A/ALD110908/ALD110908A
QUAD/DUAL N-CHANNEL ENHANCEMENT MODE EPAD®
MATCHED PAIR MOSFET ARRAY
16-Pin
Plastic Dip
Package
TM
EPAD
8-Pin
Plastic Dip
Package
8Pin
SOIC
Package
ALD110808ASC ALD110908APA ALD110908ASA
ALD110808SC ALD110908PA ALD110908SA
V-
V-
M1
M2
V+
VM4
M3
V-
V-
16
N/C*
15
GN2
14
DN2
13
V+
12
S34
11
DN3
10
GN3
9
N/C*
8
N/C*
7
GN2
6
DN2
5
V-
PC, SC PACKAGES
ALD110908
DN1
3
S12
4
V-
V-
M1
M2
V-
PA, SA PACKAGES
*N/C pins are internally connected.
Connect to V- to reduce noise
* Contact factory for industrial or military temp. ranges or user-specified threshold voltage values.
Rev 1.0-0506 ©2 005 Advanced Linear Devices, Inc. 415 Tasman Drive, Sunnyvale, California 94089-1706 Tel: (408) 747-1155 Fax: (408) 747-1286
www.aldinc.com
ABSOLUTE MAXIMUM RATINGS
Drain-Source voltage, VDS
Gate-Source voltage, VGS
Power dissipation
Operating temperature range PA, SA, PC, SC package
Storage temperature range
Lead temperature, 10 seconds
10.6V
10.6V
500 mW
0°C to +70°C
-65°C to +150°C
+260°C
OPERATING ELECTRICAL CHARACTERISTICS
V+ = +5V (or open) V- = GND TA = 25°C unless otherwise specified
CAUTION: ESD Sensitive Device. Use static control procedures in ESD controlled environment.
ALD110808A / ALD110908A
Parameter
Symbol
Min
0.78
Typ
ALD110808/ ALD110908
Max
Min
Typ
0.80
0.82
0.78
0.80
0.82
2
3
10
Gate Threshold Voltage
VGS(th)
Offset Voltage
VGS1-VGS2
VOS
1
VGS1-VGS2 Tempco
∆VOS
5
GateThreshold Tempco
∆VGS(th)
On Drain Current
IDS (ON)
Forward Transconductance
Max
5
-1.7
0.0
+1.6
-1.7
0.0
+1.6
12.0
3.0
12.0
3.0
GFS
1.4
Transconductance Mismatch
∆GFS
Output Conductance
GOS
Drain Source On Resistance
Unit
Test Condition
V
IDS =1µA
VDS = 0.1V
mV
IDS=1µA
µV/ °C
VDS1= VDS2
mV/ °C
ID= 1µA
ID= 20µA VDS = 0.1V
ID= 40µA
mA
VGS= +10.3V
VGS= +4.8V
VDS= +5V
1.4
mmho
VGS = +4.8V
VDS = +9.8V
1.8
1.8
%
68
68
µmho
VGS =+4.8V
VDS = +9.8V
RDS (ON)
500
500
Ω
VDS = 0.1V
VGS = +4.8V
Drain Source On Resistance
Mismatch
∆RDS (ON)
0.5
0.5
%
Drain Source Breakdown
Voltage
BVDSX
Drain Source Leakage Current1
IDS (OFF)
Gate Leakage Current1
10
10
V
IDS = 1.0µA
VGS = -0.2V
10
100
4
10
100
4
pA
nA
VGS = -0.2V
VDS =10V, TA = 125°C
IGSS
3
30
1
3
30
1
pA
nA
VDS = 0V VGS = 10V
TA =125°C
Input Capacitance
CISS
2.5
2.5
pF
Transfer Reverse Capacitance
CRSS
0.1
0.1
pF
Turn-on Delay Time
ton
10
10
ns
V+ = 5V RL= 5KΩ
Turn-off Delay Time
toff
10
10
ns
V+ = 5V RL= 5KΩ
60
60
dB
f = 100KHz
Crosstalk
Notes:
1
Consists of junction leakage currents
ALD110808/ALD110808A/ALD110908/ALD110908A
Advanced Linear Devices
2
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