Monday, Mar 31, 2008 2:51 PM / 10-Bit Current output D to A Converter DAC100 1.0 SCOPE This specification documents the detail requirements for space qualified product manufactured on Analog Devices, Inc.'s QML certified line per MIL-PRF-38535 Level V except as modified herein. The manufacturing flow described in the STANDARD SPACE LEVEL PRODUCTS PROGRAM brochure is to be considered a part of this specification. This brochure can be found at: http://www.analog.com/aerospace This data sheet specifically details the space grade version of this product. A more detailed operational description and a complete data sheet for commercial product grades can be found at www.analog.com/DAC100 2.0 Part Number. The complete part number(s) of this specification follow: Part Number DAC100-703Q DAC100-713Q Description 10-Bit Current output D to A Converter Radiation tested, 10-Bit Current output D to A Converter 2.1 Case Outline. Letter Descriptive designator Case Outline (Lead Finish per MIL-PRF-38535) Q GDIP1-T16 16-Lead ceramic dual-in-line package (CERDIP) RB 1 16 RS V- 2 15 Full Scale Adjust OUTPUT 3 14 V+ LSB 4 13 MSB Top View BIT 9 5 12 BIT 2 BIT 8 6 11 BIT 3 BIT 7 7 10 BIT 4 BIT 6 8 9 BIT 5 Figure 1 - Terminal connections. ASD0011162 Rev. F Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective companies. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.326.8703 © 2008 Analog Devices, Inc. All rights reserved. DAC100 MSB 13 LSB 12 11 10 9 8 7 6 5 4 Analog Output V+ V- VREF Full Scale Adjust RS * RB= 6.12KΩ 16 1 RB RS RS = 4.88KΩ Figure 1A: Simplified schematic 3.0 Absolute Maximum Ratings. (TA = 25°C, unless otherwise noted) V+ supply to V- supply........................................................................................ 0V to 36V V+ supply to output............................................................................................ 0V to +18V V- supply to output............................................................................................. 0V to –18V Power dissipation ......................................................................................................500mW Logic inputs to outputs........................................................................................-1V to +6V Operating temperature range......................................................................-55°C to +125°C Storage temperature range..........................................................................-65°C to +150°C Lead temperature (soldering, 60 sec.) .......................................................................+300°C Dice junction temperature (TJ)...................................................................................+175°C 3.1 Thermal Characteristics: Thermal resistance, CERDIP (Q) Package Junction-to-case (ΘJC) = 29°C/W Max Junction-to-ambient (ΘJA) = 91 °C/W Max Thermal resistance, FLATPAK (N) Package Junction-to-case (ΘJC) = 22°C/W Max Junction-to-ambient (ΘJA) = 90 °C/W Max ASD0011162 Rev. F | Page 2 of 5 DAC100 4.0 Electrical Table: See notes at end of table TABLE I Parameter Symbol Conditions 1/ Subgroup Power supply current I+ VIH = 2.1V IFull range output voltage Limit Min Limit Max Units 1, 2, 3 8.33 mA VIH = 2.1V 1, 2, 3 8.33 VFR VIL = 0.7V, Full Adjust pin tied to V- 1, 2, 3 Zero scale output voltage VZS VIH = 2.1V Integral nonlinearity NL Full scale temperature coefficient TCVFR Logic inputs high VIH Logic inputs low VIL Logic input current high 11.1 V 1, 2, 3 ±.013 %FS ± ½ LSB – 9 Bits 1, 2, 3 ±0.1 8 ±60 IIH VIL = 0.7V, Full Scale Adjust pin tied to VVIN = 2.1V to 3V (all inputs) Measured with respect to output pin allowing ≤ ±½ LSB change with ∆VIN VIN = 0.7V to 0V (all inputs) Measured with respect to output pin allowing ≤ ±½ LSB change with ∆VIN VIH = 6.0V, Each Input Logic input current low IIL Power supply sensitivity 1, 2, 3 10.0 2.1 ppm/° C V 1, 2, 3 0.7 1, 2, 3 5 VIL = 0V, Each Input 1, 2, 3 5 PSS VIL = 0.7V (all inputs) VS = ±6V to ±18V 1, 2, 3 ±0.1 Monotonicity 2/ ∆IO Measured at each major carry code point 1 Settling time 3/ TSHL RL = 1KΩ, CL ≤ 10pF 9 µA %/V µA 0 375 nS Table I notes: 1/ VS = ±15V, unless otherwise specified. 2/ The change in output current either increases or remains the same for an increasing digital input code. 3/ Output within ± ½ LSB of 10-bit accuracy final settled nominal value of VOUT. Input pulse characteristics: Input frequency = 1MHz square wave, 50% duty cycle. Input amplitude = 0V to 2.1V Input signal = tr, tf ≤ 20 nS Measurement referenced to input High-to-Low Transition. DUT Settling Time to ±0.05 % FS ASD0011162 Rev. F | Page 3 of 5 DAC100 4.1 Electrical Test Requirements: Table II Subgroups (see table I) MIL-STD-883 Test Requirements 1 Interim electrical parameters (pre Burn-In) Final Electrical Test Parameters 1, 2, 3, 8 1/ 2/ Group A Test Requirements 1, 2, 3, 8, 9 Group C Test Requirements Group D Test Requirements 1 2/ 1 * PDA applies to Subgroup 1 only. No other subgroups are included in PDA. 1/ PDA applies to subgroup 1. Deltas not included in PDA 2/ See table III for deltas. See table I for test conditions. 4.2 5.0 Table III. Burn-in test delta limits. TEST TITLE BURN-IN ENDPOINT Table III LIFETEST ENDPOINT VFR 10.55 ± 0.55 10.55 ± 0.75 ±0.2 V VZS ±0.013 ±0.018 ±0.005 %FS I+ 8.33 8.33 ±10% mA I- 8.33 8.33 ±10% mA DELTA LIMIT UNITS Life Test/Burn-In Circuit: 5.1 HTRB is not applicable for this drawing. 5.2 Burn-in is per MIL-STD-883 Method 1015 test condition B. 5.3 Steady state life test is per MIL-STD-883 Method 1005. ASD0011162 Rev. F | Page 4 of 5 DAC100 Rev A B C D E F Description of Change Initiate Update web address Update web address. Add Group C and D to table II. Add life test endpoint based on delta to table III. Delete Burn-In circuit Update header/footer & add to 1.0 Scope description Remove minimum Dice Junction Temp. range in 3.0 Absolute Max. Ratings © 2008 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective companies. Printed in the U.S.A. 03/08 ASD0011162 Rev. F | Page 5 of 5 Date 30-Jun-00 Feb. 18, 2002 Feb. 28, 2003 Aug. 5, 2003 Feb. 21,2008 March 31, 2008