5x7mm Surface Mount High Precision TCXO In Stock at Digi-Key 2111 Comprehensive Drive Aurora, Illinois 60505 Phone: 630-851-4722 Fax: 630-851-5040 www.conwin.com US Headquarters 630-851-4722: European Headquarters: +353-61-472221 Description Features D7 The Connor-Winfield ’s D75A 5 12 A 08 .8M 47 Series are 5x7mm Surface Hz Mount Temperature Compensated Crystal Controlled Oscillators (TCXO) with a Tri-State LVCMOS output. Through the use of Analog Temperature Compensation, the D75A - Series are capable of holding sub 1-ppm stabilities over the 0 to 70°C temperature range. Model D75A TCXO 3.3V Operation LVCMOS Output Logic Frequency Stability: ±0.28ppm Temperature Range: 0 to 70°C Low Jitter <1pS RMS Tri-State Enable/Disable Function 5x7mm Surface Mount Package Tape and Reel Packaging RoHS Compliant / Lead Free Absolute Maximum Ratings Parameter Storage Temperature Supply Voltage (Vcc) Input Voltage Minimum Nominal Maximum Units -55 - 85 °C -0.5 - 6.0 Vdc -0.5 - Vcc+0.5 Vdc Nominal Maximum Units Note Operating Specifications Parameter Minimum Frequencies Available (Fo) 10.0, 12.8, 19.2, 20.0 Note MHz Frequency Calibration @ 25 C -1.00 - 1.00 ppm 1 Frequency Stability [±(Fmax – Fmin)/2.Fo] -0.28 - 0.28 ppm 2 Holdover Stability (Over 24 Hours ) -0.32 - 0.32 ppm 3 Supply Voltage Variation (Vcc ±5%) -0.20 - 0.20 ppm Load Coefficient (±5%) -0.20 - 0.20 ppm - - 0.40 ppm Absolute, 4 -4.60 - 4.60 ppm 5 0 - 70 C Vdc Static Temperature Hysteresis Total Frequency Tolerance Temperature Range Supply Voltage (Vcc) 3.135 3.3 3.465 Supply Current (Icc) - - 6 mA - 3 5 ps rms 1 Period Jitter Phase Jitter (BW=12kHz to 20MHz) - 0.5 SSB Phase Noise at 10Hz offset - -80 dBc/Hz ps rms SSB Phase Noise at 100Hz offset - -110 dBc/Hz SSB Phase Noise at 1KHz offset - -135 dBc/Hz SSB Phase Noise at 10KHz offset - -150 dBc/Hz SSB Phase Noise at >100KHz offset - -150 dBc/Hz Input Characteristics For Enable / Disable Function (Pin 8) Parameter Minimum Nominal Maximum Units Note Enable Voltage (High) or open circuit (Vih) 70%Vcc - - Vdc 6 Disable Voltage (Low) Output Tri-stated (Vil) - - 30%Vcc Vdc Minimum Nominal Maximum Units Note - 15 - pF 7 90%Vcc - - Vdc Vdc LVCMOS Output Characteristics Parameter LOAD Voltage Current (High) (Voh) (Low) (Vol) - - 10%Vcc (High) (Ioh) -4 - - mA (Low) (Iol) - - 4 mA 45 50 55 % - - 8 ns Duty Cycle at 50% of Vcc Rise / Fall Time 10% to 90% Note: Bulletin Tx236 Page 1 of 2 Revision Date 00 01 Oct 2008 1) 2) 3) 4) 5) 6) 7) Initial calibration @ 25 C. Specifications at time of shipment after 48 hours of operation Frequency stability vs. change in temperature. Inclusive of frequency stability, supply voltage change (±1%), load change, aging, for 24 hours Frequency change after reciprocal temperature ramped over the operating range. Frequency measured before and after at 25°C. Inclusive of calibration @ 25 C, frequency vs. change in temperature, change in supply voltage (±5%), load change (±5%), reflow soldering process and 20 years aging, referenced to Fo. Leave Pad 8 unconnected if enable / disable function is not required. When tri-stated, the output stage is disabled but the oscillator and compensation circuit are still active (current consumption < 1 mA). For best performance it is recommended that the circuit connected to this output should have an equivalent input capacitance of 15pF. Specifications subject to change without notice. All dimensions in inches. © Copyright 2008 The Connor-Winfield Corporation 2111 Comprehensive Drive Aurora, Illinois 60505 Phone: 630-851-4722 Fax: 630-851-5040 www.conwin.com Package Characteristics Package Ordering Information D75A - 010.0MHZ * D75A - 012.8MHZ * D75A - 019.2MHZ * D75A - 020.0MHZ * Ceramic Surface Mount Package. Environmental Characteristics Vibration: Shock: Soldering: Vibration per Mil Std 883E Method 2007.3 Test Condition A Mechanical Shock per Mil Std 883E Method 2002.4 Test Condition B. SMD product suitable for Convection Reflow soldering. Peak temperature 260 C. Maximum time above 220 C, 60 seconds. Solderability per Mil Std 883E Method 2003 Solderability TCXO SERIES * For the tape and reel option, add -T to the end of the part number. Example: D75A-012.8 MHZ -T Design Recommendations Vcc, should have a large copper area for reduced inductance. Connect a 0.01uF bypass capacitor <0.1”(2.54mm) from the pad. 6 8 9 5 10 4 3 1 Ground, should have a large copper area for reduced inductance. Top View Buffer input load should be equivalent to 15pF. 50 Ohm trace Vcc <1”by design 0.010”(0.254mm) Recommended clearance inductance for internal copper flood. Pad Connections Pad 1 2 3 4 5 6 7 8 9 10 Buffer Ground Top View CENTER FREQUENCY Ground Connection Do not connect Do not connect Do not connect Ground Output Do not connect Do not connect Tri-state Enable / Disable Supply, Vcc Do not connect Output Waveform 50 Ohm Trace Without Output Vias Buffer OSC TOP LAYER GROUND LAYER ....... Do not route any traces in the keep out area. It is recommended the next layer under the keep out area is to be ground plane. BOTTOM LAYER Package Layout 0.276 ±0.006 (7.0mm) 0.025(6 Places) (0.635mm) Pin 1 1 0.030 (0.762mm) (4 Places) 2 4 8 7 6 0.100 (2.54mm) E/D 8 Vcc Supply Voltage 0.040 (1.02mm) (6 Places) 5 Dimensional Tolerance: ±.005 (.127mm) ±.02 (.508mm) Tape and Reel Information 0.037 (0.94mm) DNC DNC 0.051 (1.28mm) 0.030 (0.76mm) 0.100 (2.54mm) 9 0.038 (0.965mm) (4 Places) 3 10 0.295 (7.49mm) 0.197 ±0.006 (5.0mm) D75A 0847 12.8MHz Test Circuit Suggested Pad Layout 0.079 Max. (2.0mm) Keep Out Area* Top View 6 7 9 5 10 4 Output DNC .01 uF Bypass 1 2 15 pF** 3 0.215 (5.46mm) 0.051 (1.28mm) 1 * Do not route any traces in the keep out area. It is recommended the next layer under the keep out area is to be ground plane. DNC DNC DNC DNC = Do Not Connect E/D = Enable / Disable ** NPO Grade component Solder Profile Temperature 260°C 260°C 220°C 180°C 150°C 1 120°C 0 120 S Max. US Headquarters: 630-851-4722 European Headquarters: +353-61-472221 Specifications subject to change without notice. All dimensions in inches. © Copyright 2008 The Connor-Winfield Corporation Time 10 S 60 S Max. 360 Sec. Max. Bulletin Tx236 Page 2 of 2 Revision Date 00 01 Oct 2008