AOT7S60/AOB7S60/AOTF7S60 600V 7A α MOS TM Power Transistor General Description Product Summary The AOT7S60 & AOB7S60 & AOTF7S60 have been fabricated using the advanced αMOSTM high voltage process that is designed to deliver high levels of performance and robustness in switching applications. By providing low RDS(on), Qg and EOSS along with guaranteed avalanche capability these parts can be adopted quickly into new and existing offline power supply designs. VDS @ Tj,max 700V IDM 33A RDS(ON),max 0.6Ω Qg,typ 8.2nC Eoss @ 400V 1.9µJ 100% UIS Tested 100% Rg Tested For Halogen Free add "L" suffix to part number: AOT7S60L & AOB7S60L & AOTF7S60L Top View TO-220 TO-263 D2PAK TO-220F D D D S G G AOT7S60 D G S S AOB7S60 Absolute Maximum Ratings TA=25°C unless otherwise noted Parameter AOT7S60/AOB7S60 Symbol Drain-Source Voltage VDS 600 Gate-Source Voltage VGS TC=25°C Continuous Drain Current Pulsed Drain Current TC=100°C C S G AOTF7S60 AOTF7S60L V ±30 7 ID Units V 7* 5 5* A IDM 33 Avalanche Current C IAR 1.7 A Repetitive avalanche energy C EAR 43 mJ Single pulsed avalanche energy G TC=25°C Power Dissipation B Derate above 25oC MOSFET dv/dt ruggedness Peak diode recovery dv/dt H Junction and Storage Temperature Range EAS 86 PD W 0.8 0.3 W/ oC 100 20 -55 to 150 TJ, TSTG TL Thermal Characteristics Parameter Maximum Junction-to-Ambient A,D Symbol RθJA V/ns °C 300 °C AOT7S60/AOB7S60 AOTF7S60L Units 65 65 °C/W 0.5 1.2 -5 °C/W °C/W RθCS Maximum Case-to-sink A Maximum Junction-to-Case RθJC * Drain current limited by maximum junction temperature. Rev0: Aug 2011 34 dv/dt Maximum lead temperature for soldering purpose, 1/8" from case for 5 seconds J mJ 104 www.aosmd.com Page 1 of 6 AOT7S60/AOB7S60/AOTF7S60 Electrical Characteristics (TJ=25°C unless otherwise noted) Symbol Parameter Conditions Min Typ Max Units ID=250µA, VGS=0V, TJ=25°C 600 - - ID=250µA, VGS=0V, TJ=150°C 650 700 - V µA STATIC PARAMETERS BVDSS Drain-Source Breakdown Voltage IDSS Zero Gate Voltage Drain Current VDS=600V, VGS=0V - - 1 VDS=480V, TJ=150°C - 10 - IGSS Gate-Body leakage current VDS=0V, VGS=±30V - - ±100 VGS(th) Gate Threshold Voltage VDS=5V, ID=250µA 2.7 3.3 3.9 nΑ V RDS(ON) Static Drain-Source On-Resistance VGS=10V, ID=3.5A, TJ=25°C - 0.54 0.60 Ω VGS=10V, ID=3.5A, TJ=150°C - 1.48 1.64 Ω VSD Diode Forward Voltage - 0.82 - V IS Maximum Body-Diode Continuous Current - - 7 A ISM Maximum Body-Diode Pulsed CurrentC - - 33 A - 372 - pF - 28 - pF - 22 - pF - 65 - pF DYNAMIC PARAMETERS Input Capacitance Ciss Coss Output Capacitance Co(er) Effective output capacitance, energy related H Crss Effective output capacitance, time related I Reverse Transfer Capacitance Rg Gate resistance Co(tr) IS=3.5A,VGS=0V, TJ=25°C VGS=0V, VDS=100V, f=1MHz VGS=0V, VDS=0 to 480V, f=1MHz VGS=0V, VDS=100V, f=1MHz - 1.2 - pF VGS=0V, VDS=0V, f=1MHz - 17.5 - Ω - 8.2 - nC - 2.0 - nC SWITCHING PARAMETERS Qg Total Gate Charge VGS=10V, VDS=480V, ID=3.5A Qgs Gate Source Charge Qgd Gate Drain Charge - 2.8 - nC tD(on) Turn-On DelayTime - 19 - ns tr Turn-On Rise Time - 13 - ns tD(off) Turn-Off DelayTime - 50 - ns tf trr Turn-Off Fall Time VGS=10V, VDS=400V, ID=3.5A, RG=25Ω - 15 - ns IF=3.5A,dI/dt=100A/µs,VDS=400V - 198 - ns A µC Irm Body Diode Reverse Recovery Time Peak Reverse Recovery Current IF=3.5A,dI/dt=100A/µs,VDS=400V - 18 - Qrr Body Diode Reverse Recovery Charge IF=3.5A,dI/dt=100A/µs,VDS=400V - 2.4 - A. The value of R θJA is measured with the device in a still air environment with T A =25°C. B. The power dissipation PD is based on TJ(MAX)=150°C, using junction-to-case thermal resistance, and is more useful in setting the upper dissipation limit for cases where additional heatsinking is used. C. Repetitive rating, pulse width limited by junction temperature TJ(MAX)=150°C, Ratings are based on low frequency and duty cycles to keep initial TJ =25°C. D. The R θJA is the sum of the thermal impedance from junction to case R θJC and case to ambient. E. The static characteristics in Figures 1 to 6 are obtained using <300 µs pulses, duty cycle 0.5% max. F. These curves are based on the junction-to-case thermal impedance which is measured with the device mounted to a large heatsink, assuming a maximum junction temperature of TJ(MAX)=150°C. The SOA curve provides a single pulse ratin g. G. L=60mH, IAS=1.7A, VDD=150V, Starting TJ=25°C H. Co(er) is a fixed capacitance that gives the same stored energy as Coss while VDS is rising from 0 to 80% V(BR)DSS. I. Co(tr) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% V(BR)DSS. J. Wavesoldering only allowed at leads. THIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN, FUNCTIONS AND RELIABILITY WITHOUT NOTICE. Rev0: Aug 2011 www.aosmd.com Page 2 of 6 AOT7S60/AOB7S60/AOTF7S60 TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS 12 14 6V 10V 12 10 10V 6V 8 8 5.5V ID (A) ID (A) 10 5.5V 6 6 5V 4 5V 4 VGS=4.5V 2 2 VGS=4.5V 0 0 0 5 10 15 0 20 5 10 15 20 VDS (Volts) Figure 2: On-Region Characteristics@125°C VDS (Volts) Figure 1: On-Region Characteristics@25°C 100 1.5 VDS=20V -55°C 1.2 10 RDS(ON) (Ω ) ID(A) 125°C 1 0.9 VGS=10V 0.6 25°C 0.1 0.3 0.0 0.01 2 4 6 8 0 10 6 9 12 15 1.2 3 2.5 VGS=10V ID=3.5A BVDSS (Normalized) Normalized On-Resistance 3 ID (A) Figure 4: On-Resistance vs. Drain Current and Gate Voltage VGS(Volts) Figure 3: Transfer Characteristics 2 1.5 1 1.1 1 0.9 0.5 0 -100 -50 0 50 100 150 200 0.8 -100 Temperature (°C) Figure 5: On-Resistance vs. Junction Temperature Rev0: Aug 2011 www.aosmd.com -50 0 50 100 150 200 TJ (oC) Figure 6: Break Down vs. Junction Temperature Page 3 of 6 AOT7S60/AOB7S60/AOTF7S60 TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS 15 1.0E+02 1.0E+01 125°C 12 VDS=480V ID=3.5A 9 25°C 1.0E-01 VGS (Volts) IS (A) 1.0E+00 1.0E-02 1.0E-03 6 3 1.0E-04 0 1.0E-05 0.0 0 0.2 0.4 0.6 0.8 1.0 VSD (Volts) Figure 7: Body-Diode Characteristics (Note E) 1000 6 8 10 Qg (nC) Figure 8: Gate-Charge Characteristics 12 4 Ciss Eoss(uJ) Capacitance (pF) 4 5 10000 100 Coss 10 3 Eoss 2 Crss 1 1 0 0 0 100 200 300 400 500 VDS (Volts) Figure 9: Capacitance Characteristics 600 0 100 200 300 400 VDS (Volts) Figure 10: Coss stroed Energy 500 600 100 100 RDS(ON) limited 10µs 100µs 1 DC 1ms 10ms 0.1 TJ(Max)=150°C TC=25°C 10 ID (Amps) 10 ID (Amps) 2 10µs RDS(ON) limited 100µs 1 1ms 10ms 0.1s 1s DC 0.1 TJ(Max)=150°C TC=25°C 0.01 0.01 1 10 100 1000 VDS (Volts) Figure 11: Maximum Forward Biased Safe Operating Area for AOT(B)7S60 (Note F) Rev0: Aug 2011 www.aosmd.com 1 10 100 VDS (Volts) Figure 12: Maximum Forward Biased Safe Operating Area for AOTF7S60L(Note F) 1000 Page 4 of 6 AOT7S60/AOB7S60/AOTF7S60 TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS 100 8 Current rating ID(A) EAS(mJ) 80 60 40 20 0 6 4 2 0 25 50 75 100 125 TCASE (°C) Figure 13: Avalanche energy 150 175 0 25 50 75 100 125 TCASE (°C) Figure 14: Current De-rating (Note B) 150 Zθ JC Normalized Transient Thermal Resistance 10 1 D=Ton/T TJ,PK=TC+PDM.ZθJC.RθJC RθJC=1.2°C/W In descending order D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse 0.1 0.01 Single Pulse 0.001 0.000001 0.00001 0.0001 0.001 0.01 0.1 1 10 Pulse Width (s) Figure 15: Normalized Maximum Transient Thermal Impedance for AOT(B)7S60 (Note F) Zθ JC Normalized Transient Thermal Resistance 10 1 D=Ton/T TJ,PK=TC+PDM.ZθJC.RθJC RθJC=5°C/W In descending order D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse 0.1 0.01 Single Pulse 0.001 0.00001 0.0001 0.001 0.01 0.1 1 10 100 Pulse Width (s) Figure 16: Normalized Maximum Transient Thermal Impedance for AOTF7S60L (Note F) Rev0: Aug 2011 www.aosmd.com Page 5 of 6 AOT7S60/AOB7S60/AOTF7S60 Gate Charge Test Circuit & Waveform Vgs Qg 10V + + Vds VDC - Qgs Qgd VDC DUT - Vgs Ig Charge Res istive Switching Test Circuit & Waveforms RL Vds Vds DUT Vgs + VDC 90% Vdd - Rg 10% Vgs Vgs t d(on) tr t d(off) t on tf t off Unclamped Inductive Switching (UIS) Test Circuit & Waveforms L EAR= 1/2 LI Vds 2 AR BVDSS Vds Id + Vdd Vgs Vgs I AR VDC - Rg Id DUT Vgs Vgs Diode Recovery Tes t Circuit & Waveforms Qrr = - Idt Vds + DUT Vgs Vds - Isd Vgs Ig Rev0: Aug 2011 L Isd + VDC - IF trr dI/dt IRM Vdd Vdd Vds www.aosmd.com Page 6 of 6