C8051F530A 25 MIPS, 8 kB Flash, 12-Bit ADC, 20-Pin Automotive MCU Analog Peripherals High-Speed 8051 µC Core - 12-Bit ADC, 5 V input signal; up to 16 external inputs - ±1 LSB INL; guaranteed monotonic Programmable throughput up to 200 ksps - Data-dependent windowed interrupt generator Memory - Programmable gain maximizes input signal span Built-in Temperature Sensor (±3 °C) Programmable Comparator Precision Internal Voltage Reference VDD Monitor/Brown-out Detector - - On-chip debug circuitry facilitates full speed, non-intrusive in-system debug (no emulator required) Provides breakpoints, single stepping, watch-points Inspect/modify memory, registers, and stack - Development Kit: C8051F530ADK Programmable 16-bit counter array with three capture/compare modules Three general-purpose 16-bit counter/timers Internal programmable 0.5% oscillator: Up to 25 MHz External oscillator: Crystal, RC, C, or CMOS Clock C8051F530A-IT, 20-Pin TSSOP (RoHS-compliant), 6x6 mm2 C8051F530A-IM, 20-Pin QFN (RoHS-compliant), 4 x 4 mm2 VREGIN Digital Peripherals 8 kB Flash Program Memory Debug / Programming Hardware SPI™ and UART serial ports available concurrently Port I/O Configuration CIP-51 8051 Controller Core (25 MHz) Reset Up to 16 digital I/O; all are 5 V push-pull Ordering Part Numbers Multiple power saving sleep and shutdown modes C2CK/RST Master or slave operation using dedicated hardware Clock Sources Superior performance to emulation systems using ICE-chips, target pods, and sockets Power On Reset 256 bytes data RAM Digital Peripherals Temperature Range: –40 to +125 °C Operating Voltage: 1.8 to 5.25 V - 8 kB Flash; in-system programmable; flexible security features LIN 2.1 On-Chip Debug - Pipelined instruction architecture; executes 70% of instructions in one or two system clocks Up to 25 MIPS throughput Port 0 Drivers P0.0 P0.1 P0.2 P0.3 P0.4 P0.5 P0.6/C2D P0.7/XTAL1 Port 1 Drivers P1.0/XTAL2 P1.1 P1.2 P1.3 P1.4 P1.5 P1.6 P1.7 UART0 Timers 0, 1, 2 256 Byte SRAM C2D Priority Crossbar Decoder 3 Channel PCA/WDT LIN 2.1 VREGIN Voltage Regulator (LDO) SPI SFR Bus VDD GND System Clock Setup XTAL1 XTAL2 Crossbar Control Analog Peripherals Voltage Reference VDD VREF VREF External Oscillator Internal Oscillator (±0.5%) A M U X 12-bit 200ksps ADC VDD VREF Temp Sensor GND CP0, CP0A + - Comparator Automotive Copyright © 2008 by Silicon Laboratories 11.20.2008