PROFET® BTS650P
Smart Highside High Current Power Switch
Features
Product Summary
Overvoltage protection
Output clamp
Operating voltage
On-state resistance
Load current (ISO)
Short circuit current limitation
Current sense ratio
• Overload protection
• Current limitation
• Short circuit protection
• Overtemperature protection
• Overvoltage protection (including load dump)
• Clamp of negative voltage at output
• Fast deenergizing of inductive loads 1)
• Low ohmic inverse current operation
• Reverse battery protection
• Diagnostic feedback with load current sense
• Open load detection via current sense
• Loss of Vbb protection2)
• Electrostatic discharge (ESD) protection
Vbb(AZ)
62
V
VON(CL)
42 V
Vbb(on) 5.0 ... 34 V
RON
6.0 mΩ
IL(ISO)
70
A
IL(SC)
130
A
IL : IIS
14 000
TO-220AB/7
Application
• Power switch with current sense diagnostic
feedback for 12 V and 24 V DC grounded loads
• Most suitable for loads with high inrush current
like lamps and motors; all types of resistive and
inductive loads
• Replaces electromechanical relays, fuses and
discrete circuits
7
7
1
1
SMD
Standard
General Description
N channel vertical power FET with charge pump, current controlled input and diagnostic feedback with load
current sense, integrated in Smart SIPMOS chip on chip technology. Fully protected by embedded protection
functions.
4 & Tab
Voltage
source
Voltage
sensor
Overvoltage
Current
Gate
protection
limit
protection
Charge pump
Level shifter
Rectifier
3
IN
Logic
ESD
I IN
+ V bb
R bb
OUT
Limit for
unclamped
ind. loads
Output
Voltage
detection
1,2,6,7
IL
Current
Sense
Load
Temperature
sensor
IS
PROFET
I IS
Load GND
5
VIN
V IS
R
IS
Logic GND
1
)
2)
With additional external diode.
Additional external diode required for energized inductive loads (see page 9).
Semiconductor Group
Page 1 of 16
1998-Nov.-2
BTS650P
Pin
Symbol
Function
1
OUT
O
Output to the load. The pins 1,2,6 and 7 must be shorted with each other
3
especially in high current applications! )
2
OUT
O
Output to the load. The pins 1,2,6 and 7 must be shorted with each other
especially in high current applications!3)
3
IN
I
Input, activates the power switch in case of short to ground
4
Vbb
+
Positive power supply voltage, the tab is electrically connected to this pin.
In high current applications the tab should be used for the Vbb connection
4
instead of this pin ).
5
IS
S
Diagnostic feedback providing a sense current proportional to the load
current; zero current on failure (see Truth Table on page 7)
6
OUT
O
Output to the load. The pins 1,2,6 and 7 must be shorted with each other
especially in high current applications!3)
7
OUT
O
Output to the load. The pins 1,2,6 and 7 must be shorted with each other
especially in high current applications!3)
Maximum Ratings at Tj = 25 °C unless otherwise specified
Parameter
Supply voltage (overvoltage protection see page 4)
Supply voltage for short circuit protection,
Tj,start =-40 ...+150°C: (see diagram on page 10)
Load current (short circuit current, see page 5)
Load dump protection VLoadDump = VA + Vs, VA = 13.5 V
RI5) = 2 Ω, RL = 0.54 Ω, td = 200 ms,
IN, IS = open or grounded
Operating temperature range
Storage temperature range
Power dissipation (DC), TC ≤ 25 °C
Inductive load switch-off energy dissipation, single pulse
Vbb = 12V, Tj,start = 150°C, TC = 150°C const.,
IL = 20 A, ZL = 7.5 mH, 0 Ω, see diagrams on page 10
Electrostatic discharge capability (ESD)
Symbol
Vbb
Vbb
Values
42
34
Unit
V
V
self-limited
A
75
V
Tj
Tstg
Ptot
-40 ...+150
-55 ...+150
170
°C
EAS
1.5
J
4
kV
+15 , -250
+15 , -250
mA
IL
VLoad dump6)
VESD
W
Human Body Model acc. MIL-STD883D, method 3015.7 and ESD
assn. std. S5.1-1993, C = 100 pF, R = 1.5 kΩ
Current through input pin (DC)
Current through current sense status pin (DC)
IIN
IIS
see internal circuit diagrams on page 7 and 8
3)
4)
5)
6)
Not shorting all outputs will considerably increase the on-state resistance, reduce the peak current
capability and decrease the current sense accuracy
Otherwise add up to 0.7 mΩ (depending on used length of the pin) to the RON if the pin is used instead of
the tab.
RI = internal resistance of the load dump test pulse generator.
VLoad dump is setup without the DUT connected to the generator per ISO 7637-1 and DIN 40839.
Semiconductor Group
Page 2
1998-Nov.-2
BTS650P
Thermal Characteristics
Parameter and Conditions
Thermal resistance
Symbol
7
chip - case: RthJC )
junction - ambient (free air): RthJA
SMD version, device on PCB8):
min
---
Values
typ
max
-- 0.75
60
-33
Unit
K/W
Electrical Characteristics
Parameter and Conditions
Symbol
at Tj = -40 ... +150 °C, Vbb = 12 V unless otherwise specified
Load Switching Capabilities and Characteristics
On-state resistance (Tab to pins 1,2,6,7, see
IL = 20 A, Tj = 25 °C:
measurement circuit page 7)
VIN = 0, IL = 20 A, Tj = 150 °C:
IL = 90 A, Tj = 150 °C:
9)
Vbb = 6V , IL = 20 A, Tj = 150 °C:
Nominal load current10) (Tab to pins 1,2,6,7)
ISO 10483-1/6.7: VON = 0.5 V, Tc = 85 °C 11)
Nominal load current10), device on PCB8))
TA = 85 °C, Tj ≤ 150 °C VON ≤ 0.5 V,
Maximum load current in resistive range
(Tab to pins 1,2,6,7)
VON = 1.8 V, Tc = 25 °C:
see diagram on page 13
VON = 1.8 V, Tc = 150 °C:
12)
Turn-on time
IIN
to 90% VOUT:
to 10% VOUT:
Turn-off time
IIN
RL = 1 Ω , Tj =-40...+150°C
Slew rate on 12) (10 to 30% VOUT )
RL = 1 Ω , TJ = 25 °C
Slew rate off 12) (70 to 40% VOUT )
RL = 1 Ω , TJ = 25 °C
RON
Values
min
typ
max
6.0
10.5
10.7
17
--
mΩ
-55
4.4
7.9
-10
70
IL(NOM)
13.6
17
--
A
IL(Max)
250
150
100
30
-----
--420
110
dV/dton
--
0.7
--
V/µs
-dV/dtoff
--
1.1
--
V/µs
RON(Static)
IL(ISO)
ton
toff
--
Unit
A
A
µs
7)
Thermal resistance RthCH case to heatsink (about 0.5 ... 0.9 K/W with silicone paste) not included!
Device on 50mm*50mm*1.5mm epoxy PCB FR4 with 6cm2 (one layer, 70µm thick) copper area for Vbb
connection. PCB is vertical without blown air.
9)
Decrease of Vbb below 10 V causes slowly a dynamic increase of RON to a higher value of RON(Static). As
long as VbIN > VbIN(u) max, RON increase is less than 10 % per second for TJ < 85 °C.
10)
Not tested, specified by design.
11)
TJ is about 105°C under these conditions.
12)
See timing diagram on page 14.
8
)
Semiconductor Group
Page 3
1998-Nov.-2
BTS650P
Inverse Load Current Operation
On-state resistance (Pins 1,2,6,7 to pin 4)
VbIN = 12 V, IL = - 20 A
Tj = 25 °C: RON(inv)
see diagram on page 10
Tj = 150 °C:
Nominal inverse load current (Pins 1,2,6,7 to Tab)
IL(inv)
VON = -0.5 V, Tc = 85 °C11
Drain-source diode voltage (Vout > Vbb)
-VON
IL = - 20 A, IIN = 0, Tj = +150°C
Operating Parameters
Operating voltage (VIN = 0) 9, 13)
Undervoltage shutdown 14)
Undervoltage start of charge pump
see diagram page 15
Overvoltage protection15)
Tj =-40°C:
Ibb = 15 mA
Tj = 25...+150°C:
Standby current
Tj =-40...+25°C:
IIN = 0
Tj = 150°C:
6.0
10.5
--
mΩ
55
4.4
7.9
70
--
0.6
--
V
Vbb(on)
VbIN(u)
5.0
1.5
-3.0
34
4.5
V
V
VbIN(ucp)
VbIN(Z)
3.0
60
62
---
4.5
-66
15
25
6.0
--25
50
V
V
Ibb(off)
--
A
µA
) If the device is turned on before a V -decrease, the operating voltage range is extended down to VbIN(u).
bb
For all voltages 0 ... 34 V the device is fully protected against overtemperature and short circuit.
14)
VbIN = Vbb - VIN see diagram on page 7. When VbIN increases from less than VbIN(u) up to VbIN(ucp) = 5 V
(typ.) the charge pump is not active and VOUT ≈Vbb - 3 V.
15)
See also VON(CL) in circuit diagram on page 9.
13
Semiconductor Group
Page 4
1998-Nov.-2
BTS650P
Parameter and Conditions
Symbol
at Tj = -40 ... +150 °C, Vbb = 12 V unless otherwise specified
Protection Functions
Short circuit current limit (Tab to pins 1,2,6,7)
VON = 12 V, time until shutdown max. 350 µs Tc =-40°C:
Tc =25°C:
Tc =+150°C:
Short circuit shutdown delay after input current
positive slope, VON > VON(SC)
Unit
IL(SC)
IL(SC)
IL(SC)
--65
110
130
115
td(SC)
80
--
350
µs
14
16.5
20
V
VON(CL)
39
42
47
V
VON(SC)
Tjt
∆Tjt
-150
--
6
-10
----
V
°C
K
--
--
32
V
--
5.4
8.9
7.0
12.3
mΩ
--
120
--
Ω
min. value valid only if input "off-signal" time exceeds 30 µs
Output clamp 16)
(inductive load switch off)
Values
min
typ
max
IL= 40 mA: -VOUT(CL)
-180
--
A
see diagram Ind. and overvolt. output clamp page 8
Output clamp (inductive load switch off)
at VOUT = Vbb - VON(CL) (e.g. overvoltage)
IL= 40 mA
Short circuit shutdown detection voltage
(pin 4 to pins 1,2,6,7)
Thermal overload trip temperature
Thermal hysteresis
Reverse Battery
17
Reverse battery voltage )
-Vbb
On-state resistance (Pins 1,2,6,7 to pin 4) Tj = 25 °C: RON(rev)
Vbb = -12V, VIN = 0, IL = - 20 A, RIS = 1 kΩ Tj = 150 °C:
Rbb
Integrated resistor in Vbb line
) This output clamp can be "switched off" by using an additional diode at the IS-Pin (see page 8). If the diode
is used, VOUT is clamped to Vbb- VON(CL) at inductive load switch off.
17)
The reverse load current through the intrinsic drain-source diode has to be limited by the connected load
(as it is done with all polarity symmetric loads). Note that under off-conditions (I IN = I IS = 0) the power
transistor is not activated. This results in raised power dissipation due to the higher voltage drop across the
intrinsic drain-source diode. The temperature protection is not active during reverse current operation!
Increasing reverse battery voltage capability is simply possible as described on page 9.
16
Semiconductor Group
Page 5
1998-Nov.-2
BTS650P
Parameter and Conditions
Symbol
at Tj = -40 ... +150 °C, Vbb = 12 V unless otherwise specified
Diagnostic Characteristics
Current sense ratio,
static on-condition,
kILIS = IL : IIS18,
VON < 1.5 V ),
VIS <VOUT - 5V,
VbIN > 4.0 V
see diagram on page 12
Values
min
typ
max
Unit
IL = 90 A,Tj =-40°C: kILIS
Tj =25°C:
Tj =150°C:
IL = 20 A,Tj =-40°C:
Tj =25°C:
Tj =150°C:
IL = 10 A,Tj =-40°C:
Tj =25°C:
Tj =150°C:
IL = 4 A,Tj =-40°C:
Tj =25°C:
Tj =150°C:
IIS=0 by IIN =0 (e.g. during deenergizing of inductive loads):
12 500
12 500
11 500
12 500
12 000
11 500
12 500
11 500
11 500
11 000
11 000
11 200
14 200
13 700
13 000
14 500
14 000
13 400
15 000
14 300
13 500
18 000
15 400
14 000
16 000
16 000
14 500
17 500
16 500
15 000
19 000
17 500
15 500
28 500
22 000
19 000
IIS,lim
6.5
--
--
mA
Sense current saturation
IIN = 0: IIS(LL)
VIN = 0, IL ≤ 0: IIS(LH)
Current sense overvoltage protection Tj =-40°C: VbIS(Z)
Ibb = 15 mA
Tj = 25...+150°C:
19)
Current sense settling time
ts(IS)
---
-2
0.5
--
µA
60
62
--
-66
--
--500
V
µs
Input
Input and operating current (see diagram page 13) IIN(on)
--
0.8
1.5
mA
--
--
80
µA
Current sense leakage current
IN grounded (VIN = 0)
Input current for turn-off20)
IIN(off)
18)
If VON is higher, the sense current is no longer proportional to the load current due to sense current
saturation, see IIS,lim .
19)
Not tested, specified by design.
20)
We recommend the resistance between IN and GND to be less than 0.5 kΩ for turn-on and more than
500kΩ for turn-off. Consider that when the device is switched off (IIN = 0) the voltage between IN and GND
reaches almost Vbb.
Semiconductor Group
Page 6
1998-Nov.-2
BTS650P
Truth Table
Normal
operation
Very high
load current
Currentlimitation
Short circuit to
GND
Overtemperature
Short circuit to
Vbb
Open load
Negative output
voltage clamp
Inverse load
current
Input
current
Output
Current
Sense
level
level
IIS
L
H
L
H
0
nominal
H
H
IIS, lim
H
H
0
L
H
L
H
L
H
L
H
L
L
L
L
L
H
H
22
Z )
H
L
0
0
0
0
0
21
<nominal )
0
0
0
L
H
H
H
0
0
Remark
=IL / kilis, up to IIS=IIS,lim
up to VON=VON(Fold back)
IIS no longer proportional to IL
VON > VON(Fold back)
if VON>VON(SC), shutdown will occure
L = "Low" Level
H = "High" Level
Overtemperature reset by cooling: Tj < Tjt (see diagram on page 15)
Short circuit to GND: Shutdown remains latched until next reset via input (see diagram on page 14)
Terms
RON measurement layout
I bb
4
VbIN
l ≤
5.5mm
VON
Vbb
IL
V
3
bb
IN
RIN
OUT
PROFET
IS
5
V
IN
I IN
1,2,6,7
VbIS
VIS
Vbb force
I IS
Out Force Sense
contacts
contacts
(both out
pins parallel)
VOUT
DS
R IS
Typical RON for SMD version is about 0.2 mΩ less
than straight leads due to l ≈ 2 mm
Two or more devices can easily be connected in
parallel to increase load current capability.
21
22
) Low ohmic short to Vbb may reduce the output current IL and can thus be detected via the sense current IIS.
) Power Transistor "OFF", potential defined by external impedance.
Semiconductor Group
Page 7
1998-Nov.-2
BTS650P
Input circuit (ESD protection)
Current sense status output
V bb
Vbb
ZD
V
R bb
V
Z,IS
R bb
ZD
Z,IN
IS
V bIN
IN
I IS
I
R
IN
V IN
When the device is switched off (IIN = 0) the voltage
between IN and GND reaches almost Vbb. Use a
mechanical switch, a bipolar or MOS transistor with
appropriate breakdown voltage as driver.
VZ,IN = 66 V (typ).
Short circuit detection
Fault Condition: VON > VON(SC) (6 V typ.) and t> td(SC)
(80 ...350 µs).
VIS
IS
VZ,IS = 66 V (typ.), RIS = 1 kΩ nominal (or 1 kΩ /n, if n
devices are connected in parallel). IS = IL/kilis can be
driven only by the internal circuit as long as Vout - VIS >
5 V. If you want measure load currents up to IL(M), RIS
Vbb - 5 V
should be less than
.
IL(M) / Kilis
Note: For large values of RIS the voltage VIS can
reach almost Vbb. See also overvoltage protection.
If you don't use the current sense output in your
application, you can leave it open.
Inductive and overvoltage output clamp
+ Vbb
VZ1
+ Vbb
VON
VON
VZG
OUT
OUT
Logic
unit
PROFET
Short circuit
detection
IS
DS
VOUT
VON is clamped to VON(Cl) = 42 V typ. At inductive load
switch-off without DS, VOUT is clamped to VOUT(CL) =
-19 V typ. via VZG. With DS, VOUT is clamped to Vbb VON(CL) via VZ1. Using DS gives faster deenergizing of
the inductive load, but higher peak power dissipation in
the PROFET.
Semiconductor Group
Page 8
1998-Nov.-2
BTS650P
Overvoltage protection of logic part
+ Vbb
V
R IN
Z,IN
V
Provide a current path with load current capability by
using a diode, a Z-diode, or a varistor. (VZL < 72 V or
VZb < 30 V if RIN=0). For higher clamp voltages
currents at IN and IS have to be limited to 250 mA.
R bb
Z,IS
Vbb disconnect with energized inductive
load
IN
Logic
V OUT
Version a:
PROFET
IS
R IS
V
bb
V
V Z,VIS
RV
IN
bb
PROFET
OUT
Signal GND
Rbb = 120 Ω typ., VZ,IN = VZ,IS = 66 V typ., RIS = 1 kΩ
nominal. Note that when overvoltage exceeds 71 V typ.
a voltage above 5V can occur between IS and GND, if
RV, VZ,VIS are not used.
Reverse battery protection
IS
V ZL
Version b:
- Vbb
Rbb
V
IN
Vbb
bb
OUT
RIN
IN
PROFET
OUT
Power
Transistor
Logic
IS
IS
DS
D
RIS
Signal GND
V Zb
RL
RV
Power GND
RV ≥ 1 kΩ, RIS = 1 kΩ nominal. Add RIN for reverse
battery protection in applications with Vbb above
1
1
1
16 V17); recommended value:
+
+
=
RIN RIS RV
0.1A
1
0.1A
if DS is not used (or
=
if DS
RIN |Vbb| - 12V
|Vbb| - 12V
is used).
To minimize power dissipation at reverse battery
operation, the summarized current into the IN and IS
pin should be about 120mA. The current can be
provided by using a small signal diode D in parallel to
the input switch, by using a MOSFET input switch or
by proper adjusting the current through RIS and RV.
Semiconductor Group
Note that there is no reverse battery protection when
using a diode without additional Z-diode VZL, VZb.
Version c: Sometimes a neccessary voltage clamp is
given by non inductive loads RL connected to the
same switch and eliminates the need of clamping
circuit:
Page 9
V
Vbb
bb
IN
PROFET
RL
OUT
IS
1998-Nov.-2
BTS650P
Inverse load current operation
Maximum allowable load inductance for
a single switch off
L = f (IL ); Tj,start = 150°C, Vbb = 12 V, RL = 0 Ω
Vbb
V bb
L [µH]
- IL
IN
+
PROFET
OUT
1000000
V OUT +
IS
-
100000
IIS
V IN
-
V IS
R IS
10000
The device is specified for inverse load current
operation (VOUT > Vbb > 0V). The current sense
feature is not available during this kind of operation (IIS
= 0). With IIN = 0 (e.g. input open) only the intrinsic
drain source diode is conducting resulting in considerably increased power dissipation. If the device is
switched on (VIN = 0), this power dissipation is
decreased to the much lower value RON(INV) * I2
(specifications see page 4).
Note: Temperature protection during inverse load
current operation is not possible!
1000
100
10
1
1A
Inductive load switch-off energy
dissipation
10 A
100 A
1000 A
IL [A]
E bb
Externally adjustable current limit
E AS
V
ELoad
bb
i L(t)
V bb
IN
PROFET
OUT
IS
I
IN
ZL
RIS
{
EL
L
RL
ER
If the device is conducting, the sense current can be
used to reduce the short circuit current and allow
higher lead inductance (see diagram above). The
device will be turned off, if the threshold voltage of T2
is reached by IS*RIS . After a delay time defined by
RV*CV T1 will be reset. The device is turned on again,
the short circuit current is defined by IL(SC) and the
device is shut down after td(SC) with latch function.
Vbb
Energy stored in load inductance:
V bb
2
EL = 1/2·L·I L
IN
While demagnetizing load inductance, the energy
dissipated in PROFET is
OUT
IS
RV
EAS= Ebb + EL - ER= ∫ VON(CL)·iL(t) dt,
Rload
with an approximate solution for RL > 0 Ω:
IN
Signal
IL· L
IL·RL
EAS=
(V + |VOUT(CL)|) ln (1+ |V
)
2·RL bb
OUT(CL)|
Semiconductor Group
PROFET
Page 10
T1
Signal
GND
CV
T2
R IS
Power
GND
1998-Nov.-2
BTS650P
Options Overview
Type
BTS
550P 555
650P
Overtemperature protection with hysteresis
Tj >150 °C, latch function23)
Tj >150 °C, with auto-restart on cooling
Short circuit to GND protection
X
switches off when VON>6 V typ.
(when first turned on after approx. 180 µs)
X
X
Overvoltage shutdown
-
-
X
24
X )
X
X24)
X
X
X
Output negative voltage transient limit
to Vbb - VON(CL)
to VOUT = -19 V typ
) Latch except when V -V
bb
OUT < VON(SC) after shutdown. In most cases VOUT = 0 V after shutdown (VOUT
≠ 0 V only if forced externally). So the device remains latched unless Vbb < VON(SC) (see page 5). No latch
between turn on and td(SC).
24)
Can be "switched off" by using a diode DS (see page 8) or leaving open the current sense output.
23
Semiconductor Group
Page 11
1998-Nov.-2
BTS650P
Characteristics
Current sense versus load current:
IIS = f(IL), TJ= -40 ... +150 °C
IIS [mA]
Current sense ratio:
IIS = f(IL), TJ= 25 °C
kILIS
7
22000
6
20000
5
18000
max
max
4
16000
3
min
typ
14000
2
min
1
12000
0
10000
0
20
40
60
0
80
20
40
60
80
IL [A]
Current sense ratio:
KILIS = f(IL),TJ = -40°C
kilis
IL [A]
Current sense ratio:
KILIS = f(IL),TJ = 150°C
kilis
30000
22000
28000
20000
26000
24000
18000
22000
20000
16000
max
14000
typ
12000
min
max
18000
16000
typ
14000
min
12000
10000
10000
0
20
40
60
80
0
IL [A]
Semiconductor Group
Page 12
20
40
60
80
IL [A]
1998-Nov.-2
BTS650P
Typ. input current
IIN = f (VbIN), VbIN = Vbb - VIN
IIN [mA]
Typ. current limitation characteristic
IL = f (VON, Tj )
IL [A]
450
1.6
400
1.4
350
1.2
300
VON > VON(S C) only for t < td(S C)
(otherwis e immediate s hutdown)
1
250
0.8
200
T J = 25°C
150
0.6
100
0.4
T J = -40°C
50
T J = 150°C
0.2
0
0
VON(F B) 5
10
15
20
VON [V]
In case of VON > VON(SC) (typ. 6 V) the device will be
switched off by internal short circuit detection.
0
0
20
40
60
80
VbIN [V]
Typ. on-state resistance
RON = f (Vbb, Tj ); IL = 20 A; VIN = 0
RON [mOhm]
14
static
dynamic
12
10
Tj = 150°C
8
85°C
6
25°C
4
-40°C
2
0
0
5
10
15
40
Vbb [V]
Semiconductor Group
Page 13
1998-Nov.-2
BTS650P
Timing diagrams
Figure 2b: Switching an inductive load:
Figure 1a: Switching a resistive load,
change of load current in on-condition:
IIN
IIN
VOUT
dV/dtoff
VOUT
90%
t on
dV/dton
t off
10%
IL
tslc(IS)
Load 1
IIS
IL
t slc(IS)
Load 2
IIS
t
tson(IS)
t
t soff(IS)
The sense signal is not valid during a settling time
after turn-on/off and after change of load current.
Figure 3a: Short circuit:
shut down by short circuit detection, reset by IIN = 0.
Figure 2a: Switching motors and lamps:
IIN
IIN
IL
IL(SCp)
VOUT
td(SC)
IIL
IIS
VOUT>>0
VOUT=0
t
IIS
t
Shut down remains latched until next reset via input.
Sense current saturation can occur at very high
inrush currents (see IIS,lim on page 6).
Semiconductor Group
Page 14
1998-Nov.-2
BTS650P
Figure 4a: Overtemperature
Reset if Tj<Tjt
IIN
IIS
Auto Restart
VOUT
Tj
t
Figure 6a: Undervoltage restart of charge pump,
overvoltage clamp
VOUT
VIN = 0
VON(CL)
dynamic, short
Undervoltage
not below
VbIN(u)
6
4
IIN = 0
2
V ON(CL)
0
0
VbIN(u)
Semiconductor Group
VbIN(ucp)
Page 15
1998-Nov.-2
BTS650P
Package and Ordering Code
All dimensions in mm
Standard TO-220AB/7
BTS650P
Ordering code
Q67060-S6308-A2
Published by Siemens AG, Bereich Halbleiter Vetrieb, Werbung,
Balanstraße 73, D-81541 München
Siemens AG 1998. All Rights Reserved
Attention please!
As far as patents or other rights of third parties are concerned, liability
is only assumed for components, not for applications, processes and
circuits implemented within components or assemblies. The
information describes a type of component and shall not be
considered as warranted characteristics. Terms of delivery and rights
to change design reserved. For questions on technology, delivery and
prices please contact the Semiconductor Group Offices in Germany
or the Siemens Companies and Representatives worldwide (see
address list). Due to technical requirements components may contain
dangerous substances. For information on the types in question
please contact your nearest Siemens Office, Semiconductor Group.
Siemens AG is an approved CECC manufacturer.
Packing: Please use the recycling operators known to you. We can
also help you - get in touch with your nearest sales office. By
agreement we will take packing material back, if it is sorted. You must
bear the costs of transport. For packing material that is returned to us
unsorted or which we are not obliged to accept, we shall have to
invoice you for any costs incurred.
Components used in life-support devices or systems must be
25
expressly authorised for such purpose! Critical components ) of
the Semiconductor Group of Siemens AG, may only be used in life
26
supporting devices or systems ) with the express written approval of
the Semiconductor Group of Siemens AG.
SMD TO 220AB/7, Opt. E3180 Ordering code
BTS650P E3180A
T&R:
Q67060-S6308-A4
Footprint:
10.8
9.4
16.15
4.6
0.47
0.8
8.42
25)
26)
Semiconductor Group
Page 16
A critical component is a component used in a life-support
device or system whose failure can reasonably be expected to
cause the failure of that life-support device or system, or to affect
its safety or effectiveness of that device or system.
Life support devices or systems are intended (a) to be implanted
in the human body or (b) support and/or maintain and sustain
and/or protect human life. If they fail, it is reasonably to assume
that the health of the user or other persons may be endangered.
1998-Nov.-2