Quad 12MHz Rail-to-Rail Input-Output Buffer Features General Description • • • • The EL5421C is a quad, low power, high voltage rail-to-rail input-output buffer. Operating on supplies ranging from 5V to 15V, while consuming only 500µA per channel, the EL5421C has a bandwidth of 12MHz (-3dB). The EL5421C also provides rail-to-rail input and output ability, giving the maximum dynamic range at any supply voltage. 12MHz -3dB Bandwidth Unity gain buffer Supply voltage = 4.5V to 16.5V Low supply current (per buffer) = 500µA • High slew rate = 10V/µs • Rail to Rail operation • “Mini” SO Package (MSOP) Applications • • • • • • • • • • TFT-LCD Drive Circuits Electronics Notebooks Electronics Games Personal Communication Devices Personal Digital Assistants (PDA) Portable Instrumentation Wireless LANs Office Automation Active Filters ADC/DAC Buffer EL5421C EL5421C The EL5421C also features fast slewing and settling times, as well as a high output drive capability of 30mA (sink and source). These features make the EL5421C ideal for use as voltage reference buffers in Thin Film Transistor Liquid Crystal Displays (TFT-LCD). Other applications include battery power, portable devices and anywhere low power consumption is important. The EL5421C is available in a space saving 10-Pin MSOP package and operates over a temperature range of -40°C to +85°C. Connection Diagram Ordering Information Part No. Temp. Range Package Outline # EL5421CY -40°C to +85°C 10-Pin MSOP MDP0043 VOUTA 1 10 VOUTD VINA 2 9 VIND VS+ 3 8 VS- VINB 4 7 VINC VOUTB 5 6 VOUTC EL 5421C (MSOP 10) October 2, 2000 © 2000 Elantec Semiconductor, Inc. EL5421C EL5421C Quad 12MHz Rail-to-Rail Input-Output Buffer Absolute Maximum Ratings (T A = 25°C) Values beyond absolute maximum ratings can cause the device to be prematurely damaged. Absolute maximum ratings are stress ratings only and functional device operation is not implied +18V Supply Voltage between VS+ and VSInput Voltage VS- - 0.5V, VS+ +0.5V Maximum Continuous Output Current 30mA Maximum Die Temperature Storage Temperature Operating Temperature Power Dissipation ESD Voltage +125°C -65°C to +150°C -40°C to +85°C See Curves 2kV Important Note: All parameters having Min/Max specifications are guaranteed. Typ values are for information purposes only. Unless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA Electrical Characteristics VS+ = +5V, VS- = -5V, RL = 10kΩ and CL = 10pF to 0V, TA = 25°C unless otherwise specified. Parameter Description Condition Min Typ Max 12 Unit Input Characteristics VOS Input Offset Voltage VCM = 0V 2 TCVOS Average Offset Voltage Drift [1] 5 VCM = 0V IB Input Bias Current RIN Input Impedance CIN Input Capacitance AV Voltage Gain 2 50 1 0.995 nA GΩ 1.35 -4.5V ≤ VOUT ≤ 4.5V mV µV/°C pF 1.005 V/V -4.85 V Output Characteristics VOL Output Swing Low IL = -5mA VOH Output Swing High IL = 5mA 4.85 -4.92 4.92 V ISC Short Circuit Current Short to GND [2] ±80 ±120 mA 60 Power Supply Performance PSRR Power Supply Rejection Ratio VS is moved from ±2.25V to ±7.75V IS Supply Current (Per Buffer) No Load 80 500 dB 750 µA Dynamic Performance SR Slew Rate [3] -4.0V ≤ VOUT ≤ 4.0V, 20% to 80% tS Settling to +0.1% VO = 2V Step 500 ns BW -3dB Bandwidth RL = 10kΩ, CL = 10pF 12 MHz CS Channel Separation f = 5MHz 75 dB 1. Measured over the operating temperature range 2. Parameter is guaranteed (but not test) by design and characterization data 3. Slew rate is measured on rising and falling edges 2 7 10 V/µs Electrical Characteristics VS+ = +5V, VS- = 0V, RL = 10kΩ and CL = 10pF to 2.5V, TA = 25°C unless otherwise specified. Parameter Description Condition Min Typ Max 10 Unit Input Characteristics VOS Input Offset Voltage VCM = 2.5V 2 TCVOS Average Offset Voltage Drift [1] 5 VCM = 2.5V 2 IB Input Bias Current RIN Input Impedance CIN Input Capacitance AV Voltage Gain 50 1 0.995 nA GΩ 1.35 0.5 ≤ VOUT ≤ 4.5V mV µV/°C pF 1.005 V/V 150 mV Output Characteristics VOL Output Swing Low IL = -5mA VOH Output Swing High IL = 5mA 4.85 4.92 V ISC Short Circuit Current Short to GND [2] ±80 ±120 mA 60 80 Power Supply Performance PSRR Power Supply Rejection Ratio VS is moved from 4.5V to 15.5V IS Supply Current (Per Buffer) No Load 80 500 dB 750 µA Dynamic Performance SR Slew Rate [3] 1V ≤ VOUT ≤ 4V, 20% to 80% tS Settling to +0.1% VO = 2V Step 500 ns BW -3dB Bandwidth RL = 10 kΩ, CL = 10pF 12 MHz CS Channel Separation f = 5MHz 75 dB 1. Measured over the operating temperature range 2. Parameter is guaranteed (but not test) by design and characterization data 3. Slew rate is measured on rising and falling edges 3 7 10 V/µs EL5421C EL5421C Quad 12MHz Rail-to-Rail Input-Output Buffer EL5421C EL5421C Quad 12MHz Rail-to-Rail Input-Output Buffer Electrical Characteristics VS+ = +15V, VS- = 0V, RL = 10kΩ and CL = 10pF to 7.5V, TA = 25°C unless otherwise specified. Parameter Description Condition Min Typ Max 14 Unit Input Characteristics VOS Input Offset Voltage VCM = 7.5V 2 TCVOS Average Offset Voltage Drift [1] 5 VCM= 7.5V IB Input Bias Current RIN Input Impedance CIN Input Capacitance AV Voltage Gain 2 50 1 0.995 nA GΩ 1.35 0.5 ≤ VOUT ≤ 14.5V mV µV/°C pF 1.005 V/V 150 mV Output Characteristics VOL Output Swing Low IL = -5mA VOH Output Swing High IL = 5mA ISC Short Circuit Current 80 14.85 14.92 V Short to GND [2] ±80 ±120 mA 60 Power Supply Performance PSRR Power Supply Rejection Ratio VS is moved from 4.5V to 15.5V IS Supply Current (Per Buffer) No Load 80 500 dB 750 µA Dynamic Performance SR Slew Rate [3] 1V ≤ VOUT ≤14V, 20% to 80% tS Settling to +0.1% VO = 2V Step 500 ns BW -3dB Bandwidth RL = 10 kΩ, CL = 10pF 12 MHz CS Channel Separation f = 5MHz 75 dB 1. Measured over the operating temperature range 2. Parameter is guaranteed (but not test) by design and characterization data 3. Slew rate is measured on rising and falling edges 4 7 10 V/µs Typical Performance Curves Input Offset Voltage Distribution Input Offset Voltage Drift 70 1800 1600 VS=±5V TA=25°C Typical Production Distribution 60 1200 Quantity (Buffers) Quantity (Buffers) 1400 VS=±5V Typical Production Distribution 1000 800 600 50 40 30 20 400 10 200 0 21 19 17 15 13 9 11 7 5 3 1 12 8 10 6 4 2 -0 -2 -4 -6 -8 -10 -12 0 Input Offset Voltage Drift, TCVOS(µ V/°C) Input Offset Voltage (mV) Input Bias Current vs Temperature Input Offset Voltage vs Temperature 10 2.0 VS=±5V Input Bias Current (nA) Input Offset Voltage (mV) VS=±5V 5 0 -5 0.0 -2.0 -50 0 50 100 150 -50 0 Output High Voltage vs Temperature 100 150 Output Low Voltage vs Temperature -4.91 4.97 -4.92 VS=±5V IOUT=5mA 4.96 Output Low Voltage (V) Output High Voltage (V) 50 Temperature (°C) Temperature (°C) 4.95 4.94 VS=±5V IOUT=-5mA -4.93 -4.94 -4.95 -4.96 -4.97 4.93 -50 0 50 100 -50 150 0 50 Temperature (°C) Temperature (°C) 5 100 150 EL5421C EL5421C Quad 12MHz Rail-to-Rail Input-Output Buffer Quad 12MHz Rail-to-Rail Input-Output Buffer Voltage Gain vs Temperature Slew Rate vs Temperature 10.40 1.0005 VS=±5V Slew Rate (V/µ S) Voltage Gain (V/V) VS=±5V 1.0000 10.35 10.30 0.9995 10.25 -50 0 50 100 -50 150 50 0 Temperature (°C) 100 150 Temperature (°C) Supply Current per Channel vs Temperature Supply Current per Channel vs Supply Voltage 700 0.55 VS=±5V TA=25°C Supply Current (µ A) 600 0.5 500 400 0.45 -50 0 50 100 150 300 Temperature (°C) 5 0 20 15 10 Supply Voltage (V) Frequency Response for Various RL Frequency Response for Various CL 5 20 0 -5 Magnitude (Normalized) (dB) 10kΩ Magnitude (Normalized) (dB) Supply Current (mA) EL5421C EL5421C 1kΩ 560Ω CL=10pF VS=±5V 150Ω -10 10 RL=10kΩ VS=±5V 12pF 0 50pF -10 100pF -20 1000pF -15 100k 1M 10M -30 100k 100M Frequency (Hz) 1M 10M Frequency (Hz) 6 100M Output Impedance vs Frequency Maximum Output Swing vs Frequency 200 12 VS=±5V TA=25°C Maximum Output Swing (VP-P) Output Impedance (Ω) 160 120 80 40 10 8 VS=±5V TA=25°C RL=10kΩ CL=12pF Distortion <1% 6 4 2 0 10k 100k 1M 10M 0 10k Frequency (Hz) 100k 1M 10M Frequency (Hz) PSRR vs Frequency 80 600 PSRR+ Voltage Noise (nV√Hz) PSRR- 60 PSRR (dB) Input Voltage Noise Spectral Density vs Frequency 40 VS=± 5V 20 0 100 1k 10k 100k 1M 100 10 1 100 10M Frequency (Hz) 10k 100k 1M 10M 100M Frequency (Hz) Channel Separation vs Frequency Response Total Harmonic Distortion + Noise vs Frequency -60 0.010 Dual measured Channel A to B Quad measured Channel A to D or B to C Other combinations yield improved rejection. 0.009 0.008 -80 VS=±5V RL=10kΩ VIN=220mVRMS X-Talk (dB) 0.007 THD+ N (%) 1k 0.006 0.005 VS=±5V RL=10kΩ VIN=1VRMS 0.004 0.003 -100 -120 0.002 -140 0.001 1k 10k Frequency (Hz) 1k 100k 10k 100k Frequency (Hz) 7 1M 6M EL5421C EL5421C Quad 12MHz Rail-to-Rail Input-Output Buffer Quad 12MHz Rail-to-Rail Input-Output Buffer Small-Signal Overshoot vs Load Capacitance Settling Time vs Step Size 90 VS=±5V RL=10kΩ VIN=±50mV TA=25°C 4 VS=±5V RL=10kΩ CL=12pF TA=25°C 3 2 Step Size (V) 70 Overshoot (%) EL5421C EL5421C 50 30 0.1% 1 0 -1 -2 0.1% -3 10 -4 10 100 Load Capacitance (pF) 1000 0 200 400 600 Settling Time (nS) Small Signal Transient Response Large Signal Transient Response 1V 50mV 1µ S 200nS VS=±5V TA=25°C RL=10kΩ CL=12pF VS=±5V TA=25°C RL=10kΩ CL=12pF 8 800 Pin Description EL5421C Name 1 VOUTA Function Equivalent Circuit Buffer A Output VS+ VSGND Circuit 1 2 VINA Buffer A Input VS+ VSCircuit 2 3 VS+ Positive Power Supply 4 VINB Buffer B Input (Reference Circuit 1) 5 VOUTB Buffer B Output (Reference Circuit 2) 6 VOUTC Buffer C Output (Reference Circuit 2) 7 VINC Buffer C Input (Reference Circuit 1) 8 VS- 9 VIND 10 VOUTD Negative Power Supply Buffer D Input (Reference Circuit 2) Buffer D Output (Reference Circuit 1) 9 EL5421C EL5421C Quad 12MHz Rail-to-Rail Input-Output Buffer Quad 12MHz Rail-to-Rail Input-Output Buffer Applications Information Product Description Short Circuit Current Limit The EL5421C unity gain buffer is fabricated using a high voltage CMOS process. It exhibits Rail-to-Rail input and output capability, and has low power consumption (500µA per buffer). These features make the EL5421C ideal for a wide range of general-purpose applications. When driving a load of 10kΩ and 12pF, the EL5421C has a -3dB bandwidth of 12 MHz and exhibits 10V/µS slew rate. The EL5421C will limit the short circuit current to +/120mA if the output is directly shorted to the positive or the negative supply. If an output is shorted indefinitely, the power dissipation could easily increase such that the device may be damaged. Maximum reliability is maintained if the output continuous current never exceeds +/30 mA. This limit is set by the design of the internal metal interconnects. Operating Voltage, Input, and Output Output Phase Reversal The EL5421C is specified with a single nominal supply voltage from 5V to 15V or a split supply with its total range from 5V to 15V. Correct operation is guaranteed for a supply range of 4.5V to 16.5V. Most EL5421C specifications are stable over both the full supply range and operating temperatures of -40 °C to +85 °C. Parame t e r v a ri a t i o n s w i t h o p e ra ti n g v o l t a g e a n d / o r temperature are shown in the typical performance curves. The EL5421C is immune to phase reversal as long as the input voltage is limited from VS- - 0.5V to VS+ +0.5V. Figure 2 shows a photo of the output of the device with the input voltage driven beyond the supply rails. Although the device's output will not change phase, the input's overvoltage should be avoided. If an input voltage exceeds supply voltage by more than 0.6V, electrostatic protection diodes placed in the input stage of the device begin to conduct and overvoltage damage could occur. The output swings of the EL5421C typically extend to within 80mV of positive and negative supply rails with load currents of 5mA. Decreasing load currents will extend the output voltage range even closer to the supply rails. Figure 1 shows the input and output waveforms for the device. Operation is from +/-5V supply with a 10kΩ load connected to GND. The input is a 10Vp-p sinusoid. The output voltage is approximately 9.985 VP-P. 5V 1V 10µ S VS=±2.5V TA=25°C VIN=6VP-P 10µ S VS=±5V TA=25°C VIN=10VP-P Input 1V Figure 2. Operation with Beyond-the-Rails Input Output EL5421C EL5421C Power Dissipation 5V With the high-output drive capability of the EL5421C buffer, it is possible to exceed the 125°C 'absolute-maximum junction temperature' under certain load current conditions. Therefore, it is important to calculate the Figure 1. Operation with Rail-to-Rail Input and Output 10 maximum junction temperature for the application to determine if load conditions need to be modified for the buffer to remain in the safe operating area. equation, it is a simple matter to see if PDMAX exceeds the device’s power derating curves. To ensure proper operation, it is important to observe the recommended derating curves shown in Figure 3 and Figure 4. The maximum power dissipation allowed in a package is determined according to: MSOP10 Package Mounted on JEDEC JESD51-7 High Effective Thermal Conductivity Test Board T JMAX – T AMAX P DMAX = --------------------------------------------Θ JA 1200 MAX TJ=125°C 1000 Power Dissipation (mW) 870mW where: TJMAX = Maximum Junction Temperature TAMAX= Maximum Ambient Temperature θJA = Thermal Resistance of the Package 800 MS 600 OP 10 --- Θ JA = 11 5° C 400 /W 200 PDMAX = Maximum Power Dissipation in the Package 0 0 25 75 85 50 100 125 150 Ambient Temperature (°C) The maximum power dissipation actually produced by an IC is the total quiescent supply current times the total power supply voltage, plus the power in the IC due to the loads, or: Figure 3. Package Power Dissipation vs Ambient Temperature P DMAX = Σi [ V S × I SMA X + ( V S + – VOUT i ) × I LOAD i ] MSOP10 Package Mounted on JEDEC JESD51-3 Low Effective Thermal Conductivity Test Board when sourcing, and: 600 P DMA X = Σi [ V S × I SM AX + ( V OU T i – V S - ) × I LOAD i ] Power Dissipation (mW) 500 when sinking. Where: i = 1 to 4 for Quad VS = Total Supply Voltage MAX TJ=125°C 485mW 400 MS OP 10 -- 300 -Θ JA = 20 6° 200 C/ W 100 ISMAX = Maximum Supply Current Per Channel 0 0 VOUTi = Maximum Output Voltage of the Application 25 50 75 85 100 125 150 Ambient Temperature (°C) ILOADi = Load current Figure 4. Package Power Dissipation vs Ambient Temperature If we set the two PDMAX equations equal to each other, we can solve for RLOADi to avoid device overheat. Figure 3 and Figure 4 provide a convenient way to see if the device will overheat. The maximum safe power dissipation can be found graphically, based on the package type and the ambient temperature. By using the previous Unused Buffers It is recommended that any unused buffer have the input tied to the ground plane. 11 EL5421C EL5421C Quad 12MHz Rail-to-Rail Input-Output Buffer EL5421C EL5421C Quad 12MHz Rail-to-Rail Input-Output Buffer Driving Capacitive Loads Power Supply Bypassing and Printed Circuit Board Layout The EL5421C can drive a wide range of capacitive loads. As load capacitance increases, however, the -3dB bandwidth of the device will decrease and the peaking increase. The buffers drive 10pF loads in parallel with 10 kΩ with just 1.5dB of peaking, and 100pF with 6.4dB of peaking. If less peaking is desired in these applications, a small series resistor (usually between 5 Ω and 50 Ω) can be placed in series with the output. However, this will obviously reduce the gain slightly. Another method of reducing peaking is to add a "snubber" circuit at the output. A snubber is a shunt load consisting of a resistor in series with a capacitor. Values of 150Ω and 10nF are typical. The advantage of a snubber is that it does not draw any DC load current or reduce the gain The EL5421C can provide gain at high frequency. As with any high-frequency device, good printed circuit board layout is necessary for optimum performance. Ground plane construction is highly recommended, lead lengths should be as short as possible and the power supply pins must be well bypassed to reduce the risk of oscillation. For normal single supply operation, where the VS- pin is connected to ground, a 0.1 µF ceramic capacitor should be placed from VS+ to pin to VS- pin. A 4.7µF tantalum capacitor should then be connected in parallel, placed in the region of the buffer. One 4.7µF capacitor may be used for multiple devices. This same capacitor combination should be placed at each supply pin to ground if split supplies are to be used. 12 EL5421C EL5421C Quad 12MHz Rail-to-Rail Input-Output Buffer General Disclaimer Specifications contained in this data sheet are in effect as of the publication date shown. Elantec, Inc. reserves the right to make changes in the circuitry or specifications contained herein at any time without notice. Elantec, Inc. assumes no responsibility for the use of any circuits described herein and makes no representations that they are free from patent infringement. October 2, 2000 WARNING - Life Support Policy Elantec, Inc. products are not authorized for and should not be used within Life Support Systems without the specific written consent of Elantec, Inc. Life Support systems are equipment intended to support or sustain life and whose failure to perform when properly used in accordance with instructions provided can be reasonably expected to result in significant personal injury or death. Users contemplating application of Elantec, Inc. Products in Life Support Systems are requested to contact Elantec, Inc. factory headquarters to establish suitable terms & conditions for these applications. Elantec, Inc.’s warranty is limited to replacement of defective components and does not cover injury to persons or property or other consequential damages. Elantec Semiconductor, Inc. 675 Trade Zone Blvd. Milpitas, CA 95035 Telephone: (408) 945-1323 (888) ELANTEC Fax: (408) 945-9305 European Office: +44-118-977-6080 Japan Technical Center: +81-45-682-5820 13 Printed in U.S.A.