AD AD8512ARZ-REEL Precision, very low noise, low input bias current, wide bandwidth jfet operational amplifier Datasheet

Precision, Very Low Noise, Low Input Bias Current,
Wide Bandwidth JFET Operational Amplifiers
AD8510/AD8512/AD8513
PIN CONFIGURATIONS
Instrumentation
Multipole filters
Precision current measurement
Photodiode amplifiers
Sensors
Audio
OUT A
OUT B
+IN A
TOP VIEW
(Not to Scale)
–IN B
V–
+IN B
5
4
Figure 1. 8-Lead MSOP (RM Suffix)
AD8510
+IN
TOP VIEW
(Not to Scale)
AD8512
OUT B
+IN A
TOP VIEW
(Not to Scale)
–IN B
V–
NC
V+
–IN
AD8510
+IN
TOP VIEW
(Not to Scale)
OUT
NC
V–
Figure 3. 8-Lead MSOP (RM Suffix)
+IN B
Figure 2. 8-Lead SOIC (R Suffix)
NC
02729-D-003
NC
–IN
V+
–IN A
NC
V+
OUT
NC
Figure 4. 8-Lead SOIC (R Suffix)
1
14
OUT A 1
14
OUT D
OUT A
OUT D
–IN A 2
13
–IN D
–IN A
–IN D
+IN A 3
12
+IN D
+IN A
11 V–
TOP VIEW
+IN B 5 (Not to Scale) 10 +IN C
V+
AD8513
V+ 4
–IN B 6
9
–IN C
OUT B 7
8
OUT C
Figure 5. 14-Lead SOIC (R Suffix)
02729-D-002
AD8512
02729-D-004
V+
–IN A
V–
APPLICATIONS
8
1
+IN B
+IN D
AD8513
TOP VIEW
(Not to Scale)
–IN B
V–
+IN C
–IN C
OUT B
OUT C
7
8
02729-D-006
OUT A
02729-D-005
Fast settling time: 500 ns to 0.1%
Low offset voltage: 400 µV max
Low TCVOS: 1 µV/°C typ
Low input bias current: 25 pA typ
Dual-supply operation: ±5 V to ±15 V
Low noise: 8 nV/√Hz
Low distortion: 0.0005%
No phase reversal
Unity gain stable
02729-D-001
FEATURES
Figure 6. 14-Lead TSSOP (RU Suffix)
GENERAL DESCRIPTION
The AD8510, AD8512, AD8513 are single-, dual-, and quadprecision JFET amplifiers that feature low offset voltage, input
bias current, input voltage noise, and input current noise.
The combination of low offsets, low noise, and very low input
bias currents makes these amplifiers especially suitable for high
impedance sensor amplification and precise current measurements using shunts. The combination of dc precision, low noise,
and fast settling time results in superior accuracy in medical
instruments, electronic measurement, and automated test
equipment. Unlike many competitive amplifiers, the AD8510/
AD8512/AD8513 maintain their fast settling performance even
with substantial capacitive loads. Unlike many older JFET
amplifiers, the AD8510/AD8512/ AD8513 do not suffer from
output phase reversal when input voltages exceed the maximum
common-mode voltage range.
Fast slew rate and great stability with capacitive loads make the
AD8510/AD8512/AD8513 a perfect fit for high performance
filters. Low input bias currents, low offset, and low noise result
in a wide dynamic range of photodiode amplifier circuits. Low
noise and distortion, high output current, and excellent speed
make the AD8510/AD8512/AD8513 a great choice for audio
applications.
The AD8510/AD8512 are both available in 8-lead narrow SOIC
and 8-lead MSOP packages. MSOP packaged parts are only
available in tape and reel. The AD8513 is available in 14-lead
SOIC and TSSOP packages.
The AD8510/AD8512/AD8513 are specified over the –40°C to
+125°C extended industrial temperature range.
Rev. E
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.326.8703
© 2004 Analog Devices, Inc. All rights reserved.
AD8510/AD8512/AD8513
TABLE OF CONTENTS
Specifications............................................................................................3
Total Noise Including Source Resistors................................... 13
Electrical Characteristics ............................................................. 4
Settling Time............................................................................... 14
Absolute Maximum Ratings ..................................................................6
Overload Recovery Time .......................................................... 14
ESD Caution.................................................................................. 6
Capacitive Load Drive ............................................................... 14
Typical Performance Characteristics ....................................................7
Open-Loop Gain and Phase Response.................................... 15
General Application Information........................................................13
Precision Rectifiers..................................................................... 16
Input Overvoltage Protection ................................................... 13
I-V Conversion Applications .................................................... 17
Output Phase Reversal............................................................... 13
Outline Dimensions ..............................................................................19
THD + Noise............................................................................... 13
Ordering Guide .......................................................................... 20
REVISION HISTORY
6/04—Data Sheet Changed from Rev. D to Rev. E
Changes to Format .............................................................Universal
Changes to Specifications ................................................................ 3
Updated Outline Dimensions ....................................................... 19
10/03—Data Sheet Changed from Rev. C to Rev. D
Added AD8513 Model ......................................................Universal
Changes to Specifications ................................................................ 3
Added Figures 36 through 40........................................................ 10
Added new Figures 55 and 57....................................................... 17
Changes to Ordering Guide .......................................................... 20
9/03—Data Sheet Changed from Rev. B to Rev. C
Changes to Ordering Guide ........................................................... 4
Updated Figure 2 ............................................................................ 10
Changes to Input Overvoltage Protection section .................... 10
Changes to Figures 10 and 11 ....................................................... 12
Changes to Photodiode Circuits section ..................................... 13
Changes to Figures 13 and 14 ....................................................... 13
Deleted Precision Current Monitoring section .......................... 14
Updated Outline Dimensions ...................................................... 15
3/03—Data Sheet Changed from Rev. A to Rev. B
Updated Figure 5 ............................................................................ 11
Updated Outline Dimensions....................................................... 15
8/02—Data Sheet Changed from Rev. 0 to Rev. A
Added AD8510 Model .......................................................Universal
Added Pin Configurations ...............................................................1
Changes to Specifications.................................................................2
Changes to Ordering Guide .............................................................4
Changes to TPCs 2 and 3..................................................................5
Added new TPCs 10 and 12.............................................................6
Replaced TPC 20 ...............................................................................8
Replaced TPC 27 ...............................................................................9
Changes to General Application Information Section .............. 10
Changes to Figure 5........................................................................ 11
Changes to I-V Conversion Applications Section...................... 13
Changes to Figures 13 and 14 ....................................................... 13
Changes to Figure 17...................................................................... 14
Rev. E | Page 2 of 20
AD8510/AD8512/AD8513
SPECIFICATIONS
@ VS = ±5 V, VCM = 0 V, TA = 25°C, unless otherwise noted.
Table 1.
Parameter
INPUT CHARACTERISTICS
Offset Voltage (B Grade)1
Symbol
Conditions
Min
VOS
Typ
Max
Unit
0.08
0.4
0.8
0.9
1.8
75
0.7
7.5
50
0.3
0.5
mV
mV
mV
mV
pA
nA
nA
pA
nA
nA
−40°C < TA < +125°C
Offset Voltage (A Grade)
VOS
0.1
−40°C < TA < +125°C
Input Bias Current
IB
21
−40°C < TA < +85°C
−40°C < TA < +125°C
Input Offset Current
IOS
5
−40°C < TA < +85°C
−40°C < TA < +125°C
Input Capacitance
Differential
Common-Mode
Input Voltage Range
Common-Mode Rejection Ratio
Large Signal Voltage Gain
Offset Voltage Drift (B Grade)1
Offset Voltage Drift (A Grade)
OUTPUT CHARACTERISTICS
Output Voltage High
Output Voltage Low
Output Voltage High
Output Voltage Low
Output Voltage High
Output Voltage Low
Output Current
POWER SUPPLY
Power Supply Rejection Ratio
Supply Current/Amplifier
AD8510/AD8512/AD8513
AD8510/AD8512
AD8513
DYNAMIC PERFORMANCE
Slew Rate
Gain Bandwidth Product
Settling Time
THD + Noise
Phase Margin
NOISE PERFORMANCE
Voltage Noise Density
Peak-to-Peak Voltage Noise
1
12.5
11.5
CMRR
AVO
∆VOS/∆T
∆VOS/∆T
VCM = −2.0 V to +2.5 V
RL = 2 kΩ, VO = −3 V to +3 V
VOH
VOL
VOH
VOL
VOH
VOL
IOUT
RL = 10 kΩ
−40°C < TA < +125°C
RL = 2 kΩ,
−40°C < TA < +125°C
RL = 600 Ω
−40°C < TA < +125°C
PSRR
ISY
VS = ±4.5 V to ±18 V
SR
GBP
tS
THD + N
ΦO
en
en p-p
−2.0
86
65
+4.1
+2.5
100
107
0.9
1.7
± 40
+4.3
−4.9
+ 4.2
−4.9
+4.1
−4.8
± 54
86
130
+3.9
+3.7
5
12
−4.7
−4.5
−4.2
pF
pF
V
dB
V/mV
µV/°C
µV/°C
V
V
V
V
V
V
mA
dB
VO = 0 V
−40°C < TA < +125°C
−40°C < TA < +125°C
2.0
RL = 2 kΩ
20
8
0.4
0.0005
44.5
V/µs
MHz
µs
%
Degrees
34
12
8.0
7.6
2.4
nV/√Hz
nV/√Hz
nV/√Hz
nV/√Hz
µV p-p
To 0.1%, 0 V to 4 V Step, G = +1
1 kHz, G = +1, RL = 2 kΩ
f = 10 Hz
f = 100 Hz
f = 1 kHz
f = 10 kHz
0.1 Hz to 10 Hz Bandwidth
AD8510/AD8512 only.
Rev. E | Page 3 of 20
2.3
2.5
2.75
10
5.2
mA
mA
mA
AD8510/AD8512/AD8513
ELECTRICAL CHARACTERISTICS
@ VS = ±15 V, VCM = 0 V, TA = 25°C, unless otherwise noted.
Table 2.
Parameter
INPUT CHARACTERISTICS
Offset Voltage (B Grade)1
Symbol
Conditions
Min
VOS
Typ
Max
Unit
0.08
0.4
0.8
mV
mV
0.1
1.0
1.8
80
0.7
10
75
0.3
0.5
mV
mV
pA
nA
nA
pA
nA
nA
+13.0
pF
pF
V
dB
V/mV
5
12
µV/°C
µV/°C
−40°C < TA < +125°C
Offset Voltage (A Grade)
VOS
−40°C < TA < +125°C
Input Bias Current
IB
25
−40°C < TA < +85°C
−40°C < TA < +125°C
Input Offset Current
IOS
6
−40°C < TA < +85°C
−40°C < TA < +125°C
Input Capacitance
Differential
Common-Mode
Input Voltage Range
Common-Mode Rejection Ratio
Large Signal Voltage Gain
Offset Voltage Drift (B Grade)1
Offset Voltage Drift (A Grade)
OUTPUT CHARACTERISTICS
Output Voltage High
Output Voltage Low
Output Voltage High
Output Voltage Low
Output Voltage High
Output Voltage Low
Output Current
POWER SUPPLY
Power Supply Rejection Ratio
Supply Current/Amplifier
AD8510/AD8512/AD8513
AD8510/AD8512
AD8513
DYNAMIC PERFORMANCE
Slew Rate
Gain Bandwidth Product
Settling Time
THD + Noise
Phase Margin
12.5
11.5
CMRR
AVO
VCM = −12.5 V to +12.5 V
VO = −13.5 V to +13.5 V
RL = 2 kΩ, VCM = 0 V
−13.5
86
115
∆VOS/∆T
∆VOS/∆T
VOH
VOL
VOH
VOL
VOH
VOL
1.0
1.7
RL = 10 kΩ
−40°C < TA < +125°C
RL = 2 kΩ
−40°C < TA < +125°C
RL = 600 Ω, TA = 25°C
−40°C < TA < +125°C
RL = 600 Ω, TA = 25°C
−40°C < TA < +125°C
+14.0
+13.8
+13.5
11.4
SR
GBP
tS
THD + N
ΦO
+14.2
−14.9
+14.1
–14.8
+13.9
−14.3
IOUT
PSRR
ISY
108
196
−14.6
−14.5
−13.8
−12.1
±70
VS = ±4.5 V to ±18 V
86
dB
VO = 0 V
−40°C < TA < +125°C
−40°C < TA < +125°C
2.2
RL = 2 kΩ
20
8
0.5
0.9
0.0005
52
To 0.1%, 0 V to 10 V Step, G = +1
To 0.01%, 0 V to 10 V Step, G = +1
1 kHz, G = +1, RL = 2 kΩ
Rev. E | Page 4 of 20
V
V
V
V
V
V
V
V
mA
2.5
2.6
3.0
mA
mA
mA
V/µs
MHz
µs
µs
%
Degrees
AD8510/AD8512/AD8513
Parameter
NOISE PERFORMANCE
Voltage Noise Density
Peak-to-Peak Voltage Noise
1
Symbol
Conditions
en
f = 10 Hz
f = 100 Hz
f = 1 kHz
f = 10 kHz
0.1 Hz to 10 Hz Bandwidth
en p-p
AD8510/AD8512 only.
Rev. E | Page 5 of 20
Min
Typ
34
12
8.0
7.6
2.4
Max
Unit
10
nV/√Hz
nV/√Hz
nV/√Hz
nV/√Hz
µV p-p
5.2
AD8510/AD8512/AD8513
ABSOLUTE MAXIMUM RATINGS
Table 3. AD8510/AD8512/AD8513 Stress Ratings1
Table 4. Thermal Resistance
Parameter
Supply Voltage
Input Voltage
Output Short-Circuit Duration to GND
Rating
±18 V
±VS
Observe Derating
Curves
Package Type
8-Lead MSOP (RM)
8-Lead SOIC (R)
14-Lead SOIC (R)
14-Lead TSSOP (RU)
−65°C to +150°C
−40°C to +125°C
1
Storage Temperature Range
R, RM Packages
Operating Temperature Range
Junction Temperature Range
R, RM Packages
Lead Temperature Range
(Soldering, 10 sec)
Electrostatic Discharge (HBM)
−65°C to +150°C
300°C
2000 V
θJA2
210
158
120
180
θJC
45
43
36
35
Unit
°C/W
°C/W
°C/W
°C/W
Stresses above those listed under Absolute Maximum Ratings may cause
permanent damage to the device. This is a stress rating only; functional
operation of the device at these or any other conditions above those listed in
the operational sections of this specification is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device
reliability.
2
θJA is specified for worst-case conditions, i.e., θJA is specified for device
soldered in circuit board for surface-mount packages.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
this product features proprietary ESD protection circuitry, permanent damage may occur on devices
subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.
Rev. E | Page 6 of 20
AD8510/AD8512/AD8513
TYPICAL PERFORMANCE CHARACTERISTICS
120
100k
VSY = ±5V, ±15V
VSY = ±15V
TA = 25°C
10k
INPUT BIAS CURRENT (pA)
80
60
40
1k
100
10
02729-D-007
20
0
–0.5 –0.4 –0.3 –0.2 –0.1
0
0.1
0.2
0.3
0.4
1
–40
0.5
02729-D-010
NUMBER OF AMPLIFIERS
100
–25 –10
5
INPUT OFFSET VOLTAGE (mV)
20
35
50
65
TEMPERATURE (°C)
80
95
110 125
Figure 10. Input Bias Current vs. Temperature
Figure 7. Input Offset Voltage Distribution
1000
30
VSY = ±15V
B GRADE
INPUT OFFSET CURRENT (pA)
20
15
10
±15V
10
±5V
1
02729-D-008
5
100
0
0
1
2
3
TCVOS (µV/°C)
4
5
0.1
–40
6
Figure 8. AD8510/AD8512 TCVOS Distribution
–25 –10
5
20
35
50
65
TEMPERATURE (°C)
80
95
110 125
Figure 11. Input Offset Current vs. Temperature
30
40
VSY = ±15V
A GRADE
TA = 25°C
35
20
15
10
02729-D-009
5
0
0
1
2
3
TCVOS (µV/°C)
4
5
30
25
20
15
10
02729-D-012
INPUT BIAS CURRENT (pA)
25
NUMBER OF AMPLIFIERS
02729-D-011
NUMBER OF AMPLIFIERS
25
5
0
6
Figure 9. AD8510/AD8512 TCVOS Distribution
8
13
18
23
SUPPLY VOLTAGE (V+ – V– )
Figure 12. Input Bias Current vs. Supply Voltage
Rev. E | Page 7 of 20
28
30
AD8510/AD8512/AD8513
2.8
TA = 25°C
TA = 25°C
1.9
2.6
1.8
SUPPLY CURRENT (mA)
2.4
1.7
1.6
1.5
1.4
1.3
2.2
2.0
1.8
1.6
1.0
8
13
18
23
SUPPLY VOLTAGE (V+ – V–)
28
1.2
1.0
30
18
23
SUPPLY VOLTAGE (V+ – V–)
28
33
Figure 16. AD8510 Supply Current vs. Supply Voltage
Figure 13. AD8512 Supply Current per Amplifier vs. Supply Voltage
70
16
VOL
VSY = ±15V
315
VSY = ±15V
RL = 2.5kΩ
CSCOPE = 20pF
φM = 52 DEGREES
60
14
VOH
50
12
GAIN (dB)
10
8
6
VOL
270
225
40
180
30
135
20
90
10
45
VSY = ±5V
0
0
02729-D-014
VOH
2
0
10
20
30
40
50
LOAD CURRENT (mA)
60
70
–45
–20
–90
–30
10k
80
Figure 14. AD8510/AD8512 Output Voltage vs. Load Current
–135
50M
10M
Figure 17. Open-Loop Gain and Phase vs. Frequency
2.50
SUPPLY CURRENT AMPLIFIER (mA)
2.50
2.25
2.00
±15V
1.75
±5V
1.50
02729-D-015
1.25
1.00
–40 –25
1M
FREQUENCY (Hz)
100k
–10
5
20
65
35 50
TEMPERATURE (°C)
80
95
±15V
2.25
±5V
2.00
1.75
1.50
1.25
1.00
–40 –25
110 125
Figure 15. AD8512 Supply Current per Amplifier vs. Temperature
02729-D-018
0
–10
–10
5
20
65
35 50
TEMPERATURE (°C)
80
95
110 125
Figure 18. AD8510 Supply Current vs. Temperature
Rev. E | Page 8 of 20
02729-D-017
4
SUPPLY CURRENT AMPLIFIER (mA)
OUTPUT VOLTAGE (V)
13
8
PHASE (Degrees)
1.1
02729-D-016
1.4
1.2
02729-D-013
SUPPLY CURRENT PER AMPLIFIER (mA)
2.0
AD8510/AD8512/AD8513
300
70
VSY = ±15V, ±5V
60
240
40
AV = 100
30
20
AV = 10
10
0
AV = 1
210
180
150
AV = 1
120
AV = 100
90
60
02729-D-019
–10
–20
10k
100k
1M
FREQUENCY (Hz)
10M
AV = 10
30
0
100
50M
120
10k
1M
100k
FREQUENCY (Hz)
10M
100M
32
VSY = ±5V TO ±15V
VSY = ±15V
28
80
60
40
02729-D-020
20
1k
100k
1M
10k
FREQUENCY (Hz)
10M
24
20
16
12
8
02729-D-023
VOLTAGE NOISE DENSITY (nV Hz)
100
CMRR (dB)
1k
Figure 22. Output Impedance vs. Frequency
Figure 19. Closed-Loop Gain vs. Frequency
0
100
02729-D-022
OUTPUT IMPEDANCE (Ω)
CLOSED-LOOP GAIN (dB)
50
–30
1k
VSY = ±15V
VIN = 50mV
270
4
0
100M
0
2.5
5.0
7.5
10.0
12.5
15.0 17.5
20.0
22.5
25.0
FREQUENCY (kHz)
Figure 20. CMRR vs. Frequency
Figure 23. Voltage Noise Density
120
VSY = ±15V
VSY = ±5V, ±15V
100
VOLTAGE (1µV/DIV)
80
40
+PSRR
0
–20
100
02729-D-024
20
02729-D-021
PSRR (dB)
–PSRR
60
1k
10k
100k
1M
FREQUENCY (Hz)
10M
100M
TIME (1s/DIV)
Figure 24. 0.1 Hz to 10 Hz Input Voltage Noise
Figure 21. PSRR vs. Frequency
Rev. E | Page 9 of 20
AD8510/AD8512/AD8513
90
280
VSY = ±5V TO ±15V
70
210
60
OVERSHOOT (%)
175
140
105
50
+OS
40
–OS
30
70
35
0
20
30
40
50
60
70
80
90
0
100
10
1
FREQUENCY (Hz)
100
CAPACITANCE (pF)
10k
1k
Figure 28. Small Signal Overshoot vs. Load Capacitance
Figure 25. Voltage Noise Density vs. Frequency
50
315
VSY = ±5V
RL = 2.5kΩ
270
CSCOPE = 20pF
φM = 44.5 DEGREES 225
40
180
70
VSY = ±15V
RL = 2kΩ
CL = 100pF
AV = 1
GAIN (dB)
VOLTAGE (5V/DIV)
60
30
135
20
90
10
45
0
0
–10
02729-D-026
PHASE (Degrees)
10
10
–45
–20
–90
–30
10k
100k
TIME (1µs/DIV)
1M
–135
50M
10M
FREQUENCY (Hz)
Figure 26. Large Signal Transient Response
Figure 29. Open-Loop Gain and Phase vs. Frequency
120
VSY = ±15V
RL = 2kΩ
CL = 100pF
AV = 1
VSY = ±5V
VOLTAGE (50mV/DIV)
100
CMRR (dB)
80
60
02729-D-027
40
0
100
TIME (100ns/DIV)
02729-D-030
20
1k
100k
1M
10k
FREQUENCY (Hz)
Figure 27. Small Signal Transient Response
Figure 30. CMRR vs. Frequency
Rev. E | Page 10 of 20
10M
100M
02729-D-029
0
02729-D-028
20
02729-D-025
VOLTAGE NOISE DENSITY (nV Hz)
VSY = ±15V
RL = 2kΩ
80
245
AD8510/AD8512/AD8513
300
VSY = ±5V
VIN = 50mV
270
VSY = ±5V
RL = 2kΩ
CL = 100pF
AV = 1
210
AV = 1
VOLTAGE (50mV/DIV)
OUTPUT IMPEDANCE (Ω)
240
180
150
120
AV = 100
90
60
0
100
1k
10k
100k
1M
FREQUENCY (Hz)
10M
02729-D-034
02729-D-031
AV = 10
30
100M
TIME (100ns/DIV)
Figure 31. Output Impedance vs. Frequency
Figure 34. Small Signal Transient Response
100
VSY = ±5V
VSY = ±5V
RL = 2kΩ
90
OVERSHOOT (%)
VOLTAGE (1µV/DIV)
80
70
60
+OS
50
–OS
40
30
02729-D-035
02729-D-032
20
10
0
TIME (1s/DIV)
Figure 32. 0.1 Hz to 10 Hz Input Voltage Noise
10
1
100
CAPACITANCE (pF)
10k
1k
Figure 35. Small Signal Overshoot vs. Load Capacitance
100
VSY = ±5V
RL = 2kΩ
CL = 100pF
AV = 1
VS = ±15V
90
VOLTAGE (2V/DIV)
Number of Amplifiers
80
70
60
50
40
30
02729-D-036
02729-D-033
20
10
0
TIME (1µs/DIV)
0
1
2
3
4
TCVOS (µV/°C)
Figure 33. Large Signal Transient Response
Figure 36. AD8513 TCVOS Distribution
Rev. E | Page 11 of 20
5
6
AD8510/AD8512/AD8513
120
16
VS = ±5V
VSY = ±15V
VOL
14
VOH
OUTPUT VOLTAGE (V)
Number of Amplifiers
100
80
60
40
12
10
8
6
0
0
1
3
2
4
5
VOH
02729-D-039
02729-D-037
20
2
0
0
6
10
20
TCVOS (µV/°C)
30
50
40
60
70
80
LOAD CURRENT (mA)
Figure 39. AD8513 Output Voltage vs. Load Current
Figure 37. AD8513 TCVOS Distribution
3.0
2.5
2.2
2.1
2.0
1.9
1.8
02729-D-038
1.7
1.6
1.5
8
13
18
23
28
2.5
±15V
2.0
±5V
1.5
1.0
0.5
0
–40
33
SUPPLY VOLTAGE (V+ – V–)
02729-D-040
2.3
SUPPLY CURRENT PER AMPLIFIER (mA)
TA = 25°C
2.4
SUPPLY CURRENT (mA)
VSY = ±5V
VOL
4
–25
–10
5
20
35
50
65
80
95
110
TEMPERATURE (°C)
Figure 40. AD8513 Supply Current vs. Temperature
Figure 38. AD8513 Supply Current vs. Supply Voltage
Rev. E | Page 12 of 20
125
AD8510/AD8512/AD8513
GENERAL APPLICATION INFORMATION
0.01
INPUT OVERVOLTAGE PROTECTION
VSY = ±5V
RL = 100kΩ
BW = 22kHz
RS
0.001
≤ 5mA
With a very low offset current of <0.5 nA up to 125°C, higher
resistor values can be used in series with the inputs. A 5 kΩ
resistor will protect the inputs to voltages as high as 25 V
beyond the supplies and will add less than 10 µV to the offset.
0.0001
20
02729-D-056
V IN − VS
DISTORTION (%)
The AD8510/AD8512/AD8513 have internal protective
circuitry that allows voltages as high as 0.7 V beyond the
supplies to be applied at the input of either terminal without
causing damage. For higher input voltages, a series resistor is
necessary to limit the input current. The resistor value can be
determined from the formula
100
1k
FREQUENCY (Hz)
20k
Figure 42. THD + N vs. Frequency
OUTPUT PHASE REVERSAL
TOTAL NOISE INCLUDING SOURCE RESISTORS
Phase reversal is a change of polarity in the transfer function of
the amplifier. This can occur when the voltage applied at the
input of an amplifier exceeds the maximum common-mode
voltage.
The low input current noise and input bias current of the
AD8510/AD8512/AD8513 make them the ideal amplifiers for
circuits with substantial input source resistance. Input offset
voltage increases by less than 15 nV per 500 Ω of source
resistance at room temperature. The total noise density of the
circuit is
Phase reversal can cause permanent damage to the device and
may result in system lockups. The AD8510/AD8512/AD8513 do
not exhibit phase reversal when input voltages are beyond the
supplies.
where:
en is the input voltage noise density of the parts.
in is the input current noise density of the parts.
RS is the source resistance at the noninverting terminal.
k is Boltzman’s constant (1.38 × 10–23 J/K).
T is the ambient temperature in Kelvin (T = 273 + °C).
For RS < 3.9 kΩ, en dominates and enTOTAL ≈ en.
VSY = ±5V
AV = 1
RL = 10kΩ
VOUT
VIN
The current noise of the AD8510/AD8512/AD8513 is so low
that its total density does not become a significant term unless
RS is greater than 165 MΩ, an impractical value for most
applications.
02729-D-057
VOLTAGE (2V/DIV)
e nTOTAL = e n 2 + (i n R S )2 + 4kTR S
The total equivalent rms noise over a specific bandwidth is
expressed as
TIME (20µs/DIV)
Figure 41. No Phase Reversal
enTOTAL = enTOTAL BW
THD + NOISE
The AD8510/AD8512/AD8513 have low total harmonic distortion and excellent gain linearity, making these amplifiers a great
choice for precision circuits with high closed-loop gain, and for
audio application circuits. Figure 42 shows that the AD8510/
AD8512/AD8513 have approximately 0.0005% of total distortion when configured in positive unity gain (the worst case) and
driving a 100 kΩ load.
where BW is the bandwidth in Hertz.
Note that the above analysis is valid for frequencies larger than
150 Hz and assumes flat noise above 10 kHz. For lower frequencies, flicker noise (1/f) must be considered.
Rev. E | Page 13 of 20
AD8510/AD8512/AD8513
SETTLING TIME
VSY = ±15V
AV = –100
RL = 10kΩ
OUTPUT
+15V
0V
VOLTAGE
INPUT
Settling time is the time it takes the output of the amplifier to
reach and remain within a percentage of its final value after a
pulse has been applied at the input. The AD8510/AD8512/
AD8513 settle to within 0.01% in less than 900 ns with a step of
0 V to 10 V in unity gain. This makes the each of the parts an
excellent choice as a buffer at the output of DACs whose settling
time is typically less than 1 µs.
0V
–200mV
Overload recovery, also known as overdrive recovery, is the time
it takes the output of an amplifier to recover from a saturated
condition to its linear region. This recovery time is particularly
important in applications where the amplifier must amplify
small signals in the presence of large transient voltages.
CAPACITIVE LOAD DRIVE
The AD8510/AD8512/AD8513 are unconditionally stable at all
gains in inverting and noninverting configurations. They are
capable of driving up to 1000 pF of capacitive loads without
oscillation in unity gain, the worst-case configuration.
However, as with most amplifiers, driving larger capacitive loads
in a unity gain configuration may cause excessive overshoot and
ringing or even oscillation. A simple snubber network reduces
the amount of overshoot and ringing significantly. The advantage of this configuration is that the output swing of the amplifier is not reduced, because RS is outside the feedback loop.
Figure 43 shows the positive overload recovery of the
AD8510/AD8512/AD8513. The output recovers in
approximately 200 ns from a saturated condition.
OUTPUT
TIME (2µs/DIV)
Figure 44. Negative Overload Recovery
OVERLOAD RECOVERY TIME
0V
02729-D-054
In addition to their fast settling time and fast slew rate, the
AD8510/AD8512/AD8513’s low offset voltage drift and input
offset current maintain full accuracy of 12-bit converters over
the entire operating temperature range.
VSY = ±15V
VIN = 200mV
AV = –100
RL = 10k Ω
V+
VOLTAGE
–15V
AD8510
0V
6
VOUT
4
RS
CS
V–
TIME (2µs/DIV)
CL
02729-D-055
200mV
02729-D-053
INPUT
7
200mV
Figure 45. Snubber Network Configuration
Figure 43. Positive Overload Recovery
The negative overdrive recovery time shown in Figure 44 is less
than 200 ns.
Figure 46 shows a scope photograph of the output of the
AD8510/AD8512/AD8513 in response to a 400 mV pulse. The
circuit is configured in positive unity gain (worst-case) with a
load experience of 500 pF.
In addition to the fast recovery time, the AD8510/AD8512/
AD8513 show excellent symmetry of the positive and negative
recovery times. This is an important feature for transient signal
rectification, because the output signal is kept equally undistorted throughout any given period.
Rev. E | Page 14 of 20
AD8510/AD8512/AD8513
OPEN-LOOP GAIN AND PHASE RESPONSE
VSY = ±15V
CL = 500pF
RL =10kΩ
VOLTAGE (200mV/DIV)
In addition to their impressive low noise, low offset voltage, and
offset current, the AD8510/AD8512/AD8513 have excellent
loop gain and phase response even when driving large resistive
and capacitive loads. They were compared to the OPA2132
under the same conditions. With a 2.5 kΩ load at the output, the
AD8510/AD8512/AD8513 have more than 8 MHz of bandwidth and a phase margin of more than 52°.
Figure 46. Capacitive Load Drive without Snubber
315
VSY = ±15V
RL = 2.5kΩ
CL = 0
60
GAIN (dB)
VSY = ±15V
RL =10kΩ
CL = 500pF
RS =100Ω
CS =1nF
70
270
50
225
40
190
30
135
20
90
10
45
0
0
–10
–45
–20
–90
–30
10k
02729-D-042
VOLTAGE (200mV/DIV)
When the snubber circuit is used, the overshoot is reduced from
55% to less than 3% with the same load capacitance. Ringing is
virtually eliminated, as shown in Figure 47.
PHASE (Degrees)
TIME (1µs/DIV)
100k
1M
FREQUENCY (Hz)
10M
–135
50M
02729-D-043
02729-D-041
The OPA2132, on the other hand, has only 4.5 MHz of bandwidth and 28° of phase margin under the same test conditions.
Even with a 1 nF capacitive load in parallel with the 2 kΩ load
at the output, the AD8510/AD8512/AD8513 show much better
response than the OPA2132, whose phase margin is degraded to
less than 0, indicating oscillation.
Figure 48. Frequency Response of the AD8510/AD8512/AD8513
TIME (1µs/DIV)
70
RS (Ω)
100
70
60
CS
1 nF
100 pF
300 pF
50
225
40
190
30
135
20
90
10
45
0
0
–10
–45
–20
–90
–30
10k
100k
1M
FREQUENCY (Hz)
10M
Figure 49. Frequency Response of the OPA2132
Rev. E | Page 15 of 20
PHASE (Degrees)
Table 5. Optimum Values for Capacitive Loads
270
–135
50M
02729-D-044
Optimum values for RS and CS depend on the load capacitance
and input stray capacitance and are determined empirically.
Table 5 shows a few values that can be used as starting points.
GAIN (dB)
Figure 47. Capacitive Load with Snubber Network
CLOAD
500 pF
2 nF
5 nF
315
VSY = ±15V
RL = 2.5kΩ
CL = 0
60
AD8510/AD8512/AD8513
PRECISION RECTIFIERS
VOLTAGE (1V/DIV)
Rectifying circuits are used in a multitude of applications. One
of the most popular uses is in the design of regulated power
supplies, where a rectifier circuit is used to convert an input
sinusoid to a unipolar output voltage. There are some potential
problems for amplifiers used in this manner.
02729-D-046
When the input voltage (VIN) is negative, the output is zero. The
magnitude of VIN is doubled at the inputs of the op amp. This
voltage can exceed the power supply voltage, which would damage some amplifiers permanently. The op amp must come out of
saturation when VIN is negative. This delays the output signal
because the amplifier requires time to enter its linear region.
TIME (1ms/DIV)
The AD8510/AD8512/AD8513 have a very fast overdrive
recovery time, which makes them great choices for the
rectification of transient signals. The symmetry of the positive
and negative recovery times is also important in keeping the
output signal undistorted.
Figure 51. Half-Wave Rectifier Signal (Out A)
02729-D-047
R2
10kΩ
VOLTAGE (1V/DIV)
Figure 50 shows the test circuit of the rectifier. The first stage of
the circuit is a half-wave rectifier. When the sine wave applied at
the input is positive, the output follows the input response.
During the negative cycle of the input, the output tries to swing
negative to follow the input, but the power supply restrains it to
zero. In a similar fashion, the second stage is a follower during
the positive cycle of the sine wave and an inverter during the
negative cycle.
R3
10kΩ
TIME (1ms/DIV)
Figure 52. Full-Wave Rectifier Signal (Out B)
5V
6
3
R1
1kΩ
1/2
AD8512
2
4
2/2
AD8512
8
1
8
5
7
OUT B
(HALF WAVE)
4
5V
OUT A
(HALF WAVE)
02729-D-045
VIN
3V p-p
Figure 50. Half-Wave and Full-Wave Rectifier
Rev. E | Page 16 of 20
AD8510/AD8512/AD8513
I-V CONVERSION APPLICATIONS
Photodiode Circuits
Common applications for I-V conversion include photodiode
circuits, where the amplifier is used to convert a current emitted
by a diode placed at the positive input terminal into an output
voltage.
The AD8510/AD8512/AD8513’s low input bias current, wide
bandwidth, and low noise make them each an excellent choice
for various photodiode applications, including fax machines,
fiber optic controls, motion sensors, and bar code readers.
The circuit shown in Figure 53 uses a silicon diode with zero
bias voltage. This is known as a Photovoltaic Mode; this
configuration limits the overall noise and is suitable for
instrumentation applications.
Cf
includes external parasitic capacitance. Ct creates a pole in the
frequency response, which may lead to an unstable system. To
ensure stability and optimize the bandwidth of the signal, a
capacitor is placed in the feedback loop of the circuit shown in
Figure 53. It creates a zero and yields a bandwidth whose corner
frequency is 1/(2π(R2Cf)).
The value of R2 can be determined by the ratio V/ID, where V is
the desired output voltage of the op amp and ID is the diode
current. For example, if ID is 100 µA and a 10 V output voltage is
desired, R2 should be 100 kΩ. Rd is a junction resistance that
drops typically by a factor of 2 for every 10°C increase in
temperature. A typical value for Rd is 1000 MΩ. Since Rd >> R2,
the circuit behavior is not impacted by the effect of the junction
resistance. The maximum signal bandwidth is
f MAX =
R2
ft
2πR2Ct
VEE
where ft is the unity gain frequency of the amplifier.
2
AD8510
Ct
6
3
7
VCC
Cf =
02729-D-048
Rd
Using the parameters above, Cf ≈ 1 pF, which yields a signal
bandwidth of about 2.6 MHz.
4
Ct
2πR2 ft
where ft is the unity gain frequency of the op amp, achieves a
phase margin, Φm, of approximately 45°.
Figure 53. Equivalent Preamplifier Photodiode Circuit
A larger signal bandwidth can be attained at the expense of
additional output noise. The total input capacitance (Ct)
consists of the sum of the diode capacitance (typically 3 pF to
4 pF) and the amplifier’s input capacitance (12 pF), which
A higher phase margin can be obtained by increasing the value
of Cf. Setting Cf to twice the previous value yields approximately
Φm = 65° and a maximally flat frequency response, but reduces
the maximum signal bandwidth by 50%.
Rev. E | Page 17 of 20
AD8510/AD8512/AD8513
Signal Transmission Applications
VOLTAGE (5V/DIV)
One popular signal transmission method uses pulse-width
modulation. High data rates may require a fast comparator
rather than an op amp. However, the need for sharp and
undistorted signals may favor using a linear amplifier.
02729-D-050
The AD8510/AD8512/AD8513 make excellent voltage
comparators. In addition to a high slew rate, the AD8510/
AD8512/AD8513 have a very fast saturation recovery time. In
the absence of feedback, the amplifiers are in open-loop mode
(very high gain). In this mode of operation, they spend much of
their time in saturation.
TIME (2ms/DIV)
The circuit in Figure 54 compares two signals of different
frequencies, namely a 100 Hz sine wave and a 1 kHz triangular
wave. Figure 56 shows a scope photograph of the output waveform. A pull-up resistor (typically 5 kΩ) may be connected from
the output to VCC if the output voltage needs to reach the positive rail. The trade-off is that power consumption will be higher.
+15V
3
7
6
Figure 56. Pulse-Width Modulation
Crosstalk
Crosstalk, also known as channel separation, is a measure of
signal feedthrough from one channel to the other on the same
IC. The AD8512/AD8513 have a channel separation better than
−90 dB for frequencies up to 10 kHz, and better than −50 dB for
frequencies up to 10 MHz. Figure 57 shows the typical channel
separation behavior between amplifier A (driving amplifier),
with respect to amplifiers B, C, and D.
VOUT
0
2
4
V1
V2
CHANNEL SEPARATION (dB)
02729-D-049
–20
–15V
Figure 54. Pulse-Width Modulator
VOUT
2.2kΩ
20kΩ
–40
CH-B
–60
CH-C
–80
–100
–120
CH-D
02729-D-051
+VS
–140
6
8
1
18V p-p
7
3
VIN
CROSSTALK = 20 LOG
–160
100
5
5kΩ
VOUT
10VIN
5kΩ
4
–VS
1k
10k
100k
FREQUENCY (Hz)
02729-D-052
2
Figure 57. Channel Separation
Figure 55. Crosstalk Test Circuit
Rev. E | Page 18 of 20
1M
10M
AD8510/AD8512/AD8513
OUTLINE DIMENSIONS
5.00 (0.1968)
4.80 (0.1890)
8
5
4.00 (0.1574)
3.80 (0.1497) 1
4
5.10
5.00
4.90
6.20 (0.2440)
5.80 (0.2284)
1.27 (0.0500)
BSC
14
0.50 (0.0196)
× 45°
0.25 (0.0099)
1.75 (0.0688)
1.35 (0.0532)
0.25 (0.0098)
0.10 (0.0040)
8
4.50
4.40
4.30
6.40
BSC
1
7
PIN 1
0.51 (0.0201)
COPLANARITY
SEATING 0.31 (0.0122)
0.10
PLANE
8°
0.25 (0.0098) 0° 1.27 (0.0500)
0.40 (0.0157)
0.17 (0.0067)
0.65
BSC
1.05
1.00
0.80
COMPLIANT TO JEDEC STANDARDS MS-012AA
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
1.20
MAX
0.15
0.05
0.30
0.19
0.20
0.09
SEATING
COPLANARITY
PLANE
0.10
0.75
0.60
0.45
8°
0°
COMPLIANT TO JEDEC STANDARDS MO-153AB-1
Figure 58. 8-Lead Standard Small Outline Package [SOIC]
Narrow Body (R-8)
Dimensions shown in millimeters and (inches)
Figure 60. 14-Lead Thin Shrink Small Outline Package [TSSOP]
(RU-14)
Dimensions show in millimeters
3.00
BSC
8
8.75 (0.3445)
8.55 (0.3366)
5
4.90
BSC
3.00
BSC
4.00 (0.1575)
3.80 (0.1496)
14
8
1
7
6.20 (0.2441)
5.80 (0.2283)
4
PIN 1
0.65 BSC
0.25 (0.0098)
0.10 (0.0039)
1.27 (0.0500)
BSC
1.75 (0.0689)
1.35 (0.0531)
1.10 MAX
0.15
0.00
0.38
0.22
COPLANARITY
0.10
0.23
0.08
8°
0°
0.80
0.60
0.40
COPLANARITY
0.10
0.51 (0.0201)
0.31 (0.0122)
SEATING
PLANE
0.50 (0.0197)
× 45°
0.25 (0.0098)
8°
0.25 (0.0098) 0° 1.27 (0.0500)
0.40 (0.0157)
0.17 (0.0067)
COMPLIANT TO JEDEC STANDARDS MO-187AA
COMPLIANT TO JEDEC STANDARDS MS-012AB
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
Figure 59. 8-Lead Mini Small Outline Package [MSOP]
(RM-8)
Dimensions shown in millimeters
Figure 61. 14-Lead Standard Small Outline Package [SOIC]
Narrow Body (R-14)
Dimensions shown in millimeters and (inches)
SEATING
PLANE
Rev. E | Page 19 of 20
AD8510/AD8512/AD8513
ORDERING GUIDE
Model
AD8510ARM-REEL
AD8510ARM-R2
AD8510AR
AD8510AR-REEL
AD8510AR-REEL7
AD8510ARZ1
AD8510ARZ-REEL1
AD8510ARZ-REEL71
AD8510BR
AD8510BR-REEL
AD8510BR-REEL7
AD8512ARM-REEL
AD8512ARM-R2
AD8512ARMZ-REEL1
AD8512ARMZ-R21
AD8512AR
AD8512AR-REEL
AD8512AR-REEL7
AD8512ARZ1
AD8512ARZ-REEL1
AD8512ARZ-REEL71
AD8512BR
AD8512BR-REEL
AD8512BR-REEL7
AD8513AR
AD8513AR-REEL
AD8513AR-REEL7
AD8513ARU
AD8513ARU-REEL
1
Temperature Range
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
Package Description
8-Lead MSOP
8-Lead MSOP
8-Lead SOIC
8-Lead SOIC
8-Lead SOIC
8-Lead SOIC
8-Lead SOIC
8-Lead SOIC
8-Lead SOIC
8-Lead SOIC
8-Lead SOIC
8-Lead MSOP
8-Lead MSOP
8-Lead MSOP
8-Lead MSOP
8-Lead SOIC
8-Lead SOIC
8-Lead SOIC
8-Lead SOIC
8-Lead SOIC
8-Lead SOIC
8-Lead SOIC
8-Lead SOIC
8-Lead SOIC
14-Lead SOIC
14-Lead SOIC
14-Lead SOIC
14-Lead TSSOP
14-Lead TSSOP
Z = Pb-free part.
© 2004 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
C02729–0–6/04(E)
Rev. E | Page 20 of 20
Package Option
RM-8
RM-8
R-8
R-8
R-8
R-8
R-8
R-8
R-8
R-8
R-8
RM-8
RM-8
RM-8
RM-8
R-8
R-8
R-8
R-8
R-8
R-8
R-8
R-8
R-8
R-14
R-14
R-14
RU-14
RU-14
Branding Information
B7A
B7A
B8A
B8A
B8A
B8A
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